382 files changed, 1575 insertions, 4321 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 9277237810e9..de89df1e9c21 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -196,7 +196,8 @@ config VECTORS_BASE
          The base address of exception vectors.
 config ARM_PATCH_PHYS_VIRT
-        bool "Patch physical to virtual translations at runtime"
+        bool "Patch physical to virtual translations at runtime" if EMBEDDED
+        default y
        depends on !XIP_KERNEL && MMU
        depends on !ARCH_REALVIEW || !SPARSEMEM
        help
@@ -205,16 +206,25 @@ config ARM_PATCH_PHYS_VIRT
          kernel in system memory.
          This can only be used with non-XIP MMU kernels where the base
-          of physical memory is at a 16MB boundary, or theoretically 64K
+          of physical memory is at a 16MB boundary.
-          for the MSM machine class.
-config ARM_PATCH_PHYS_VIRT_16BIT
+          Only disable this option if you know that you do not require
-        def_bool y
+          this feature (eg, building a kernel for a single machine) and
-        depends on ARM_PATCH_PHYS_VIRT && ARCH_MSM
+          you need to shrink the kernel to the minimal size.
+config NEED_MACH_MEMORY_H
+        bool
        help
-          This option extends the physical to virtual translation patching
+          Select this when mach/memory.h is required to provide special
-          to allow physical memory down to a theoretical minimum of 64K
+          definitions for this platform.  The need for mach/memory.h should
-          boundaries.
+          be avoided when possible.
+config PHYS_OFFSET
+        hex "Physical address of main memory"
+        depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H
+        help
+          Please provide the physical address corresponding to the
+          location of main memory in your system.
 source "init/Kconfig"
@@ -247,6 +257,7 @@ config ARCH_INTEGRATOR
        select GENERIC_CLOCKEVENTS
        select PLAT_VERSATILE
        select PLAT_VERSATILE_FPGA_IRQ
+        select NEED_MACH_MEMORY_H
        help
          Support for ARM's Integrator platform.
@@ -262,6 +273,7 @@ config ARCH_REALVIEW
        select PLAT_VERSATILE_CLCD
        select ARM_TIMER_SP804
        select GPIO_PL061 if GPIOLIB
+        select NEED_MACH_MEMORY_H
        help
          This enables support for ARM Ltd RealView boards.
@@ -302,7 +314,6 @@ config ARCH_AT91
        select ARCH_REQUIRE_GPIOLIB
        select HAVE_CLK
        select CLKDEV_LOOKUP
-        select ARM_PATCH_PHYS_VIRT if MMU
        help
          This enables support for systems based on the Atmel AT91RM9200,
          AT91SAM9 and AT91CAP9 processors.
@@ -323,6 +334,7 @@ config ARCH_CLPS711X
        bool "Cirrus Logic CLPS711x/EP721x-based"
        select CPU_ARM720T
        select ARCH_USES_GETTIMEOFFSET
+        select NEED_MACH_MEMORY_H
        help
          Support for Cirrus Logic 711x/721x based boards.
@@ -363,6 +375,7 @@ config ARCH_EBSA110
        select ISA
        select NO_IOPORT
        select ARCH_USES_GETTIMEOFFSET
+        select NEED_MACH_MEMORY_H
        help
          This is an evaluation board for the StrongARM processor available
          from Digital. It has limited hardware on-board, including an
@@ -378,6 +391,7 @@ config ARCH_EP93XX
        select ARCH_REQUIRE_GPIOLIB
        select ARCH_HAS_HOLES_MEMORYMODEL
        select ARCH_USES_GETTIMEOFFSET
+        select NEED_MEMORY_H
        help
          This enables support for the Cirrus EP93xx series of CPUs.
@@ -386,6 +400,7 @@ config ARCH_FOOTBRIDGE
        select CPU_SA110
        select FOOTBRIDGE
        select GENERIC_CLOCKEVENTS
+        select NEED_MACH_MEMORY_H
        help
          Support for systems based on the DC21285 companion chip
          ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
@@ -435,6 +450,7 @@ config ARCH_IOP13XX
        select PCI
        select ARCH_SUPPORTS_MSI
        select VMSPLIT_1G
+        select NEED_MACH_MEMORY_H
        help
          Support for Intel's IOP13XX (XScale) family of processors.
@@ -465,6 +481,7 @@ config ARCH_IXP23XX
        select CPU_XSC3
        select PCI
        select ARCH_USES_GETTIMEOFFSET
+        select NEED_MACH_MEMORY_H
        help
          Support for Intel's IXP23xx (XScale) family of processors.
@@ -474,6 +491,7 @@ config ARCH_IXP2000
        select CPU_XSCALE
        select PCI
        select ARCH_USES_GETTIMEOFFSET
+        select NEED_MACH_MEMORY_H
        help
          Support for Intel's IXP2400/2800 (XScale) family of processors.
@@ -567,6 +585,7 @@ config ARCH_KS8695
        select CPU_ARM922T
        select ARCH_REQUIRE_GPIOLIB
        select ARCH_USES_GETTIMEOFFSET
+        select NEED_MACH_MEMORY_H
        help
          Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
          System-on-Chip devices.
@@ -658,6 +677,7 @@ config ARCH_SHMOBILE
        select SPARSE_IRQ
        select MULTI_IRQ_HANDLER
        select PM_GENERIC_DOMAINS if PM
+        select NEED_MACH_MEMORY_H
        help
          Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
@@ -672,6 +692,7 @@ config ARCH_RPC
        select NO_IOPORT
        select ARCH_SPARSEMEM_ENABLE
        select ARCH_USES_GETTIMEOFFSET
+        select NEED_MACH_MEMORY_H
        help
          On the Acorn Risc-PC, Linux can support the internal IDE disk and
          CD-ROM interface, serial and parallel port, and the floppy drive.
@@ -690,6 +711,7 @@ config ARCH_SA1100
        select HAVE_SCHED_CLOCK
        select TICK_ONESHOT
        select ARCH_REQUIRE_GPIOLIB
+        select NEED_MACH_MEMORY_H
        help
          Support for StrongARM 11x0 based boards.
@@ -782,6 +804,7 @@ config ARCH_S5PV210
        select HAVE_S3C2410_I2C if I2C
        select HAVE_S3C_RTC if RTC_CLASS
        select HAVE_S3C2410_WATCHDOG if WATCHDOG
+        select NEED_MACH_MEMORY_H
        help
          Samsung S5PV210/S5PC110 series based systems
@@ -798,6 +821,7 @@ config ARCH_EXYNOS4
        select HAVE_S3C_RTC if RTC_CLASS
        select HAVE_S3C2410_I2C if I2C
        select HAVE_S3C2410_WATCHDOG if WATCHDOG
+        select NEED_MACH_MEMORY_H
        help
          Samsung EXYNOS4 series based systems
@@ -809,6 +833,7 @@ config ARCH_SHARK
        select ZONE_DMA
        select PCI
        select ARCH_USES_GETTIMEOFFSET
+        select NEED_MACH_MEMORY_H
        help
          Support for the StrongARM based Digital DNARD machine, also known
          as "Shark" (<http://www.shark-linux.de/shark.html>).
@@ -837,6 +862,8 @@ config ARCH_U300
        select CLKDEV_LOOKUP
        select HAVE_MACH_CLKDEV
        select GENERIC_GPIO
+        select ARCH_REQUIRE_GPIOLIB
+        select NEED_MACH_MEMORY_H
        help
          Support for ST-Ericsson U300 series mobile platforms.
@@ -1987,6 +2014,7 @@ config CPU_FREQ_PXA
        bool
        depends on CPU_FREQ && ARCH_PXA && PXA25x
        default y
+        select CPU_FREQ_TABLE
        select CPU_FREQ_DEFAULT_GOV_USERSPACE
 config CPU_FREQ_S3C
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 70c424eaf7b0..5665c2a3b652 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -128,6 +128,9 @@ textofs-$(CONFIG_PM_H1940)      := 0x00108000
 ifeq ($(CONFIG_ARCH_SA1100),y)
 textofs-$(CONFIG_SA1111) := 0x00208000
 endif
+textofs-$(CONFIG_ARCH_MSM7X30) := 0x00208000
+textofs-$(CONFIG_ARCH_MSM8X60) := 0x00208000
+textofs-$(CONFIG_ARCH_MSM8960) := 0x00208000
 # Machine directory name.  This list is sorted alphanumerically
 # by CONFIG_* macro name.
diff --git a/arch/arm/boot/dts/tegra-harmony.dts b/arch/arm/boot/dts/tegra-harmony.dts
index e5818668d091..0e225b86b652 100644
--- a/arch/arm/boot/dts/tegra-harmony.dts
+++ b/arch/arm/boot/dts/tegra-harmony.dts
@@ -66,5 +66,6 @@
                cd-gpios = <&gpio 58 0>; /* gpio PH2 */
                wp-gpios = <&gpio 59 0>; /* gpio PH3 */
                power-gpios = <&gpio 70 0>; /* gpio PI6 */
+                support-8bit;
        };
 };
diff --git a/arch/arm/boot/dts/tegra-seaboard.dts b/arch/arm/boot/dts/tegra-seaboard.dts
index 64cedca6fc79..a72299b8e668 100644
--- a/arch/arm/boot/dts/tegra-seaboard.dts
+++ b/arch/arm/boot/dts/tegra-seaboard.dts
@@ -25,4 +25,8 @@
                wp-gpios = <&gpio 57 0>; /* gpio PH1 */
                power-gpios = <&gpio 70 0>; /* gpio PI6 */
        };
+        sdhci@c8000600 {
+                support-8bit;
+        };
 };
diff --git a/arch/arm/common/scoop.c b/arch/arm/common/scoop.c
index a07b0e763a80..1cde34a080d7 100644
--- a/arch/arm/common/scoop.c
+++ b/arch/arm/common/scoop.c
@@ -12,11 +12,11 @@
 */
 #include <linux/device.h>
+#include <linux/gpio.h>
 #include <linux/string.h>
 #include <linux/slab.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
-#include <asm/gpio.h>
 #include <asm/hardware/scoop.h>
 /* PCMCIA to Scoop linkage
diff --git a/arch/arm/configs/at91sam9g45_defconfig b/arch/arm/configs/at91sam9g45_defconfig
new file mode 100644
index 000000000000..c5876d244f4b
--- /dev/null
+++ b/arch/arm/configs/at91sam9g45_defconfig
@@ -0,0 +1,214 @@
+CONFIG_EXPERIMENTAL=y
+# CONFIG_LOCALVERSION_AUTO is not set
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_EMBEDDED=y
+CONFIG_SLAB=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_LBDAF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_ARCH_AT91=y
+CONFIG_ARCH_AT91SAM9G45=y
+CONFIG_MACH_AT91SAM9M10G45EK=y
+CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
+CONFIG_AT91_SLOW_CLOCK=y
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+CONFIG_LEDS=y
+CONFIG_LEDS_CPU=y
+CONFIG_UACCESS_WITH_MEMCPY=y
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="mem=128M console=ttyS0,115200 initrd=0x71100000,25165824 root=/dev/ram0 rw"
+CONFIG_AUTO_ZRELADDR=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_DIAG is not set
+CONFIG_IPV6=y
+# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET6_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET6_XFRM_MODE_BEET is not set
+CONFIG_IPV6_SIT_6RD=y
+CONFIG_CFG80211=y
+CONFIG_LIB80211=y
+CONFIG_MAC80211=y
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+# CONFIG_STANDALONE is not set
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_DATAFLASH=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_ATMEL=y
+CONFIG_MTD_UBI=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=4
+CONFIG_BLK_DEV_RAM_SIZE=8192
+CONFIG_MISC_DEVICES=y
+CONFIG_ATMEL_PWM=y
+CONFIG_ATMEL_TCLIB=y
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_SCSI_MULTI_LUN=y
+# CONFIG_SCSI_LOWLEVEL is not set
+CONFIG_NETDEVICES=y
+CONFIG_MII=y
+CONFIG_DAVICOM_PHY=y
+CONFIG_NET_ETHERNET=y
+CONFIG_MACB=y
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+CONFIG_LIBERTAS_THINFIRM=m
+CONFIG_LIBERTAS_THINFIRM_USB=m
+CONFIG_AT76C50X_USB=m
+CONFIG_USB_ZD1201=m
+CONFIG_RTL8187=m
+CONFIG_ATH_COMMON=m
+CONFIG_ATH9K=m
+CONFIG_CARL9170=m
+CONFIG_B43=m
+CONFIG_B43_PHY_N=y
+CONFIG_LIBERTAS=m
+CONFIG_LIBERTAS_USB=m
+CONFIG_LIBERTAS_SDIO=m
+CONFIG_LIBERTAS_SPI=m
+CONFIG_RT2X00=m
+CONFIG_RT2500USB=m
+CONFIG_RT73USB=m
+CONFIG_RT2800USB=m
+CONFIG_RT2800USB_RT53XX=y
+CONFIG_RT2800USB_UNKNOWN=y
+CONFIG_RTL8192CU=m
+CONFIG_WL1251=m
+CONFIG_WL1251_SDIO=m
+CONFIG_WL12XX_MENU=m
+CONFIG_WL12XX=m
+CONFIG_WL12XX_SDIO=m
+CONFIG_ZD1211RW=m
+CONFIG_MWIFIEX=m
+CONFIG_MWIFIEX_SDIO=m
+CONFIG_INPUT_POLLDEV=m
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=480
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=272
+CONFIG_INPUT_JOYDEV=y
+CONFIG_INPUT_EVDEV=y
+# CONFIG_KEYBOARD_ATKBD is not set
+CONFIG_KEYBOARD_QT1070=m
+CONFIG_KEYBOARD_QT2160=m
+CONFIG_KEYBOARD_GPIO=y
+# CONFIG_INPUT_MOUSE is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_ATMEL_MXT=m
+CONFIG_TOUCHSCREEN_ATMEL_TSADCC=y
+# CONFIG_SERIO is not set
+CONFIG_LEGACY_PTY_COUNT=4
+CONFIG_SERIAL_ATMEL=y
+CONFIG_SERIAL_ATMEL_CONSOLE=y
+CONFIG_HW_RANDOM=y
+CONFIG_I2C=y
+CONFIG_I2C_GPIO=y
+CONFIG_SPI=y
+CONFIG_SPI_ATMEL=y
+# CONFIG_HWMON is not set
+# CONFIG_MFD_SUPPORT is not set
+CONFIG_FB=y
+CONFIG_FB_ATMEL=y
+CONFIG_FB_UDL=m
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+# CONFIG_LCD_CLASS_DEVICE is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_ATMEL_LCDC=y
+# CONFIG_BACKLIGHT_GENERIC is not set
+CONFIG_SOUND=y
+CONFIG_SND=y
+CONFIG_SND_SEQUENCER=y
+CONFIG_SND_MIXER_OSS=y
+CONFIG_SND_PCM_OSS=y
+# CONFIG_SND_SUPPORT_OLD_API is not set
+# CONFIG_SND_VERBOSE_PROCFS is not set
+# CONFIG_SND_DRIVERS is not set
+# CONFIG_SND_ARM is not set
+CONFIG_SND_ATMEL_AC97C=y
+# CONFIG_SND_SPI is not set
+CONFIG_SND_USB_AUDIO=m
+# CONFIG_USB_HID is not set
+CONFIG_USB=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+CONFIG_USB_DEVICEFS=y
+# CONFIG_USB_DEVICE_CLASS is not set
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_ACM=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_ATMEL_USBA=m
+CONFIG_USB_ZERO=m
+CONFIG_USB_AUDIO=m
+CONFIG_USB_ETH=m
+CONFIG_USB_ETH_EEM=y
+CONFIG_USB_MASS_STORAGE=m
+CONFIG_USB_G_SERIAL=m
+CONFIG_USB_CDC_COMPOSITE=m
+CONFIG_USB_G_MULTI=m
+CONFIG_USB_G_MULTI_CDC=y
+CONFIG_MMC=y
+# CONFIG_MMC_BLOCK_BOUNCE is not set
+CONFIG_SDIO_UART=m
+CONFIG_MMC_ATMELMCI=y
+CONFIG_MMC_ATMELMCI_DMA=y
+CONFIG_LEDS_ATMEL_PWM=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_GPIO=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_AT91RM9200=y
+CONFIG_DMADEVICES=y
+CONFIG_AT_HDMAC=y
+CONFIG_DMATEST=m
+# CONFIG_IOMMU_SUPPORT is not set
+CONFIG_EXT2_FS=y
+CONFIG_FANOTIFY=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_SUMMARY=y
+CONFIG_CRAMFS=m
+CONFIG_SQUASHFS=m
+CONFIG_SQUASHFS_EMBEDDED=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_850=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_STRIP_ASM_SYMS=y
+# CONFIG_SCHED_DEBUG is not set
+CONFIG_DEBUG_MEMORY_INIT=y
+# CONFIG_FTRACE is not set
+CONFIG_DEBUG_USER=y
+CONFIG_CRYPTO_ECB=y
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_USER_API_HASH=m
+CONFIG_CRYPTO_USER_API_SKCIPHER=m
+# CONFIG_CRYPTO_HW is not set
diff --git a/arch/arm/include/asm/gpio.h b/arch/arm/include/asm/gpio.h
index 166a7a3e2840..11ad0bfbb0ad 100644
--- a/arch/arm/include/asm/gpio.h
+++ b/arch/arm/include/asm/gpio.h
@@ -4,4 +4,23 @@
 /* not all ARM platforms necessarily support this API ... */
 #include <mach/gpio.h>
+#ifndef __ARM_GPIOLIB_COMPLEX
+/* Note: this may rely upon the value of ARCH_NR_GPIOS set in mach/gpio.h */
+#include <asm-generic/gpio.h>
+/* The trivial gpiolib dispatchers */
+#define gpio_get_value  __gpio_get_value
+#define gpio_set_value  __gpio_set_value
+#define gpio_cansleep   __gpio_cansleep
+#endif
+/*
+ * Provide a default gpio_to_irq() which should satisfy every case.
+ * However, some platforms want to do this differently, so allow them
+ * to override it.
+ */
+#ifndef gpio_to_irq
+#define gpio_to_irq     __gpio_to_irq
+#endif
 #endif /* _ARCH_ARM_GPIO_H */
diff --git a/arch/arm/include/asm/hardware/iop3xx-gpio.h b/arch/arm/include/asm/hardware/iop3xx-gpio.h
index b69d972b1f7d..9eda7dc92ad8 100644
--- a/arch/arm/include/asm/hardware/iop3xx-gpio.h
+++ b/arch/arm/include/asm/hardware/iop3xx-gpio.h
@@ -28,6 +28,8 @@
 #include <mach/hardware.h>
 #include <asm-generic/gpio.h>
+#define __ARM_GPIOLIB_COMPLEX
 #define IOP3XX_N_GPIOS  8
 static inline int gpio_get_value(unsigned gpio)
diff --git a/arch/arm/include/asm/hardware/it8152.h b/arch/arm/include/asm/hardware/it8152.h
index b3fea38d55c6..43cab498bc27 100644
--- a/arch/arm/include/asm/hardware/it8152.h
+++ b/arch/arm/include/asm/hardware/it8152.h
@@ -9,7 +9,7 @@
 #ifndef __ASM_HARDWARE_IT8152_H
 #define __ASM_HARDWARE_IT8152_H
-extern unsigned long it8152_base_address;
+extern void __iomem *it8152_base_address;
 #define IT8152_IO_BASE                  (it8152_base_address + 0x03e00000)
 #define IT8152_CFGREG_BASE              (it8152_base_address + 0x03f00000)
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
index 652fccca4952..a8997d71084e 100644
--- a/arch/arm/include/asm/memory.h
+++ b/arch/arm/include/asm/memory.h
@@ -16,9 +16,12 @@
 #include <linux/compiler.h>
 #include <linux/const.h>
 #include <linux/types.h>
-#include <mach/memory.h>
 #include <asm/sizes.h>
+#ifdef CONFIG_NEED_MACH_MEMORY_H
+#include <mach/memory.h>
+#endif
 /*
 * Allow for constants defined here to be used from assembly code
 * by prepending the UL suffix only with actual C code compilation.
@@ -151,7 +154,6 @@
 * so that all we need to do is modify the 8-bit constant field.
 */
 #define __PV_BITS_31_24 0x81000000
-#define __PV_BITS_23_16 0x00810000
 extern unsigned long __pv_phys_offset;
 #define PHYS_OFFSET __pv_phys_offset
@@ -169,9 +171,6 @@ static inline unsigned long __virt_to_phys(unsigned long x)
 {
        unsigned long t;
        __pv_stub(x, t, "add", __PV_BITS_31_24);
-#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
-        __pv_stub(t, t, "add", __PV_BITS_23_16);
-#endif
        return t;
 }
@@ -179,9 +178,6 @@ static inline unsigned long __phys_to_virt(unsigned long x)
 {
        unsigned long t;
        __pv_stub(x, t, "sub", __PV_BITS_31_24);
-#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
-        __pv_stub(t, t, "sub", __PV_BITS_23_16);
-#endif
        return t;
 }
 #else
@@ -191,7 +187,11 @@ static inline unsigned long __phys_to_virt(unsigned long x)
 #endif
 #ifndef PHYS_OFFSET
+#ifdef PLAT_PHYS_OFFSET
 #define PHYS_OFFSET     PLAT_PHYS_OFFSET
+#else
+#define PHYS_OFFSET     UL(CONFIG_PHYS_OFFSET)
+#endif
 #endif
 /*
diff --git a/arch/arm/include/asm/module.h b/arch/arm/include/asm/module.h
index 543b44916d2c..6c6809f982f1 100644
--- a/arch/arm/include/asm/module.h
+++ b/arch/arm/include/asm/module.h
@@ -31,11 +31,7 @@ struct mod_arch_specific {
 /* Add __virt_to_phys patching state as well */
 #ifdef CONFIG_ARM_PATCH_PHYS_VIRT
-#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
-#define MODULE_ARCH_VERMAGIC_P2V "p2v16 "
-#else
 #define MODULE_ARCH_VERMAGIC_P2V "p2v8 "
-#endif
 #else
 #define MODULE_ARCH_VERMAGIC_P2V ""
 #endif
diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S
index bcd66e00bdbe..b7685f1bb04a 100644
--- a/arch/arm/kernel/debug.S
+++ b/arch/arm/kernel/debug.S
@@ -22,7 +22,7 @@
 #if defined(CONFIG_DEBUG_ICEDCC)
                @@ debug using ARM EmbeddedICE DCC channel
-                .macro  addruart, rp, rv
+                .macro  addruart, rp, rv, tmp
                .endm
 #if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7)
@@ -106,7 +106,7 @@
 #ifdef CONFIG_MMU
                .macro  addruart_current, rx, tmp1, tmp2
-                addruart        \tmp1, \tmp2
+                addruart        \tmp1, \tmp2, \rx
                mrc             p15, 0, \rx, c1, c0
                tst             \rx, #1
                moveq           \rx, \tmp1
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 742b6108a001..673c806cc106 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -95,7 +95,7 @@ ENTRY(stext)
        sub     r4, r3, r4                      @ (PHYS_OFFSET - PAGE_OFFSET)
        add     r8, r8, r4                      @ PHYS_OFFSET
 #else
-        ldr     r8, =PLAT_PHYS_OFFSET
+        ldr     r8, =PHYS_OFFSET                @ always constant in this case
 #endif
        /*
@@ -234,7 +234,7 @@ __create_page_tables:
         * This allows debug messages to be output
         * via a serial console before paging_init.
         */
-        addruart r7, r3
+        addruart r7, r3, r0
        mov     r3, r3, lsr #20
        mov     r3, r3, lsl #2
@@ -488,13 +488,8 @@ __fixup_pv_table:
        add     r5, r5, r3      @ adjust table end address
        add     r7, r7, r3      @ adjust __pv_phys_offset address
        str     r8, [r7]        @ save computed PHYS_OFFSET to __pv_phys_offset
-#ifndef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
        mov     r6, r3, lsr #24 @ constant for add/sub instructions
        teq     r3, r6, lsl #24 @ must be 16MiB aligned
-#else
-        mov     r6, r3, lsr #16 @ constant for add/sub instructions
-        teq     r3, r6, lsl #16 @ must be 64kiB aligned
-#endif
 THUMB(  it      ne              @ cross section branch )
        bne     __error
        str     r6, [r7, #4]    @ save to __pv_offset
@@ -510,20 +505,8 @@ ENDPROC(__fixup_pv_table)
        .text
 __fixup_a_pv_table:
 #ifdef CONFIG_THUMB2_KERNEL
-#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
+        lsls    r6, #24
-        lsls    r0, r6, #24
+        beq     2f
-        lsr     r6, #8
-        beq     1f
-        clz     r7, r0
-        lsr     r0, #24
-        lsl     r0, r7
-        bic     r0, 0x0080
-        lsrs    r7, #1
-        orrcs   r0, #0x0080
-        orr     r0, r0, r7, lsl #12
-#endif
-1:      lsls    r6, #24
-        beq     4f
        clz     r7, r6
        lsr     r6, #24
        lsl     r6, r7
@@ -532,43 +515,25 @@ __fixup_a_pv_table:
        orrcs   r6, #0x0080
        orr     r6, r6, r7, lsl #12
        orr     r6, #0x4000
-        b       4f
+        b       2f
-2:      @ at this point the C flag is always clear
+1:      add     r7, r3
-        add     r7, r3
+        ldrh    ip, [r7, #2]
-#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
-        ldrh    ip, [r7]
-        tst     ip, 0x0400      @ the i bit tells us LS or MS byte
-        beq     3f
-        cmp     r0, #0          @ set C flag, and ...
-        biceq   ip, 0x0400      @ immediate zero value has a special encoding
-        streqh  ip, [r7]        @ that requires the i bit cleared
-#endif
-3:      ldrh    ip, [r7, #2]
        and     ip, 0x8f00
-        orrcc   ip, r6  @ mask in offset bits 31-24
+        orr     ip, r6  @ mask in offset bits 31-24
-        orrcs   ip, r0  @ mask in offset bits 23-16
        strh    ip, [r7, #2]
-4:      cmp     r4, r5
+2:      cmp     r4, r5
        ldrcc   r7, [r4], #4    @ use branch for delay slot
-        bcc     2b
+        bcc     1b
        bx      lr
 #else
-#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
+        b       2f
-        and     r0, r6, #255    @ offset bits 23-16
+1:      ldr     ip, [r7, r3]
-        mov     r6, r6, lsr #8  @ offset bits 31-24
-#else
-        mov     r0, #0          @ just in case...
-#endif
-        b       3f
-2:      ldr     ip, [r7, r3]
        bic     ip, ip, #0x000000ff
-        tst     ip, #0x400      @ rotate shift tells us LS or MS byte
+        orr     ip, ip, r6      @ mask in offset bits 31-24
-        orrne   ip, ip, r6      @ mask in offset bits 31-24
-        orreq   ip, ip, r0      @ mask in offset bits 23-16
        str     ip, [r7, r3]
-3:      cmp     r4, r5
+2:      cmp     r4, r5
        ldrcc   r7, [r4], #4    @ use branch for delay slot
-        bcc     2b
+        bcc     1b
        mov     pc, lr
 #endif
 ENDPROC(__fixup_a_pv_table)
diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c
index dba0d8d8a4bd..f87f5040e78e 100644
--- a/arch/arm/mach-at91/at91cap9_devices.c
+++ b/arch/arm/mach-at91/at91cap9_devices.c
@@ -16,6 +16,7 @@
 #include <asm/mach/irq.h>
 #include <linux/dma-mapping.h>
+#include <linux/gpio.h>
 #include <linux/platform_device.h>
 #include <linux/i2c-gpio.h>
@@ -23,7 +24,6 @@
 #include <mach/board.h>
 #include <mach/cpu.h>
-#include <mach/gpio.h>
 #include <mach/at91cap9.h>
 #include <mach/at91cap9_matrix.h>
 #include <mach/at91sam9_smc.h>
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index 7227755ffec6..978be950035a 100644
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -14,11 +14,11 @@
 #include <asm/mach/map.h>
 #include <linux/dma-mapping.h>
+#include <linux/gpio.h>
 #include <linux/platform_device.h>
 #include <linux/i2c-gpio.h>
 #include <mach/board.h>
-#include <mach/gpio.h>
 #include <mach/at91rm9200.h>
 #include <mach/at91rm9200_mc.h>
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index 39f81f47b4ba..a53b3de9daa2 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -13,11 +13,11 @@
 #include <asm/mach/map.h>
 #include <linux/dma-mapping.h>
+#include <linux/gpio.h>
 #include <linux/platform_device.h>
 #include <linux/i2c-gpio.h>
 #include <mach/board.h>
-#include <mach/gpio.h>
 #include <mach/cpu.h>
 #include <mach/at91sam9260.h>
 #include <mach/at91sam9260_matrix.h>
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index 0f917928eeb7..4e647b653339 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -14,6 +14,7 @@
 #include <asm/mach/map.h>
 #include <linux/dma-mapping.h>
+#include <linux/gpio.h>
 #include <linux/platform_device.h>
 #include <linux/i2c-gpio.h>
@@ -21,7 +22,6 @@
 #include <video/atmel_lcdc.h>
 #include <mach/board.h>
-#include <mach/gpio.h>
 #include <mach/at91sam9261.h>
 #include <mach/at91sam9261_matrix.h>
 #include <mach/at91sam9_smc.h>
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index a050f41fc860..dd7662bc395f 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -13,6 +13,7 @@
 #include <asm/mach/map.h>
 #include <linux/dma-mapping.h>
+#include <linux/gpio.h>
 #include <linux/platform_device.h>
 #include <linux/i2c-gpio.h>
@@ -20,7 +21,6 @@
 #include <video/atmel_lcdc.h>
 #include <mach/board.h>
-#include <mach/gpio.h>
 #include <mach/at91sam9263.h>
 #include <mach/at91sam9263_matrix.h>
 #include <mach/at91sam9_smc.h>
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index 600bffb01edb..c3dfb1b3b1e3 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -13,6 +13,7 @@
 #include <asm/mach/map.h>
 #include <linux/dma-mapping.h>
+#include <linux/gpio.h>
 #include <linux/platform_device.h>
 #include <linux/i2c-gpio.h>
 #include <linux/atmel-mci.h>
@@ -21,7 +22,6 @@
 #include <video/atmel_lcdc.h>
 #include <mach/board.h>
-#include <mach/gpio.h>
 #include <mach/at91sam9g45.h>
 #include <mach/at91sam9g45_matrix.h>
 #include <mach/at91sam9_smc.h>
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index aacb19dc9225..305a851b5bff 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -10,6 +10,7 @@
 #include <asm/mach/map.h>
 #include <linux/dma-mapping.h>
+#include <linux/gpio.h>
 #include <linux/platform_device.h>
 #include <linux/i2c-gpio.h>
@@ -17,7 +18,6 @@
 #include <video/atmel_lcdc.h>
 #include <mach/board.h>
-#include <mach/gpio.h>
 #include <mach/at91sam9rl.h>
 #include <mach/at91sam9rl_matrix.h>
 #include <mach/at91sam9_smc.h>
diff --git a/arch/arm/mach-at91/board-1arm.c b/arch/arm/mach-at91/board-1arm.c
index 5aa58851eb39..367d5cd5e362 100644
--- a/arch/arm/mach-at91/board-1arm.c
+++ b/arch/arm/mach-at91/board-1arm.c
@@ -19,6 +19,7 @@
 */
 #include <linux/types.h>
+#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -34,7 +35,6 @@
 #include <asm/mach/irq.h>
 #include <mach/board.h>
-#include <mach/gpio.h>
 #include <mach/cpu.h>
 #include "generic.h"
diff --git a/arch/arm/mach-at91/board-afeb-9260v1.c b/arch/arm/mach-at91/board-afeb-9260v1.c
index b0c796d42e49..0487ea10c2d6 100644
--- a/arch/arm/mach-at91/board-afeb-9260v1.c
+++ b/arch/arm/mach-at91/board-afeb-9260v1.c
@@ -25,6 +25,7 @@
 */
 #include <linux/types.h>
+#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -43,7 +44,6 @@
 #include <asm/mach/irq.h>
 #include <mach/board.h>
-#include <mach/gpio.h>
 #include "generic.h"
diff --git a/arch/arm/mach-at91/board-cam60.c b/arch/arm/mach-at91/board-cam60.c
index d1abd5898e85..747b2eaa9737 100644
--- a/arch/arm/mach-at91/board-cam60.c
+++ b/arch/arm/mach-at91/board-cam60.c
@@ -21,6 +21,7 @@
 */
 #include <linux/types.h>
+#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -38,7 +39,6 @@
 #include <asm/mach/irq.h>
 #include <mach/board.h>
-#include <mach/gpio.h>
 #include <mach/at91sam9_smc.h>
 #include "sam9_smc.h"
diff --git a/arch/arm/mach-at91/board-cap9adk.c b/arch/arm/mach-at91/board-cap9adk.c
index 679b0b743e92..062670351a6a 100644
--- a/arch/arm/mach-at91/board-cap9adk.c
+++ b/arch/arm/mach-at91/board-cap9adk.c
@@ -22,6 +22,7 @@
 */
 #include <linux/types.h>
+#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -41,7 +42,6 @@
 #include <asm/mach/map.h>
 #include <mach/board.h>
-#include <mach/gpio.h>
 #include <mach/at91cap9_matrix.h>
 #include <mach/at91sam9_smc.h>
 #include <mach/system_rev.h>
diff --git a/arch/arm/mach-at91/board-carmeva.c b/arch/arm/mach-at91/board-carmeva.c
index c578c5d90728..774c87fcbd5b 100644
--- a/arch/arm/mach-at91/board-carmeva.c
+++ b/arch/arm/mach-at91/board-carmeva.c
@@ -20,6 +20,7 @@
 */
 #include <linux/types.h>
+#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -35,7 +36,6 @@
 #include <mach/hardware.h>
 #include <mach/board.h>
-#include <mach/gpio.h>
 #include "generic.h"
diff --git a/arch/arm/mach-at91/board-cpu9krea.c b/arch/arm/mach-at91/board-cpu9krea.c
index f4da8a16d5dc..fc885a4ce243 100644
--- a/arch/arm/mach-at91/board-cpu9krea.c
+++ b/arch/arm/mach-at91/board-cpu9krea.c
@@ -21,6 +21,7 @@
 */
 #include <linux/types.h>
+#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -40,7 +41,6 @@
 #include <mach/hardware.h>
 #include <mach/board.h>
-#include <mach/gpio.h>
 #include <mach/at91sam9_smc.h>
 #include <mach/at91sam9260_matrix.h>
diff --git a/arch/arm/mach-at91/board-cpuat91.c b/arch/arm/mach-at91/board-cpuat91.c
index 2d919f5a4f57..d35e65b08ccd 100644
--- a/arch/arm/mach-at91/board-cpuat91.c
+++ b/arch/arm/mach-at91/board-cpuat91.c
@@ -19,6 +19,7 @@
 */
 #include <linux/types.h>
+#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -36,7 +37,6 @@
 #include <asm/mach/irq.h>
 #include <mach/board.h>
-#include <mach/gpio.h>
 #include <mach/at91rm9200_mc.h>
 #include <mach/cpu.h>
diff --git a/arch/arm/mach-at91/board-csb337.c b/arch/arm/mach-at91/board-csb337.c
index 17654d5e94e6..c3936665e645 100644
--- a/arch/arm/mach-at91/board-csb337.c
+++ b/arch/arm/mach-at91/board-csb337.c
@@ -19,6 +19,7 @@
 */
 #include <linux/types.h>
+#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -38,7 +39,6 @@
 #include <mach/hardware.h>
 #include <mach/board.h>
-#include <mach/gpio.h>
 #include "generic.h"
diff --git a/arch/arm/mach-at91/board-csb637.c b/arch/arm/mach-at91/board-csb637.c
index 72b55674616c..586100e2acbb 100644
--- a/arch/arm/mach-at91/board-csb637.c
+++ b/arch/arm/mach-at91/board-csb637.c
@@ -20,6 +20,7 @@
 #include <linux/types.h>
 #include <linux/init.h>
+#include <linux/gpio.h>
 #include <linux/mm.h>
 #include <linux/module.h>
 #include <linux/platform_device.h>
@@ -35,7 +36,6 @@
 #include <mach/hardware.h>
 #include <mach/board.h>
-#include <mach/gpio.h>
 #include "generic.h"
diff --git a/arch/arm/mach-at91/board-eb9200.c b/arch/arm/mach-at91/board-eb9200.c
index 01170a2766a8..45db7a3dbef0 100644
--- a/arch/arm/mach-at91/board-eb9200.c
+++ b/arch/arm/mach-at91/board-eb9200.c
@@ -20,6 +20,7 @@
 */
 #include <linux/types.h>
+#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -35,7 +36,6 @@
 #include <asm/mach/irq.h>
 #include <mach/board.h>
-#include <mach/gpio.h>
 #include "generic.h"
diff --git a/arch/arm/mach-at91/board-ecbat91.c b/arch/arm/mach-at91/board-ecbat91.c
index 7c0313c51f26..2f9c16d29212 100644
--- a/arch/arm/mach-at91/board-ecbat91.c
+++ b/arch/arm/mach-at91/board-ecbat91.c
@@ -20,6 +20,7 @@
 */
 #include <linux/types.h>
+#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -37,7 +38,6 @@
 #include <asm/mach/irq.h>
 #include <mach/board.h>
-#include <mach/gpio.h>
 #include <mach/cpu.h>
 #include "generic.h"
diff --git a/arch/arm/mach-at91/board-kafa.c b/arch/arm/mach-at91/board-kafa.c
index 4a170890b3b1..3bae73e63633 100644
--- a/arch/arm/mach-at91/board-kafa.c
+++ b/arch/arm/mach-at91/board-kafa.c
@@ -19,6 +19,7 @@
 */
 #include <linux/types.h>
+#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -34,7 +35,6 @@
 #include <asm/mach/irq.h>
 #include <mach/board.h>
-#include <mach/gpio.h>
 #include <mach/cpu.h>
 #include "generic.h"
diff --git a/arch/arm/mach-at91/board-kb9202.c b/arch/arm/mach-at91/board-kb9202.c
index 9dc8d496ead1..15a3f1a87ab0 100644
--- a/arch/arm/mach-at91/board-kb9202.c
+++ b/arch/arm/mach-at91/board-kb9202.c
@@ -20,6 +20,7 @@
 */
 #include <linux/types.h>
+#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -35,7 +36,6 @@
 #include <asm/mach/irq.h>
 #include <mach/board.h>
-#include <mach/gpio.h>
 #include <mach/cpu.h>
 #include <mach/at91rm9200_mc.h>
diff --git a/arch/arm/mach-at91/board-neocore926.c b/arch/arm/mach-at91/board-neocore926.c
index 9bc6ab32e0ac..6094496f7edb 100644
--- a/arch/arm/mach-at91/board-neocore926.c
+++ b/arch/arm/mach-at91/board-neocore926.c
@@ -21,6 +21,7 @@
 */
 #include <linux/types.h>
+#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -44,7 +45,6 @@
 #include <mach/hardware.h>
 #include <mach/board.h>
-#include <mach/gpio.h>
 #include <mach/at91sam9_smc.h>
 #include "sam9_smc.h"
diff --git a/arch/arm/mach-at91/board-picotux200.c b/arch/arm/mach-at91/board-picotux200.c
index b7b8390e8a00..0a8fe6a1b7c8 100644
--- a/arch/arm/mach-at91/board-picotux200.c
+++ b/arch/arm/mach-at91/board-picotux200.c
@@ -20,6 +20,7 @@
 */
 #include <linux/types.h>
+#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -37,7 +38,6 @@
 #include <asm/mach/irq.h>
 #include <mach/board.h>
-#include <mach/gpio.h>
 #include <mach/at91rm9200_mc.h>
 #include "generic.h"
diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c
index 81f911033681..938cc390bea3 100644
--- a/arch/arm/mach-at91/board-qil-a9260.c
+++ b/arch/arm/mach-at91/board-qil-a9260.c
@@ -21,6 +21,7 @@
 */
 #include <linux/types.h>
+#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -40,7 +41,6 @@
 #include <mach/hardware.h>
 #include <mach/board.h>
-#include <mach/gpio.h>
 #include <mach/at91sam9_smc.h>
 #include <mach/at91_shdwc.h>
diff --git a/arch/arm/mach-at91/board-rm9200dk.c b/arch/arm/mach-at91/board-rm9200dk.c
index 6f08faadb474..b4ac30e38a9e 100644
--- a/arch/arm/mach-at91/board-rm9200dk.c
+++ b/arch/arm/mach-at91/board-rm9200dk.c
@@ -22,6 +22,7 @@
 */
 #include <linux/types.h>
+#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -39,7 +40,6 @@
 #include <mach/hardware.h>
 #include <mach/board.h>
-#include <mach/gpio.h>
 #include <mach/at91rm9200_mc.h>
 #include "generic.h"
diff --git a/arch/arm/mach-at91/board-rm9200ek.c b/arch/arm/mach-at91/board-rm9200ek.c
index 85bcccd7b9e4..99fd7f8aee0e 100644
--- a/arch/arm/mach-at91/board-rm9200ek.c
+++ b/arch/arm/mach-at91/board-rm9200ek.c
@@ -22,6 +22,7 @@
 */
 #include <linux/types.h>
+#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -39,7 +40,6 @@
 #include <mach/hardware.h>
 #include <mach/board.h>
-#include <mach/gpio.h>
 #include <mach/at91rm9200_mc.h>
 #include "generic.h"
diff --git a/arch/arm/mach-at91/board-sam9-l9260.c b/arch/arm/mach-at91/board-sam9-l9260.c
index 4d3a02f1289e..2a21e790250e 100644
--- a/arch/arm/mach-at91/board-sam9-l9260.c
+++ b/arch/arm/mach-at91/board-sam9-l9260.c
@@ -21,6 +21,7 @@
 */
 #include <linux/types.h>
+#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -37,7 +38,6 @@
 #include <asm/mach/irq.h>
 #include <mach/board.h>
-#include <mach/gpio.h>
 #include <mach/at91sam9_smc.h>
 #include "sam9_smc.h"
diff --git a/arch/arm/mach-at91/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c
index 8a50c3e67186..89c8b579bfda 100644
--- a/arch/arm/mach-at91/board-sam9260ek.c
+++ b/arch/arm/mach-at91/board-sam9260ek.c
@@ -20,6 +20,7 @@
 */
 #include <linux/types.h>
+#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -41,7 +42,6 @@
 #include <mach/hardware.h>
 #include <mach/board.h>
-#include <mach/gpio.h>
 #include <mach/at91sam9_smc.h>
 #include <mach/at91_shdwc.h>
 #include <mach/system_rev.h>
diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c
index 5096a0ec50c1..3741f43cdae9 100644
--- a/arch/arm/mach-at91/board-sam9261ek.c
+++ b/arch/arm/mach-at91/board-sam9261ek.c
@@ -20,6 +20,7 @@
 */
 #include <linux/types.h>
+#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -45,7 +46,6 @@
 #include <mach/hardware.h>
 #include <mach/board.h>
-#include <mach/gpio.h>
 #include <mach/at91sam9_smc.h>
 #include <mach/at91_shdwc.h>
 #include <mach/system_rev.h>
diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c
index ea8f185d3b9d..a580dd451a41 100644
--- a/arch/arm/mach-at91/board-sam9263ek.c
+++ b/arch/arm/mach-at91/board-sam9263ek.c
@@ -20,6 +20,7 @@
 */
 #include <linux/types.h>
+#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -44,7 +45,6 @@
 #include <mach/hardware.h>
 #include <mach/board.h>
-#include <mach/gpio.h>
 #include <mach/at91sam9_smc.h>
 #include <mach/at91_shdwc.h>
 #include <mach/system_rev.h>
diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c
index 817f59d7251b..8d77c2ff96b2 100644
--- a/arch/arm/mach-at91/board-sam9g20ek.c
+++ b/arch/arm/mach-at91/board-sam9g20ek.c
@@ -18,6 +18,7 @@
 */
 #include <linux/types.h>
+#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -41,7 +42,6 @@
 #include <asm/mach/irq.h>
 #include <mach/board.h>
-#include <mach/gpio.h>
 #include <mach/at91sam9_smc.h>
 #include <mach/system_rev.h>
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index ad234ccbf57e..2d6203ac1a42 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -14,6 +14,7 @@
 */
 #include <linux/types.h>
+#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -38,7 +39,6 @@
 #include <asm/mach/irq.h>
 #include <mach/board.h>
-#include <mach/gpio.h>
 #include <mach/at91sam9_smc.h>
 #include <mach/at91_shdwc.h>
 #include <mach/system_rev.h>
diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c
index 4f14b54b93a8..39a28effc3df 100644
--- a/arch/arm/mach-at91/board-sam9rlek.c
+++ b/arch/arm/mach-at91/board-sam9rlek.c
@@ -8,6 +8,7 @@
 */
 #include <linux/types.h>
+#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -30,7 +31,6 @@
 #include <mach/hardware.h>
 #include <mach/board.h>
-#include <mach/gpio.h>
 #include <mach/at91sam9_smc.h>
 #include <mach/at91_shdwc.h>
diff --git a/arch/arm/mach-at91/board-usb-a9260.c b/arch/arm/mach-at91/board-usb-a9260.c
index 8c4c1a02c4be..bac9b65cf551 100644
--- a/arch/arm/mach-at91/board-usb-a9260.c
+++ b/arch/arm/mach-at91/board-usb-a9260.c
@@ -21,6 +21,7 @@
 */
 #include <linux/types.h>
+#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -40,7 +41,6 @@
 #include <mach/hardware.h>
 #include <mach/board.h>
-#include <mach/gpio.h>
 #include <mach/at91sam9_smc.h>
 #include <mach/at91_shdwc.h>
diff --git a/arch/arm/mach-at91/board-usb-a9263.c b/arch/arm/mach-at91/board-usb-a9263.c
index 25e793782a4e..5bd735787d6d 100644
--- a/arch/arm/mach-at91/board-usb-a9263.c
+++ b/arch/arm/mach-at91/board-usb-a9263.c
@@ -21,6 +21,7 @@
 */
 #include <linux/types.h>
+#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -39,7 +40,6 @@
 #include <mach/hardware.h>
 #include <mach/board.h>
-#include <mach/gpio.h>
 #include <mach/at91sam9_smc.h>
 #include <mach/at91_shdwc.h>
diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c
index 95edcbd2aec6..3c288b396fc4 100644
--- a/arch/arm/mach-at91/board-yl-9200.c
+++ b/arch/arm/mach-at91/board-yl-9200.c
@@ -22,6 +22,7 @@
 */
 #include <linux/types.h>
+#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -43,7 +44,6 @@
 #include <mach/hardware.h>
 #include <mach/board.h>
-#include <mach/gpio.h>
 #include <mach/at91rm9200_mc.h>
 #include <mach/cpu.h>
diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c
index 4615528205c8..224e9e2f8674 100644
--- a/arch/arm/mach-at91/gpio.c
+++ b/arch/arm/mach-at91/gpio.c
@@ -11,6 +11,7 @@
 #include <linux/clk.h>
 #include <linux/errno.h>
+#include <linux/gpio.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
 #include <linux/debugfs.h>
@@ -22,9 +23,6 @@
 #include <mach/hardware.h>
 #include <mach/at91_pio.h>
-#include <mach/gpio.h>
-#include <asm/gpio.h>
 #include "generic.h"
diff --git a/arch/arm/mach-at91/include/mach/debug-macro.S b/arch/arm/mach-at91/include/mach/debug-macro.S
index bc1e0b2e2f4f..0ed8648c6452 100644
--- a/arch/arm/mach-at91/include/mach/debug-macro.S
+++ b/arch/arm/mach-at91/include/mach/debug-macro.S
@@ -14,7 +14,7 @@
 #include <mach/hardware.h>
 #include <mach/at91_dbgu.h>
-        .macro  addruart, rp, rv
+        .macro  addruart, rp, rv, tmp
        ldr     \rp, =(AT91_BASE_SYS + AT91_DBGU)       @ System peripherals (phys address)
        ldr     \rv, =(AT91_VA_BASE_SYS + AT91_DBGU)    @ System peripherals (virt address)
        .endm
diff --git a/arch/arm/mach-at91/include/mach/gpio.h b/arch/arm/mach-at91/include/mach/gpio.h
index 056dc6674b6b..2b9a1f51210f 100644
--- a/arch/arm/mach-at91/include/mach/gpio.h
+++ b/arch/arm/mach-at91/include/mach/gpio.h
@@ -214,11 +214,6 @@ extern void at91_gpio_resume(void);
 */
 #include <asm/errno.h>
-#include <asm-generic/gpio.h>           /* cansleep wrappers */
-#define gpio_get_value  __gpio_get_value
-#define gpio_set_value  __gpio_set_value
-#define gpio_cansleep   __gpio_cansleep
 #define gpio_to_irq(gpio) (gpio)
 #define irq_to_gpio(irq)  (irq)
diff --git a/arch/arm/mach-at91/leds.c b/arch/arm/mach-at91/leds.c
index 0415a839e1ad..8dfafe76ffe6 100644
--- a/arch/arm/mach-at91/leds.c
+++ b/arch/arm/mach-at91/leds.c
@@ -9,13 +9,13 @@
 * 2 of the License, or (at your option) any later version.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <mach/board.h>
-#include <mach/gpio.h>
 /* ------------------------------------------------------------------------- */
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 4159eca78945..7046158109d7 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -10,6 +10,7 @@
 * (at your option) any later version.
 */
+#include <linux/gpio.h>
 #include <linux/suspend.h>
 #include <linux/sched.h>
 #include <linux/proc_fs.h>
@@ -25,7 +26,6 @@
 #include <asm/mach/irq.h>
 #include <mach/at91_pmc.h>
-#include <mach/gpio.h>
 #include <mach/cpu.h>
 #include "generic.h"
diff --git a/arch/arm/mach-bcmring/include/mach/hardware.h b/arch/arm/mach-bcmring/include/mach/hardware.h
index ed78aabb8e9f..6ae20a649a97 100644
--- a/arch/arm/mach-bcmring/include/mach/hardware.h
+++ b/arch/arm/mach-bcmring/include/mach/hardware.h
@@ -22,7 +22,6 @@
 #define __ASM_ARCH_HARDWARE_H
 #include <asm/sizes.h>
-#include <mach/memory.h>
 #include <cfg_global.h>
 #include <mach/csp/mm_io.h>
@@ -31,7 +30,7 @@
 *  *_SIZE  is the size of the region
 *  *_BASE  is the virtual address
 */
-#define RAM_START               PLAT_PHYS_OFFSET
+#define RAM_START               PHYS_OFFSET
 #define RAM_SIZE                (CFG_GLOBAL_RAM_SIZE-CFG_GLOBAL_RAM_SIZE_RESERVED)
 #define RAM_BASE                PAGE_OFFSET
diff --git a/arch/arm/mach-bcmring/include/mach/memory.h b/arch/arm/mach-bcmring/include/mach/memory.h
deleted file mode 100644
index 8848a5bb3445..000000000000
--- a/arch/arm/mach-bcmring/include/mach/memory.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*****************************************************************************
-* Copyright 2005 - 2008 Broadcom Corporation.  All rights reserved.
-*
-* Unless you and Broadcom execute a separate written software license
-* agreement governing use of this software, this software is licensed to you
-* under the terms of the GNU General Public License version 2, available at
-* http://www.broadcom.com/licenses/GPLv2.php (the "GPL").
-*
-* Notwithstanding the above, under no circumstances may you combine this
-* software in any way with any other Broadcom software provided under a
-* license other than the GPL, without Broadcom's express prior written
-* consent.
-*****************************************************************************/
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
-#include <cfg_global.h>
-/*
- * Physical vs virtual RAM address space conversion.  These are
- * private definitions which should NOT be used outside memory.h
- * files.  Use virt_to_phys/phys_to_virt/__pa/__va instead.
- */
-#define PLAT_PHYS_OFFSET CFG_GLOBAL_RAM_BASE
-#endif
diff --git a/arch/arm/mach-clps711x/include/mach/debug-macro.S b/arch/arm/mach-clps711x/include/mach/debug-macro.S
index 507c6873b7ee..b802e8a51831 100644
--- a/arch/arm/mach-clps711x/include/mach/debug-macro.S
+++ b/arch/arm/mach-clps711x/include/mach/debug-macro.S
@@ -14,7 +14,7 @@
 #include <mach/hardware.h>
 #include <asm/hardware/clps7111.h>
-                .macro  addruart, rp, rv
+                .macro  addruart, rp, rv, tmp
 #ifndef CONFIG_DEBUG_CLPS711X_UART2
                mov     \rp, #0x0000    @ UART1
 #else
diff --git a/arch/arm/mach-cns3xxx/include/mach/debug-macro.S b/arch/arm/mach-cns3xxx/include/mach/debug-macro.S
index 56d828634db5..d04c150baa1c 100644
--- a/arch/arm/mach-cns3xxx/include/mach/debug-macro.S
+++ b/arch/arm/mach-cns3xxx/include/mach/debug-macro.S
@@ -10,7 +10,7 @@
 * published by the Free Software Foundation.
 */
-                .macro  addruart,rp,rv
+                .macro  addruart,rp,rv,tmp
                mov     \rp, #0x00009000
                orr     \rv, \rp, #0xf0000000   @ virtual base
                orr     \rp, \rp, #0x10000000
diff --git a/arch/arm/mach-cns3xxx/include/mach/memory.h b/arch/arm/mach-cns3xxx/include/mach/memory.h
deleted file mode 100644
index dc16c5c5d86b..000000000000
--- a/arch/arm/mach-cns3xxx/include/mach/memory.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * Copyright 2003 ARM Limited
- * Copyright 2008 Cavium Networks
- *
- * This file is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License, Version 2, as
- * published by the Free Software Foundation.
- */
-#ifndef __MACH_MEMORY_H
-#define __MACH_MEMORY_H
-/*
- * Physical DRAM offset.
- */
-#define PLAT_PHYS_OFFSET                UL(0x00000000)
-#define __phys_to_bus(x)        ((x) + PHYS_OFFSET)
-#define __bus_to_phys(x)        ((x) - PHYS_OFFSET)
-#define __virt_to_bus(v)        __phys_to_bus(__virt_to_phys(v))
-#define __bus_to_virt(b)        __phys_to_virt(__bus_to_phys(b))
-#define __pfn_to_bus(p)         __phys_to_bus(__pfn_to_phys(p))
-#define __bus_to_pfn(b)         __phys_to_pfn(__bus_to_phys(b))
-#endif
diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile
index 0b87a1ca2bb3..495e31306fc0 100644
--- a/arch/arm/mach-davinci/Makefile
+++ b/arch/arm/mach-davinci/Makefile
@@ -5,7 +5,7 @@
 # Common objects
 obj-y                   := time.o clock.o serial.o io.o psc.o \
-                           gpio.o dma.o usb.o common.o sram.o aemif.o
+                           dma.o usb.o common.o sram.o aemif.o
 obj-$(CONFIG_DAVINCI_MUX)               += mux.o
@@ -17,7 +17,6 @@ obj-$(CONFIG_ARCH_DAVINCI_DM365)	+= dm365.o devices.o
 obj-$(CONFIG_ARCH_DAVINCI_DA830)        += da830.o devices-da8xx.o
 obj-$(CONFIG_ARCH_DAVINCI_DA850)        += da850.o devices-da8xx.o
 obj-$(CONFIG_ARCH_DAVINCI_TNETV107X)    += tnetv107x.o devices-tnetv107x.o
-obj-$(CONFIG_ARCH_DAVINCI_TNETV107X)    += gpio-tnetv107x.o
 obj-$(CONFIG_AINTC)                     += irq.o
 obj-$(CONFIG_CP_INTC)                   += cp_intc.o
diff --git a/arch/arm/mach-davinci/cpuidle.c b/arch/arm/mach-davinci/cpuidle.c
index bd59f31b8a95..0b314bf16f7f 100644
--- a/arch/arm/mach-davinci/cpuidle.c
+++ b/arch/arm/mach-davinci/cpuidle.c
@@ -19,7 +19,7 @@
 #include <asm/proc-fns.h>
 #include <mach/cpuidle.h>
-#include <mach/memory.h>
+#include <mach/ddr2.h>
 #define DAVINCI_CPUIDLE_MAX_STATES      2
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index 2ed2f822fc40..a6bf5dcaef13 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -8,6 +8,7 @@
 * is licensed "as is" without any warranty of any kind, whether express
 * or implied.
 */
+#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/clk.h>
@@ -19,7 +20,7 @@
 #include <mach/common.h>
 #include <mach/time.h>
 #include <mach/da8xx.h>
-#include <mach/gpio.h>
+#include <mach/gpio-davinci.h>
 #include "clock.h"
 #include "mux.h"
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 935dbed5c541..4aae01576aab 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -11,6 +11,7 @@
 * is licensed "as is" without any warranty of any kind, whether express
 * or implied.
 */
+#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/clk.h>
 #include <linux/platform_device.h>
@@ -27,7 +28,7 @@
 #include <mach/da8xx.h>
 #include <mach/cpufreq.h>
 #include <mach/pm.h>
-#include <mach/gpio.h>
+#include <mach/gpio-davinci.h>
 #include "clock.h"
 #include "mux.h"
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 68fb18162459..fe520d4167a2 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -13,7 +13,6 @@
 #include <linux/serial_8250.h>
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
-#include <linux/gpio.h>
 #include <linux/spi/spi.h>
@@ -30,6 +29,7 @@
 #include <mach/common.h>
 #include <mach/asp.h>
 #include <mach/spi.h>
+#include <mach/gpio-davinci.h>
 #include "clock.h"
 #include "mux.h"
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 4604e72d7d99..679e168dce34 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -17,7 +17,6 @@
 #include <linux/serial_8250.h>
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
-#include <linux/gpio.h>
 #include <linux/spi/spi.h>
 #include <asm/mach/map.h>
@@ -34,7 +33,7 @@
 #include <mach/asp.h>
 #include <mach/keyscan.h>
 #include <mach/spi.h>
+#include <mach/gpio-davinci.h>
 #include "clock.h"
 #include "mux.h"
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 555ff5bdb220..3470983aa343 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -12,7 +12,6 @@
 #include <linux/clk.h>
 #include <linux/serial_8250.h>
 #include <linux/platform_device.h>
-#include <linux/gpio.h>
 #include <asm/mach/map.h>
@@ -26,6 +25,7 @@
 #include <mach/serial.h>
 #include <mach/common.h>
 #include <mach/asp.h>
+#include <mach/gpio-davinci.h>
 #include "clock.h"
 #include "mux.h"
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index b0c350a02484..0b68ed534f8e 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -13,7 +13,6 @@
 #include <linux/clk.h>
 #include <linux/serial_8250.h>
 #include <linux/platform_device.h>
-#include <linux/gpio.h>
 #include <asm/mach/map.h>
@@ -27,6 +26,7 @@
 #include <mach/serial.h>
 #include <mach/common.h>
 #include <mach/asp.h>
+#include <mach/gpio-davinci.h>
 #include "clock.h"
 #include "mux.h"
diff --git a/arch/arm/mach-davinci/gpio-tnetv107x.c b/arch/arm/mach-davinci/gpio-tnetv107x.c
deleted file mode 100644
index 3fa3e2867e19..000000000000
--- a/arch/arm/mach-davinci/gpio-tnetv107x.c
+++ /dev/null
@@ -1,205 +0,0 @@
-/*
- * Texas Instruments TNETV107X GPIO Controller
- *
- * Copyright (C) 2010 Texas Instruments
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation version 2.
- *
- * This program is distributed "as is" WITHOUT ANY WARRANTY of any
- * kind, whether express or implied; without even the implied warranty
- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/gpio.h>
-#include <mach/common.h>
-#include <mach/tnetv107x.h>
-struct tnetv107x_gpio_regs {
-        u32     idver;
-        u32     data_in[3];
-        u32     data_out[3];
-        u32     direction[3];
-        u32     enable[3];
-};
-#define gpio_reg_index(gpio)    ((gpio) >> 5)
-#define gpio_reg_bit(gpio)      BIT((gpio) & 0x1f)
-#define gpio_reg_rmw(reg, mask, val)    \
-        __raw_writel((__raw_readl(reg) & ~(mask)) | (val), (reg))
-#define gpio_reg_set_bit(reg, gpio)     \
-        gpio_reg_rmw((reg) + gpio_reg_index(gpio), 0, gpio_reg_bit(gpio))
-#define gpio_reg_clear_bit(reg, gpio)   \
-        gpio_reg_rmw((reg) + gpio_reg_index(gpio), gpio_reg_bit(gpio), 0)
-#define gpio_reg_get_bit(reg, gpio)     \
-        (__raw_readl((reg) + gpio_reg_index(gpio)) & gpio_reg_bit(gpio))
-#define chip2controller(chip)           \
-        container_of(chip, struct davinci_gpio_controller, chip)
-#define TNETV107X_GPIO_CTLRS    DIV_ROUND_UP(TNETV107X_N_GPIO, 32)
-static struct davinci_gpio_controller chips[TNETV107X_GPIO_CTLRS];
-static int tnetv107x_gpio_request(struct gpio_chip *chip, unsigned offset)
-{
-        struct davinci_gpio_controller *ctlr = chip2controller(chip);
-        struct tnetv107x_gpio_regs __iomem *regs = ctlr->regs;
-        unsigned gpio = chip->base + offset;
-        unsigned long flags;
-        spin_lock_irqsave(&ctlr->lock, flags);
-        gpio_reg_set_bit(regs->enable, gpio);
-        spin_unlock_irqrestore(&ctlr->lock, flags);
-        return 0;
-}
-static void tnetv107x_gpio_free(struct gpio_chip *chip, unsigned offset)
-{
-        struct davinci_gpio_controller *ctlr = chip2controller(chip);
-        struct tnetv107x_gpio_regs __iomem *regs = ctlr->regs;
-        unsigned gpio = chip->base + offset;
-        unsigned long flags;
-        spin_lock_irqsave(&ctlr->lock, flags);
-        gpio_reg_clear_bit(regs->enable, gpio);
-        spin_unlock_irqrestore(&ctlr->lock, flags);
-}
-static int tnetv107x_gpio_dir_in(struct gpio_chip *chip, unsigned offset)
-{
-        struct davinci_gpio_controller *ctlr = chip2controller(chip);
-        struct tnetv107x_gpio_regs __iomem *regs = ctlr->regs;
-        unsigned gpio = chip->base + offset;
-        unsigned long flags;
-        spin_lock_irqsave(&ctlr->lock, flags);
-        gpio_reg_set_bit(regs->direction, gpio);
-        spin_unlock_irqrestore(&ctlr->lock, flags);
-        return 0;
-}
-static int tnetv107x_gpio_dir_out(struct gpio_chip *chip,
-                unsigned offset, int value)
-{
-        struct davinci_gpio_controller *ctlr = chip2controller(chip);
-        struct tnetv107x_gpio_regs __iomem *regs = ctlr->regs;
-        unsigned gpio = chip->base + offset;
-        unsigned long flags;
-        spin_lock_irqsave(&ctlr->lock, flags);
-        if (value)
-                gpio_reg_set_bit(regs->data_out, gpio);
-        else
-                gpio_reg_clear_bit(regs->data_out, gpio);
-        gpio_reg_clear_bit(regs->direction, gpio);
-        spin_unlock_irqrestore(&ctlr->lock, flags);
-        return 0;
-}
-static int tnetv107x_gpio_get(struct gpio_chip *chip, unsigned offset)
-{
-        struct davinci_gpio_controller *ctlr = chip2controller(chip);
-        struct tnetv107x_gpio_regs __iomem *regs = ctlr->regs;
-        unsigned gpio = chip->base + offset;
-        int ret;
-        ret = gpio_reg_get_bit(regs->data_in, gpio);
-        return ret ? 1 : 0;
-}
-static void tnetv107x_gpio_set(struct gpio_chip *chip,
-                unsigned offset, int value)
-{
-        struct davinci_gpio_controller *ctlr = chip2controller(chip);
-        struct tnetv107x_gpio_regs __iomem *regs = ctlr->regs;
-        unsigned gpio = chip->base + offset;
-        unsigned long flags;
-        spin_lock_irqsave(&ctlr->lock, flags);
-        if (value)
-                gpio_reg_set_bit(regs->data_out, gpio);
-        else
-                gpio_reg_clear_bit(regs->data_out, gpio);
-        spin_unlock_irqrestore(&ctlr->lock, flags);
-}
-static int __init tnetv107x_gpio_setup(void)
-{
-        int i, base;
-        unsigned ngpio;
-        struct davinci_soc_info *soc_info = &davinci_soc_info;
-        struct tnetv107x_gpio_regs *regs;
-        struct davinci_gpio_controller *ctlr;
-        if (soc_info->gpio_type != GPIO_TYPE_TNETV107X)
-                return 0;
-        ngpio = soc_info->gpio_num;
-        if (ngpio == 0) {
-                pr_err("GPIO setup:  how many GPIOs?\n");
-                return -EINVAL;
-        }
-        if (WARN_ON(TNETV107X_N_GPIO < ngpio))
-                ngpio = TNETV107X_N_GPIO;
-        regs = ioremap(soc_info->gpio_base, SZ_4K);
-        if (WARN_ON(!regs))
-                return -EINVAL;
-        for (i = 0, base = 0; base < ngpio; i++, base += 32) {
-                ctlr = &chips[i];
-                ctlr->chip.label        = "tnetv107x";
-                ctlr->chip.can_sleep    = 0;
-                ctlr->chip.base         = base;
-                ctlr->chip.ngpio        = ngpio - base;
-                if (ctlr->chip.ngpio > 32)
-                        ctlr->chip.ngpio = 32;
-                ctlr->chip.request              = tnetv107x_gpio_request;
-                ctlr->chip.free                 = tnetv107x_gpio_free;
-                ctlr->chip.direction_input      = tnetv107x_gpio_dir_in;
-                ctlr->chip.get                  = tnetv107x_gpio_get;
-                ctlr->chip.direction_output     = tnetv107x_gpio_dir_out;
-                ctlr->chip.set                  = tnetv107x_gpio_set;
-                spin_lock_init(&ctlr->lock);
-                ctlr->regs      = regs;
-                ctlr->set_data  = &regs->data_out[i];
-                ctlr->clr_data  = &regs->data_out[i];
-                ctlr->in_data   = &regs->data_in[i];
-                gpiochip_add(&ctlr->chip);
-        }
-        soc_info->gpio_ctlrs = chips;
-        soc_info->gpio_ctlrs_num = DIV_ROUND_UP(ngpio, 32);
-        return 0;
-}
-pure_initcall(tnetv107x_gpio_setup);
diff --git a/arch/arm/mach-davinci/gpio.c b/arch/arm/mach-davinci/gpio.c
deleted file mode 100644
index cafbe13a82a5..000000000000
--- a/arch/arm/mach-davinci/gpio.c
+++ /dev/null
@@ -1,460 +0,0 @@
-/*
- * TI DaVinci GPIO Support
- *
- * Copyright (c) 2006-2007 David Brownell
- * Copyright (c) 2007, MontaVista Software, Inc. <source@mvista.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-#include <linux/errno.h>
-#include <linux/kernel.h>
-#include <linux/clk.h>
-#include <linux/err.h>
-#include <linux/io.h>
-#include <mach/gpio.h>
-#include <asm/mach/irq.h>
-struct davinci_gpio_regs {
-        u32     dir;
-        u32     out_data;
-        u32     set_data;
-        u32     clr_data;
-        u32     in_data;
-        u32     set_rising;
-        u32     clr_rising;
-        u32     set_falling;
-        u32     clr_falling;
-        u32     intstat;
-};
-#define chip2controller(chip)   \
-        container_of(chip, struct davinci_gpio_controller, chip)
-static struct davinci_gpio_controller chips[DIV_ROUND_UP(DAVINCI_N_GPIO, 32)];
-static void __iomem *gpio_base;
-static struct davinci_gpio_regs __iomem __init *gpio2regs(unsigned gpio)
-{
-        void __iomem *ptr;
-        if (gpio < 32 * 1)
-                ptr = gpio_base + 0x10;
-        else if (gpio < 32 * 2)
-                ptr = gpio_base + 0x38;
-        else if (gpio < 32 * 3)
-                ptr = gpio_base + 0x60;
-        else if (gpio < 32 * 4)
-                ptr = gpio_base + 0x88;
-        else if (gpio < 32 * 5)
-                ptr = gpio_base + 0xb0;
-        else
-                ptr = NULL;
-        return ptr;
-}
-static inline struct davinci_gpio_regs __iomem *irq2regs(int irq)
-{
-        struct davinci_gpio_regs __iomem *g;
-        g = (__force struct davinci_gpio_regs __iomem *)irq_get_chip_data(irq);
-        return g;
-}
-static int __init davinci_gpio_irq_setup(void);
-/*--------------------------------------------------------------------------*/
-/* board setup code *MUST* setup pinmux and enable the GPIO clock. */
-static inline int __davinci_direction(struct gpio_chip *chip,
-                        unsigned offset, bool out, int value)
-{
-        struct davinci_gpio_controller *d = chip2controller(chip);
-        struct davinci_gpio_regs __iomem *g = d->regs;
-        unsigned long flags;
-        u32 temp;
-        u32 mask = 1 << offset;
-        spin_lock_irqsave(&d->lock, flags);
-        temp = __raw_readl(&g->dir);
-        if (out) {
-                temp &= ~mask;
-                __raw_writel(mask, value ? &g->set_data : &g->clr_data);
-        } else {
-                temp |= mask;
-        }
-        __raw_writel(temp, &g->dir);
-        spin_unlock_irqrestore(&d->lock, flags);
-        return 0;
-}
-static int davinci_direction_in(struct gpio_chip *chip, unsigned offset)
-{
-        return __davinci_direction(chip, offset, false, 0);
-}
-static int
-davinci_direction_out(struct gpio_chip *chip, unsigned offset, int value)
-{
-        return __davinci_direction(chip, offset, true, value);
-}
-/*
- * Read the pin's value (works even if it's set up as output);
- * returns zero/nonzero.
- *
- * Note that changes are synched to the GPIO clock, so reading values back
- * right after you've set them may give old values.
- */
-static int davinci_gpio_get(struct gpio_chip *chip, unsigned offset)
-{
-        struct davinci_gpio_controller *d = chip2controller(chip);
-        struct davinci_gpio_regs __iomem *g = d->regs;
-        return (1 << offset) & __raw_readl(&g->in_data);
-}
-/*
- * Assuming the pin is muxed as a gpio output, set its output value.
- */
-static void
-davinci_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
-{
-        struct davinci_gpio_controller *d = chip2controller(chip);
-        struct davinci_gpio_regs __iomem *g = d->regs;
-        __raw_writel((1 << offset), value ? &g->set_data : &g->clr_data);
-}
-static int __init davinci_gpio_setup(void)
-{
-        int i, base;
-        unsigned ngpio;
-        struct davinci_soc_info *soc_info = &davinci_soc_info;
-        struct davinci_gpio_regs *regs;
-        if (soc_info->gpio_type != GPIO_TYPE_DAVINCI)
-                return 0;
-        /*
-         * The gpio banks conceptually expose a segmented bitmap,
-         * and "ngpio" is one more than the largest zero-based
-         * bit index that's valid.
-         */
-        ngpio = soc_info->gpio_num;
-        if (ngpio == 0) {
-                pr_err("GPIO setup:  how many GPIOs?\n");
-                return -EINVAL;
-        }
-        if (WARN_ON(DAVINCI_N_GPIO < ngpio))
-                ngpio = DAVINCI_N_GPIO;
-        gpio_base = ioremap(soc_info->gpio_base, SZ_4K);
-        if (WARN_ON(!gpio_base))
-                return -ENOMEM;
-        for (i = 0, base = 0; base < ngpio; i++, base += 32) {
-                chips[i].chip.label = "DaVinci";
-                chips[i].chip.direction_input = davinci_direction_in;
-                chips[i].chip.get = davinci_gpio_get;
-                chips[i].chip.direction_output = davinci_direction_out;
-                chips[i].chip.set = davinci_gpio_set;
-                chips[i].chip.base = base;
-                chips[i].chip.ngpio = ngpio - base;
-                if (chips[i].chip.ngpio > 32)
-                        chips[i].chip.ngpio = 32;
-                spin_lock_init(&chips[i].lock);
-                regs = gpio2regs(base);
-                chips[i].regs = regs;
-                chips[i].set_data = &regs->set_data;
-                chips[i].clr_data = &regs->clr_data;
-                chips[i].in_data = &regs->in_data;
-                gpiochip_add(&chips[i].chip);
-        }
-        soc_info->gpio_ctlrs = chips;
-        soc_info->gpio_ctlrs_num = DIV_ROUND_UP(ngpio, 32);
-        davinci_gpio_irq_setup();
-        return 0;
-}
-pure_initcall(davinci_gpio_setup);
-/*--------------------------------------------------------------------------*/
-/*
- * We expect irqs will normally be set up as input pins, but they can also be
- * used as output pins ... which is convenient for testing.
- *
- * NOTE:  The first few GPIOs also have direct INTC hookups in addition
- * to their GPIOBNK0 irq, with a bit less overhead.
- *
- * All those INTC hookups (direct, plus several IRQ banks) can also
- * serve as EDMA event triggers.
- */
-static void gpio_irq_disable(struct irq_data *d)
-{
-        struct davinci_gpio_regs __iomem *g = irq2regs(d->irq);
-        u32 mask = (u32) irq_data_get_irq_handler_data(d);
-        __raw_writel(mask, &g->clr_falling);
-        __raw_writel(mask, &g->clr_rising);
-}
-static void gpio_irq_enable(struct irq_data *d)
-{
-        struct davinci_gpio_regs __iomem *g = irq2regs(d->irq);
-        u32 mask = (u32) irq_data_get_irq_handler_data(d);
-        unsigned status = irqd_get_trigger_type(d);
-        status &= IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING;
-        if (!status)
-                status = IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING;
-        if (status & IRQ_TYPE_EDGE_FALLING)
-                __raw_writel(mask, &g->set_falling);
-        if (status & IRQ_TYPE_EDGE_RISING)
-                __raw_writel(mask, &g->set_rising);
-}
-static int gpio_irq_type(struct irq_data *d, unsigned trigger)
-{
-        struct davinci_gpio_regs __iomem *g = irq2regs(d->irq);
-        u32 mask = (u32) irq_data_get_irq_handler_data(d);
-        if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
-                return -EINVAL;
-        return 0;
-}
-static struct irq_chip gpio_irqchip = {
-        .name           = "GPIO",
-        .irq_enable     = gpio_irq_enable,
-        .irq_disable    = gpio_irq_disable,
-        .irq_set_type   = gpio_irq_type,
-        .flags          = IRQCHIP_SET_TYPE_MASKED,
-};
-static void
-gpio_irq_handler(unsigned irq, struct irq_desc *desc)
-{
-        struct davinci_gpio_regs __iomem *g;
-        u32 mask = 0xffff;
-        struct davinci_gpio_controller *d;
-        d = (struct davinci_gpio_controller *)irq_desc_get_handler_data(desc);
-        g = (struct davinci_gpio_regs __iomem *)d->regs;
-        /* we only care about one bank */
-        if (irq & 1)
-                mask <<= 16;
-        /* temporarily mask (level sensitive) parent IRQ */
-        desc->irq_data.chip->irq_mask(&desc->irq_data);
-        desc->irq_data.chip->irq_ack(&desc->irq_data);
-        while (1) {
-                u32             status;
-                int             n;
-                int             res;
-                /* ack any irqs */
-                status = __raw_readl(&g->intstat) & mask;
-                if (!status)
-                        break;
-                __raw_writel(status, &g->intstat);
-                /* now demux them to the right lowlevel handler */
-                n = d->irq_base;
-                if (irq & 1) {
-                        n += 16;
-                        status >>= 16;
-                }
-                while (status) {
-                        res = ffs(status);
-                        n += res;
-                        generic_handle_irq(n - 1);
-                        status >>= res;
-                }
-        }
-        desc->irq_data.chip->irq_unmask(&desc->irq_data);
-        /* now it may re-trigger */
-}
-static int gpio_to_irq_banked(struct gpio_chip *chip, unsigned offset)
-{
-        struct davinci_gpio_controller *d = chip2controller(chip);
-        if (d->irq_base >= 0)
-                return d->irq_base + offset;
-        else
-                return -ENODEV;
-}
-static int gpio_to_irq_unbanked(struct gpio_chip *chip, unsigned offset)
-{
-        struct davinci_soc_info *soc_info = &davinci_soc_info;
-        /* NOTE:  we assume for now that only irqs in the first gpio_chip
-         * can provide direct-mapped IRQs to AINTC (up to 32 GPIOs).
-         */
-        if (offset < soc_info->gpio_unbanked)
-                return soc_info->gpio_irq + offset;
-        else
-                return -ENODEV;
-}
-static int gpio_irq_type_unbanked(struct irq_data *d, unsigned trigger)
-{
-        struct davinci_gpio_regs __iomem *g = irq2regs(d->irq);
-        u32 mask = (u32) irq_data_get_irq_handler_data(d);
-        if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
-                return -EINVAL;
-        __raw_writel(mask, (trigger & IRQ_TYPE_EDGE_FALLING)
-                     ? &g->set_falling : &g->clr_falling);
-        __raw_writel(mask, (trigger & IRQ_TYPE_EDGE_RISING)
-                     ? &g->set_rising : &g->clr_rising);
-        return 0;
-}
-/*
- * NOTE:  for suspend/resume, probably best to make a platform_device with
- * suspend_late/resume_resume calls hooking into results of the set_wake()
- * calls ... so if no gpios are wakeup events the clock can be disabled,
- * with outputs left at previously set levels, and so that VDD3P3V.IOPWDN0
- * (dm6446) can be set appropriately for GPIOV33 pins.
- */
-static int __init davinci_gpio_irq_setup(void)
-{
-        unsigned        gpio, irq, bank;
-        struct clk      *clk;
-        u32             binten = 0;
-        unsigned        ngpio, bank_irq;
-        struct davinci_soc_info *soc_info = &davinci_soc_info;
-        struct davinci_gpio_regs        __iomem *g;
-        ngpio = soc_info->gpio_num;
-        bank_irq = soc_info->gpio_irq;
-        if (bank_irq == 0) {
-                printk(KERN_ERR "Don't know first GPIO bank IRQ.\n");
-                return -EINVAL;
-        }
-        clk = clk_get(NULL, "gpio");
-        if (IS_ERR(clk)) {
-                printk(KERN_ERR "Error %ld getting gpio clock?\n",
-                       PTR_ERR(clk));
-                return PTR_ERR(clk);
-        }
-        clk_enable(clk);
-        /* Arrange gpio_to_irq() support, handling either direct IRQs or
-         * banked IRQs.  Having GPIOs in the first GPIO bank use direct
-         * IRQs, while the others use banked IRQs, would need some setup
-         * tweaks to recognize hardware which can do that.
-         */
-        for (gpio = 0, bank = 0; gpio < ngpio; bank++, gpio += 32) {
-                chips[bank].chip.to_irq = gpio_to_irq_banked;
-                chips[bank].irq_base = soc_info->gpio_unbanked
-                        ? -EINVAL
-                        : (soc_info->intc_irq_num + gpio);
-        }
-        /*
-         * AINTC can handle direct/unbanked IRQs for GPIOs, with the GPIO
-         * controller only handling trigger modes.  We currently assume no
-         * IRQ mux conflicts; gpio_irq_type_unbanked() is only for GPIOs.
-         */
-        if (soc_info->gpio_unbanked) {
-                static struct irq_chip gpio_irqchip_unbanked;
-                /* pass "bank 0" GPIO IRQs to AINTC */
-                chips[0].chip.to_irq = gpio_to_irq_unbanked;
-                binten = BIT(0);
-                /* AINTC handles mask/unmask; GPIO handles triggering */
-                irq = bank_irq;
-                gpio_irqchip_unbanked = *irq_get_chip(irq);
-                gpio_irqchip_unbanked.name = "GPIO-AINTC";
-                gpio_irqchip_unbanked.irq_set_type = gpio_irq_type_unbanked;
-                /* default trigger: both edges */
-                g = gpio2regs(0);
-                __raw_writel(~0, &g->set_falling);
-                __raw_writel(~0, &g->set_rising);
-                /* set the direct IRQs up to use that irqchip */
-                for (gpio = 0; gpio < soc_info->gpio_unbanked; gpio++, irq++) {
-                        irq_set_chip(irq, &gpio_irqchip_unbanked);
-                        irq_set_handler_data(irq, (void *)__gpio_mask(gpio));
-                        irq_set_chip_data(irq, (__force void *)g);
-                        irq_set_status_flags(irq, IRQ_TYPE_EDGE_BOTH);
-                }
-                goto done;
-        }
-        /*
-         * Or, AINTC can handle IRQs for banks of 16 GPIO IRQs, which we
-         * then chain through our own handler.
-         */
-        for (gpio = 0, irq = gpio_to_irq(0), bank = 0;
-                        gpio < ngpio;
-                        bank++, bank_irq++) {
-                unsigned                i;
-                /* disabled by default, enabled only as needed */
-                g = gpio2regs(gpio);
-                __raw_writel(~0, &g->clr_falling);
-                __raw_writel(~0, &g->clr_rising);
-                /* set up all irqs in this bank */
-                irq_set_chained_handler(bank_irq, gpio_irq_handler);
-                /*
-                 * Each chip handles 32 gpios, and each irq bank consists of 16
-                 * gpio irqs. Pass the irq bank's corresponding controller to
-                 * the chained irq handler.
-                 */
-                irq_set_handler_data(bank_irq, &chips[gpio / 32]);
-                for (i = 0; i < 16 && gpio < ngpio; i++, irq++, gpio++) {
-                        irq_set_chip(irq, &gpio_irqchip);
-                        irq_set_chip_data(irq, (__force void *)g);
-                        irq_set_handler_data(irq, (void *)__gpio_mask(gpio));
-                        irq_set_handler(irq, handle_simple_irq);
-                        set_irq_flags(irq, IRQF_VALID);
-                }
-                binten |= BIT(bank);
-        }
-done:
-        /* BINTEN -- per-bank interrupt enable. genirq would also let these
-         * bits be set/cleared dynamically.
-         */
-        __raw_writel(binten, gpio_base + 0x08);
-        printk(KERN_INFO "DaVinci: %d gpio irqs\n", irq - gpio_to_irq(0));
-        return 0;
-}
diff --git a/arch/arm/mach-davinci/include/mach/ddr2.h b/arch/arm/mach-davinci/include/mach/ddr2.h
new file mode 100644
index 000000000000..c19e047d0e6a
--- /dev/null
+++ b/arch/arm/mach-davinci/include/mach/ddr2.h
@@ -0,0 +1,4 @@
+#define DDR2_SDRCR_OFFSET       0xc
+#define DDR2_SRPD_BIT           (1 << 23)
+#define DDR2_MCLKSTOPEN_BIT     (1 << 30)
+#define DDR2_LPMODEN_BIT        (1 << 31)
diff --git a/arch/arm/mach-davinci/include/mach/debug-macro.S b/arch/arm/mach-davinci/include/mach/debug-macro.S
index f8b7ea4f6235..cf94552d5274 100644
--- a/arch/arm/mach-davinci/include/mach/debug-macro.S
+++ b/arch/arm/mach-davinci/include/mach/debug-macro.S
@@ -18,56 +18,50 @@
 #include <linux/serial_reg.h>
-#include <asm/memory.h>
 #include <mach/serial.h>
 #define UART_SHIFT      2
-#define davinci_uart_v2p(x)     ((x) - PAGE_OFFSET + PLAT_PHYS_OFFSET)
-#define davinci_uart_p2v(x)     ((x) - PLAT_PHYS_OFFSET + PAGE_OFFSET)
                .pushsection .data
 davinci_uart_phys:      .word   0
 davinci_uart_virt:      .word   0
                .popsection
-                .macro addruart, rp, rv
+                .macro addruart, rp, rv, tmp
                /* Use davinci_uart_phys/virt if already configured */
-10:             mrc     p15, 0, \rp, c1, c0
+10:             adr     \rp, 99f                @ get effective addr of 99f
-                tst     \rp, #1                 @ MMU enabled?
+                ldr     \rv, [\rp]              @ get absolute addr of 99f
-                ldreq   \rp, =davinci_uart_v2p(davinci_uart_phys)
+                sub     \rv, \rv, \rp           @ offset between the two
-                ldrne   \rp, =davinci_uart_phys
+                ldr     \rp, [\rp, #4]          @ abs addr of omap_uart_phys
-                add     \rv, \rp, #4            @ davinci_uart_virt
+                sub     \tmp, \rp, \rv          @ make it effective
-                ldr     \rp, [\rp, #0]
+                ldr     \rp, [\tmp, #0]         @ davinci_uart_phys
-                ldr     \rv, [\rv, #0]
+                ldr     \rv, [\tmp, #4]         @ davinci_uart_virt
                cmp     \rp, #0                 @ is port configured?
                cmpne   \rv, #0
-                bne     99f                     @ already configured
+                bne     100f                    @ already configured
                /* Check the debug UART address set in uncompress.h */
-                mrc     p15, 0, \rp, c1, c0
+                and     \rp, pc, #0xff000000
-                tst     \rp, #1                 @ MMU enabled?
+                ldr     \rv, =DAVINCI_UART_INFO_OFS
+                add     \rp, \rp, \rv
                /* Copy uart phys address from decompressor uart info */
-                ldreq   \rv, =davinci_uart_v2p(davinci_uart_phys)
+                ldr     \rv, [\rp, #0]
-                ldrne   \rv, =davinci_uart_phys
+                str     \rv, [\tmp, #0]
-                ldreq   \rp, =DAVINCI_UART_INFO
-                ldrne   \rp, =davinci_uart_p2v(DAVINCI_UART_INFO)
-                ldr     \rp, [\rp, #0]
-                str     \rp, [\rv]
                /* Copy uart virt address from decompressor uart info */
-                ldreq   \rv, =davinci_uart_v2p(davinci_uart_virt)
+                ldr     \rv, [\rp, #4]
-                ldrne   \rv, =davinci_uart_virt
+                str     \rv, [\tmp, #4]
-                ldreq   \rp, =DAVINCI_UART_INFO
-                ldrne   \rp, =davinci_uart_p2v(DAVINCI_UART_INFO)
-                ldr     \rp, [\rp, #4]
-                str     \rp, [\rv]
                b       10b
-99:
+                .align
+99:             .word   .
+                .word   davinci_uart_phys
+                .ltorg
+100:
                .endm
                .macro  senduart,rd,rx
diff --git a/arch/arm/mach-davinci/include/mach/gpio-davinci.h b/arch/arm/mach-davinci/include/mach/gpio-davinci.h
new file mode 100644
index 000000000000..1fdd1fd35448
--- /dev/null
+++ b/arch/arm/mach-davinci/include/mach/gpio-davinci.h
@@ -0,0 +1,91 @@
+/*
+ * TI DaVinci GPIO Support
+ *
+ * Copyright (c) 2006 David Brownell
+ * Copyright (c) 2007, MontaVista Software, Inc. <source@mvista.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+#ifndef __DAVINCI_DAVINCI_GPIO_H
+#define __DAVINCI_DAVINCI_GPIO_H
+#include <linux/io.h>
+#include <linux/spinlock.h>
+#include <asm-generic/gpio.h>
+#include <mach/irqs.h>
+#include <mach/common.h>
+#define DAVINCI_GPIO_BASE 0x01C67000
+enum davinci_gpio_type {
+        GPIO_TYPE_DAVINCI = 0,
+        GPIO_TYPE_TNETV107X,
+};
+/*
+ * basic gpio routines
+ *
+ * board-specific init should be done by arch/.../.../board-XXX.c (maybe
+ * initializing banks together) rather than boot loaders; kexec() won't
+ * go through boot loaders.
+ *
+ * the gpio clock will be turned on when gpios are used, and you may also
+ * need to pay attention to PINMUX registers to be sure those pins are
+ * used as gpios, not with other peripherals.
+ *
+ * On-chip GPIOs are numbered 0..(DAVINCI_N_GPIO-1).  For documentation,
+ * and maybe for later updates, code may write GPIO(N).  These may be
+ * all 1.8V signals, all 3.3V ones, or a mix of the two.  A given chip
+ * may not support all the GPIOs in that range.
+ *
+ * GPIOs can also be on external chips, numbered after the ones built-in
+ * to the DaVinci chip.  For now, they won't be usable as IRQ sources.
+ */
+#define GPIO(X)         (X)             /* 0 <= X <= (DAVINCI_N_GPIO - 1) */
+/* Convert GPIO signal to GPIO pin number */
+#define GPIO_TO_PIN(bank, gpio) (16 * (bank) + (gpio))
+struct davinci_gpio_controller {
+        struct gpio_chip        chip;
+        int                     irq_base;
+        spinlock_t              lock;
+        void __iomem            *regs;
+        void __iomem            *set_data;
+        void __iomem            *clr_data;
+        void __iomem            *in_data;
+};
+/* The __gpio_to_controller() and __gpio_mask() functions inline to constants
+ * with constant parameters; or in outlined code they execute at runtime.
+ *
+ * You'd access the controller directly when reading or writing more than
+ * one gpio value at a time, and to support wired logic where the value
+ * being driven by the cpu need not match the value read back.
+ *
+ * These are NOT part of the cross-platform GPIO interface
+ */
+static inline struct davinci_gpio_controller *
+__gpio_to_controller(unsigned gpio)
+{
+        struct davinci_gpio_controller *ctlrs = davinci_soc_info.gpio_ctlrs;
+        int index = gpio / 32;
+        if (!ctlrs || index >= davinci_soc_info.gpio_ctlrs_num)
+                return NULL;
+        return ctlrs + index;
+}
+static inline u32 __gpio_mask(unsigned gpio)
+{
+        return 1 << (gpio % 32);
+}
+#endif  /* __DAVINCI_DAVINCI_GPIO_H */
diff --git a/arch/arm/mach-davinci/include/mach/gpio.h b/arch/arm/mach-davinci/include/mach/gpio.h
index fbece126c2bf..fbaae4772b91 100644
--- a/arch/arm/mach-davinci/include/mach/gpio.h
+++ b/arch/arm/mach-davinci/include/mach/gpio.h
@@ -13,80 +13,10 @@
 #ifndef __DAVINCI_GPIO_H
 #define __DAVINCI_GPIO_H
-#include <linux/io.h>
-#include <linux/spinlock.h>
 #include <asm-generic/gpio.h>
-#include <mach/irqs.h>
+/* The inline versions use the static inlines in the driver header */
-#include <mach/common.h>
+#include "gpio-davinci.h"
-#define DAVINCI_GPIO_BASE 0x01C67000
-enum davinci_gpio_type {
-        GPIO_TYPE_DAVINCI = 0,
-        GPIO_TYPE_TNETV107X,
-};
-/*
- * basic gpio routines
- *
- * board-specific init should be done by arch/.../.../board-XXX.c (maybe
- * initializing banks together) rather than boot loaders; kexec() won't
- * go through boot loaders.
- *
- * the gpio clock will be turned on when gpios are used, and you may also
- * need to pay attention to PINMUX registers to be sure those pins are
- * used as gpios, not with other peripherals.
- *
- * On-chip GPIOs are numbered 0..(DAVINCI_N_GPIO-1).  For documentation,
- * and maybe for later updates, code may write GPIO(N).  These may be
- * all 1.8V signals, all 3.3V ones, or a mix of the two.  A given chip
- * may not support all the GPIOs in that range.
- *
- * GPIOs can also be on external chips, numbered after the ones built-in
- * to the DaVinci chip.  For now, they won't be usable as IRQ sources.
- */
-#define GPIO(X)         (X)             /* 0 <= X <= (DAVINCI_N_GPIO - 1) */
-/* Convert GPIO signal to GPIO pin number */
-#define GPIO_TO_PIN(bank, gpio) (16 * (bank) + (gpio))
-struct davinci_gpio_controller {
-        struct gpio_chip        chip;
-        int                     irq_base;
-        spinlock_t              lock;
-        void __iomem            *regs;
-        void __iomem            *set_data;
-        void __iomem            *clr_data;
-        void __iomem            *in_data;
-};
-/* The __gpio_to_controller() and __gpio_mask() functions inline to constants
- * with constant parameters; or in outlined code they execute at runtime.
- *
- * You'd access the controller directly when reading or writing more than
- * one gpio value at a time, and to support wired logic where the value
- * being driven by the cpu need not match the value read back.
- *
- * These are NOT part of the cross-platform GPIO interface
- */
-static inline struct davinci_gpio_controller *
-__gpio_to_controller(unsigned gpio)
-{
-        struct davinci_gpio_controller *ctlrs = davinci_soc_info.gpio_ctlrs;
-        int index = gpio / 32;
-        if (!ctlrs || index >= davinci_soc_info.gpio_ctlrs_num)
-                return NULL;
-        return ctlrs + index;
-}
-static inline u32 __gpio_mask(unsigned gpio)
-{
-        return 1 << (gpio % 32);
-}
 /*
 * The get/set/clear functions will inline when called with constant
@@ -147,11 +77,6 @@ static inline int gpio_cansleep(unsigned gpio)
                return __gpio_cansleep(gpio);
 }
-static inline int gpio_to_irq(unsigned gpio)
-{
-        return __gpio_to_irq(gpio);
-}
 static inline int irq_to_gpio(unsigned irq)
 {
        /* don't support the reverse mapping */
diff --git a/arch/arm/mach-davinci/include/mach/memory.h b/arch/arm/mach-davinci/include/mach/memory.h
deleted file mode 100644
index 885d23319668..000000000000
--- a/arch/arm/mach-davinci/include/mach/memory.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
- * DaVinci memory space definitions
- *
- * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
- *
- * 2007 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
-/**************************************************************************
- * Included Files
- **************************************************************************/
-#include <asm/page.h>
-#include <asm/sizes.h>
-/**************************************************************************
- * Definitions
- **************************************************************************/
-#define DAVINCI_DDR_BASE        0x80000000
-#define DA8XX_DDR_BASE          0xc0000000
-#if defined(CONFIG_ARCH_DAVINCI_DA8XX) && defined(CONFIG_ARCH_DAVINCI_DMx)
-#error Cannot enable DaVinci and DA8XX platforms concurrently
-#elif defined(CONFIG_ARCH_DAVINCI_DA8XX)
-#define PLAT_PHYS_OFFSET DA8XX_DDR_BASE
-#else
-#define PLAT_PHYS_OFFSET DAVINCI_DDR_BASE
-#endif
-#define DDR2_SDRCR_OFFSET       0xc
-#define DDR2_SRPD_BIT           BIT(23)
-#define DDR2_MCLKSTOPEN_BIT     BIT(30)
-#define DDR2_LPMODEN_BIT        BIT(31)
-#endif /* __ASM_ARCH_MEMORY_H */
diff --git a/arch/arm/mach-davinci/include/mach/serial.h b/arch/arm/mach-davinci/include/mach/serial.h
index c9e6ce185a66..e347d88fef91 100644
--- a/arch/arm/mach-davinci/include/mach/serial.h
+++ b/arch/arm/mach-davinci/include/mach/serial.h
@@ -21,8 +21,9 @@
 * macros in debug-macro.S.
 *
 * This area sits just below the page tables (see arch/arm/kernel/head.S).
+ * We define it as a relative offset from start of usable RAM.
 */
-#define DAVINCI_UART_INFO       (PLAT_PHYS_OFFSET + 0x3ff8)
+#define DAVINCI_UART_INFO_OFS   0x3ff8
 #define DAVINCI_UART0_BASE      (IO_PHYS + 0x20000)
 #define DAVINCI_UART1_BASE      (IO_PHYS + 0x20400)
diff --git a/arch/arm/mach-davinci/include/mach/uncompress.h b/arch/arm/mach-davinci/include/mach/uncompress.h
index 78d80683cdc2..9dc7cf9664fe 100644
--- a/arch/arm/mach-davinci/include/mach/uncompress.h
+++ b/arch/arm/mach-davinci/include/mach/uncompress.h
@@ -43,7 +43,12 @@ static inline void flush(void)
 static inline void set_uart_info(u32 phys, void * __iomem virt)
 {
-        u32 *uart_info = (u32 *)(DAVINCI_UART_INFO);
+        /*
+         * Get address of some.bss variable and round it down
+         * a la CONFIG_AUTO_ZRELADDR.
+         */
+        u32 ram_start = (u32)&uart & 0xf8000000;
+        u32 *uart_info = (u32 *)(ram_start + DAVINCI_UART_INFO_OFS);
        uart = (u32 *)phys;
        uart_info[0] = phys;
diff --git a/arch/arm/mach-davinci/sleep.S b/arch/arm/mach-davinci/sleep.S
index 5f1e045a3ad1..d4e9316ecacb 100644
--- a/arch/arm/mach-davinci/sleep.S
+++ b/arch/arm/mach-davinci/sleep.S
@@ -22,7 +22,7 @@
 #include <linux/linkage.h>
 #include <asm/assembler.h>
 #include <mach/psc.h>
-#include <mach/memory.h>
+#include <mach/ddr2.h>
 #include "clock.h"
diff --git a/arch/arm/mach-davinci/tnetv107x.c b/arch/arm/mach-davinci/tnetv107x.c
index 1b28fdd892a6..409bb869c7c7 100644
--- a/arch/arm/mach-davinci/tnetv107x.c
+++ b/arch/arm/mach-davinci/tnetv107x.c
@@ -12,6 +12,7 @@
 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/clk.h>
@@ -27,9 +28,9 @@
 #include <mach/psc.h>
 #include <mach/cp_intc.h>
 #include <mach/irqs.h>
-#include <mach/gpio.h>
 #include <mach/hardware.h>
 #include <mach/tnetv107x.h>
+#include <mach/gpio-davinci.h>
 #include "clock.h"
 #include "mux.h"
diff --git a/arch/arm/mach-dove/include/mach/debug-macro.S b/arch/arm/mach-dove/include/mach/debug-macro.S
index da8bf2bad3b1..5929cbc59161 100644
--- a/arch/arm/mach-dove/include/mach/debug-macro.S
+++ b/arch/arm/mach-dove/include/mach/debug-macro.S
@@ -8,7 +8,7 @@
 #include <mach/bridge-regs.h>
-        .macro  addruart, rp, rv
+        .macro  addruart, rp, rv, tmp
        ldr     \rp, =DOVE_SB_REGS_PHYS_BASE
        ldr     \rv, =DOVE_SB_REGS_VIRT_BASE
        orr     \rp, \rp, #0x00012000
diff --git a/arch/arm/mach-dove/include/mach/memory.h b/arch/arm/mach-dove/include/mach/memory.h
deleted file mode 100644
index bbc93fee6c75..000000000000
--- a/arch/arm/mach-dove/include/mach/memory.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/*
- * arch/arm/mach-dove/include/mach/memory.h
- */
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
-#define PLAT_PHYS_OFFSET                UL(0x00000000)
-#endif
diff --git a/arch/arm/mach-ebsa110/include/mach/debug-macro.S b/arch/arm/mach-ebsa110/include/mach/debug-macro.S
index 7ef5690fd08c..bb02c05e6812 100644
--- a/arch/arm/mach-ebsa110/include/mach/debug-macro.S
+++ b/arch/arm/mach-ebsa110/include/mach/debug-macro.S
@@ -11,7 +11,7 @@
 *
 **/
-                .macro  addruart, rp, rv
+                .macro  addruart, rp, rv, tmp
                mov     \rp, #0xf0000000
                orr     \rp, \rp, #0x00000be0
                mov     \rp, \rv
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index c60f081e930b..94c78bc66275 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -38,6 +38,7 @@
 #include <mach/fb.h>
 #include <mach/ep93xx_keypad.h>
 #include <mach/ep93xx_spi.h>
+#include <mach/gpio-ep93xx.h>
 #include <asm/mach/map.h>
 #include <asm/mach/time.h>
diff --git a/arch/arm/mach-ep93xx/edb93xx.c b/arch/arm/mach-ep93xx/edb93xx.c
index 257175edc575..c63a5ec1a8e3 100644
--- a/arch/arm/mach-ep93xx/edb93xx.c
+++ b/arch/arm/mach-ep93xx/edb93xx.c
@@ -37,6 +37,7 @@
 #include <mach/hardware.h>
 #include <mach/fb.h>
 #include <mach/ep93xx_spi.h>
+#include <mach/gpio-ep93xx.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
diff --git a/arch/arm/mach-ep93xx/include/mach/debug-macro.S b/arch/arm/mach-ep93xx/include/mach/debug-macro.S
index b25bc9076367..af54e43132cf 100644
--- a/arch/arm/mach-ep93xx/include/mach/debug-macro.S
+++ b/arch/arm/mach-ep93xx/include/mach/debug-macro.S
@@ -11,7 +11,7 @@
 */
 #include <mach/ep93xx-regs.h>
-                .macro  addruart, rp, rv
+                .macro  addruart, rp, rv, tmp
                ldr     \rp, =EP93XX_APB_PHYS_BASE      @ Physical base
                ldr     \rv, =EP93XX_APB_VIRT_BASE      @ virtual base
                orr     \rp, \rp, #0x000c0000
diff --git a/arch/arm/mach-ep93xx/include/mach/gpio.h b/arch/arm/mach-ep93xx/include/mach/gpio-ep93xx.h
index c57152c231f1..8aff2ea35877 100644
--- a/arch/arm/mach-ep93xx/include/mach/gpio.h
+++ b/arch/arm/mach-ep93xx/include/mach/gpio-ep93xx.h
@@ -1,9 +1,7 @@
-/*
+/* Include file for the EP93XX GPIO controller machine specifics */
- * arch/arm/mach-ep93xx/include/mach/gpio.h
- */
-#ifndef __ASM_ARCH_GPIO_H
+#ifndef __GPIO_EP93XX_H
-#define __ASM_ARCH_GPIO_H
+#define __GPIO_EP93XX_H
 /* GPIO port A.  */
 #define EP93XX_GPIO_LINE_A(x)           ((x) + 0)
@@ -99,22 +97,4 @@
 /* maximum value for irq capable line identifiers */
 #define EP93XX_GPIO_LINE_MAX_IRQ        EP93XX_GPIO_LINE_F(7)
-/* new generic GPIO API - see Documentation/gpio.txt */
+#endif /* __GPIO_EP93XX_H */
-#include <asm-generic/gpio.h>
-#define gpio_get_value  __gpio_get_value
-#define gpio_set_value  __gpio_set_value
-#define gpio_cansleep   __gpio_cansleep
-/*
- * Map GPIO A0..A7  (0..7)  to irq 64..71,
- *          B0..B7  (7..15) to irq 72..79, and
- *          F0..F7 (16..24) to irq 80..87.
- */
-#define gpio_to_irq(gpio)       \
-        (((gpio) <= EP93XX_GPIO_LINE_MAX_IRQ) ? (64 + (gpio)) : -EINVAL)
-#define irq_to_gpio(irq)        ((irq) - gpio_to_irq(0))
-#endif
diff --git a/arch/arm/mach-ep93xx/simone.c b/arch/arm/mach-ep93xx/simone.c
index 238bc603da86..d6f286b4db9c 100644
--- a/arch/arm/mach-ep93xx/simone.c
+++ b/arch/arm/mach-ep93xx/simone.c
@@ -18,12 +18,12 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
-#include <linux/gpio.h>
 #include <linux/i2c.h>
 #include <linux/i2c-gpio.h>
 #include <mach/hardware.h>
 #include <mach/fb.h>
+#include <mach/gpio-ep93xx.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
diff --git a/arch/arm/mach-ep93xx/snappercl15.c b/arch/arm/mach-ep93xx/snappercl15.c
index 3bdf3a2e5ad0..2b4d4b0201df 100644
--- a/arch/arm/mach-ep93xx/snappercl15.c
+++ b/arch/arm/mach-ep93xx/snappercl15.c
@@ -20,7 +20,6 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/io.h>
-#include <linux/gpio.h>
 #include <linux/i2c.h>
 #include <linux/i2c-gpio.h>
 #include <linux/fb.h>
@@ -30,6 +29,7 @@
 #include <mach/hardware.h>
 #include <mach/fb.h>
+#include <mach/gpio-ep93xx.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
diff --git a/arch/arm/mach-exynos4/include/mach/debug-macro.S b/arch/arm/mach-exynos4/include/mach/debug-macro.S
index a442ef861167..6cacf16a67a6 100644
--- a/arch/arm/mach-exynos4/include/mach/debug-macro.S
+++ b/arch/arm/mach-exynos4/include/mach/debug-macro.S
@@ -20,7 +20,7 @@
         * aligned and add in the offset when we load the value here.
         */
-        .macro addruart, rp, rv
+        .macro addruart, rp, rv, tmp
                ldr     \rp, = S3C_PA_UART
                ldr     \rv, = S3C_VA_UART
 #if CONFIG_DEBUG_S3C_UART != 0
diff --git a/arch/arm/mach-exynos4/include/mach/gpio.h b/arch/arm/mach-exynos4/include/mach/gpio.h
index be9266b10fdb..80523ca9bb49 100644
--- a/arch/arm/mach-exynos4/include/mach/gpio.h
+++ b/arch/arm/mach-exynos4/include/mach/gpio.h
@@ -13,11 +13,6 @@
 #ifndef __ASM_ARCH_GPIO_H
 #define __ASM_ARCH_GPIO_H __FILE__
-#define gpio_get_value  __gpio_get_value
-#define gpio_set_value  __gpio_set_value
-#define gpio_cansleep   __gpio_cansleep
-#define gpio_to_irq     __gpio_to_irq
 /* Practically, GPIO banks up to GPZ are the configurable gpio banks */
 /* GPIO bank sizes */
@@ -151,6 +146,4 @@ enum s5p_gpio_number {
 #define ARCH_NR_GPIOS           (EXYNOS4_GPZ(EXYNOS4_GPIO_Z_NR) +       \
                                 CONFIG_SAMSUNG_GPIO_EXTRA + 1)
-#include <asm-generic/gpio.h>
 #endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-footbridge/include/mach/debug-macro.S b/arch/arm/mach-footbridge/include/mach/debug-macro.S
index 1be2eeb7a0a0..e5acde25ffc5 100644
--- a/arch/arm/mach-footbridge/include/mach/debug-macro.S
+++ b/arch/arm/mach-footbridge/include/mach/debug-macro.S
@@ -15,7 +15,7 @@
 #ifndef CONFIG_DEBUG_DC21285_PORT
        /* For NetWinder debugging */
-                .macro  addruart, rp, rv
+                .macro  addruart, rp, rv, tmp
                mov     \rp, #0x000003f8
                orr     \rv, \rp, #0xff000000   @ virtual
                orr     \rp, \rp, #0x7c000000   @ physical
@@ -31,7 +31,7 @@
                .equ    dc21285_high, ARMCSR_BASE & 0xff000000
                .equ    dc21285_low,  ARMCSR_BASE & 0x00ffffff
-                .macro  addruart, rp, rv
+                .macro  addruart, rp, rv, tmp
                .if     dc21285_low
                mov     \rp, #dc21285_low
                .else
diff --git a/arch/arm/mach-gemini/include/mach/debug-macro.S b/arch/arm/mach-gemini/include/mach/debug-macro.S
index f40e006d296e..837670763b85 100644
--- a/arch/arm/mach-gemini/include/mach/debug-macro.S
+++ b/arch/arm/mach-gemini/include/mach/debug-macro.S
@@ -11,7 +11,7 @@
 */
 #include <mach/hardware.h>
-        .macro  addruart, rp, rv
+        .macro  addruart, rp, rv, tmp
        ldr     \rp, =GEMINI_UART_BASE                  @ physical
        ldr     \rv, =IO_ADDRESS(GEMINI_UART_BASE)      @ virtual
        .endm
diff --git a/arch/arm/mach-gemini/include/mach/gpio.h b/arch/arm/mach-gemini/include/mach/gpio.h
index 3bc2c70f2989..40a0527bada7 100644
--- a/arch/arm/mach-gemini/include/mach/gpio.h
+++ b/arch/arm/mach-gemini/include/mach/gpio.h
@@ -13,11 +13,6 @@
 #define __MACH_GPIO_H__
 #include <mach/irqs.h>
-#include <asm-generic/gpio.h>
-#define gpio_get_value  __gpio_get_value
-#define gpio_set_value  __gpio_set_value
-#define gpio_cansleep   __gpio_cansleep
 #define gpio_to_irq(x)  ((x) + GPIO_IRQ_BASE)
 #define irq_to_gpio(x)  ((x) - GPIO_IRQ_BASE)
diff --git a/arch/arm/mach-gemini/include/mach/memory.h b/arch/arm/mach-gemini/include/mach/memory.h
deleted file mode 100644
index a50915f764d8..000000000000
--- a/arch/arm/mach-gemini/include/mach/memory.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- *  Copyright (C) 2001-2006 Storlink, Corp.
- *  Copyright (C) 2008-2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-#ifndef __MACH_MEMORY_H
-#define __MACH_MEMORY_H
-#ifdef CONFIG_GEMINI_MEM_SWAP
-# define PLAT_PHYS_OFFSET       UL(0x00000000)
-#else
-# define PLAT_PHYS_OFFSET       UL(0x10000000)
-#endif
-#endif /* __MACH_MEMORY_H */
diff --git a/arch/arm/mach-h720x/include/mach/debug-macro.S b/arch/arm/mach-h720x/include/mach/debug-macro.S
index c2093e835720..8a46157b0582 100644
--- a/arch/arm/mach-h720x/include/mach/debug-macro.S
+++ b/arch/arm/mach-h720x/include/mach/debug-macro.S
@@ -16,7 +16,7 @@
                .equ    io_virt, IO_VIRT
                .equ    io_phys, IO_PHYS
-                .macro  addruart, rp, rv
+                .macro  addruart, rp, rv, tmp
                mov     \rp, #0x00020000        @ UART1
                add     \rv, \rp, #io_virt      @ virtual address
                add     \rp, \rp, #io_phys      @ physical base address
diff --git a/arch/arm/mach-h720x/include/mach/memory.h b/arch/arm/mach-h720x/include/mach/memory.h
deleted file mode 100644
index 96dcf50c51d3..000000000000
--- a/arch/arm/mach-h720x/include/mach/memory.h
+++ /dev/null
@@ -1,11 +0,0 @@
-/*
- * arch/arm/mach-h720x/include/mach/memory.h
- *
- * Copyright (c) 2000 Jungjun Kim
- *
- */
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
-#define PLAT_PHYS_OFFSET        UL(0x40000000)
-#endif
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 0519dd7f034b..e9c2968005dc 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -449,6 +449,7 @@ config MACH_MX31_3DS
        select IMX_HAVE_PLATFORM_IMX_UART
        select IMX_HAVE_PLATFORM_IPU_CORE
        select IMX_HAVE_PLATFORM_MXC_EHCI
+        select IMX_HAVE_PLATFORM_MXC_MMC
        select IMX_HAVE_PLATFORM_MXC_NAND
        select IMX_HAVE_PLATFORM_SPI_IMX
        select MXC_ULPI if USB_ULPI
diff --git a/arch/arm/mach-imx/iomux-imx31.c b/arch/arm/mach-imx/iomux-imx31.c
index cf8f8099ebd7..82bd4403b450 100644
--- a/arch/arm/mach-imx/iomux-imx31.c
+++ b/arch/arm/mach-imx/iomux-imx31.c
@@ -17,13 +17,12 @@
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 * MA 02110-1301, USA.
 */
+#include <linux/gpio.h>
 #include <linux/module.h>
 #include <linux/spinlock.h>
 #include <linux/io.h>
 #include <linux/kernel.h>
 #include <mach/hardware.h>
-#include <mach/gpio.h>
 #include <mach/iomux-mx3.h>
 /*
diff --git a/arch/arm/mach-imx/mach-mx27ads.c b/arch/arm/mach-imx/mach-mx27ads.c
index efe6109099fd..635b0509068b 100644
--- a/arch/arm/mach-imx/mach-mx27ads.c
+++ b/arch/arm/mach-imx/mach-mx27ads.c
@@ -13,7 +13,7 @@
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */
+#include <linux/gpio.h>
 #include <linux/platform_device.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/map.h>
@@ -27,7 +27,6 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 #include <asm/mach/map.h>
-#include <mach/gpio.h>
 #include <mach/iomux-mx27.h>
 #include "devices-imx27.h"
diff --git a/arch/arm/mach-imx/mach-mx31_3ds.c b/arch/arm/mach-imx/mach-mx31_3ds.c
index 589066fb3316..712a7fb1cf01 100644
--- a/arch/arm/mach-imx/mach-mx31_3ds.c
+++ b/arch/arm/mach-imx/mach-mx31_3ds.c
@@ -542,7 +542,7 @@ static const struct mxc_nand_platform_data
 mx31_3ds_nand_board_info __initconst = {
        .width          = 1,
        .hw_ecc         = 1,
-#ifdef MACH_MX31_3DS_MXC_NAND_USE_BBT
+#ifdef CONFIG_MACH_MX31_3DS_MXC_NAND_USE_BBT
        .flash_bbt      = 1,
 #endif
 };
diff --git a/arch/arm/mach-integrator/include/mach/debug-macro.S b/arch/arm/mach-integrator/include/mach/debug-macro.S
index a1f598fd3a56..411b116077e4 100644
--- a/arch/arm/mach-integrator/include/mach/debug-macro.S
+++ b/arch/arm/mach-integrator/include/mach/debug-macro.S
@@ -11,7 +11,7 @@
 *
 */
-                .macro  addruart, rp, rv
+                .macro  addruart, rp, rv, tmp
                mov     \rp, #0x16000000        @ physical base address
                mov     \rv, #0xf0000000        @ virtual base
                add     \rv, \rv, #0x16000000 >> 4
diff --git a/arch/arm/mach-iop13xx/include/mach/debug-macro.S b/arch/arm/mach-iop13xx/include/mach/debug-macro.S
index e664466d51bf..d869a6f67e5c 100644
--- a/arch/arm/mach-iop13xx/include/mach/debug-macro.S
+++ b/arch/arm/mach-iop13xx/include/mach/debug-macro.S
@@ -11,7 +11,7 @@
 * published by the Free Software Foundation.
 */
-        .macro  addruart, rp, rv
+        .macro  addruart, rp, rv, tmp
        mov     \rp, #0x00002300
        orr     \rp, \rp, #0x00000040
        orr     \rv, \rp, #0xfe000000   @ virtual
diff --git a/arch/arm/mach-iop32x/include/mach/debug-macro.S b/arch/arm/mach-iop32x/include/mach/debug-macro.S
index ff9e76c09f35..363bdf90b34d 100644
--- a/arch/arm/mach-iop32x/include/mach/debug-macro.S
+++ b/arch/arm/mach-iop32x/include/mach/debug-macro.S
@@ -11,7 +11,7 @@
 * published by the Free Software Foundation.
 */
-                .macro  addruart, rp, rv
+                .macro  addruart, rp, rv, tmp
                mov     \rp, #0xfe000000        @ physical as well as virtual
                orr     \rp, \rp, #0x00800000   @ location of the UART
                mov     \rv, \rp
diff --git a/arch/arm/mach-iop32x/include/mach/memory.h b/arch/arm/mach-iop32x/include/mach/memory.h
deleted file mode 100644
index 169cc239f76c..000000000000
--- a/arch/arm/mach-iop32x/include/mach/memory.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/*
- * arch/arm/mach-iop32x/include/mach/memory.h
- */
-#ifndef __MEMORY_H
-#define __MEMORY_H
-/*
- * Physical DRAM offset.
- */
-#define PLAT_PHYS_OFFSET        UL(0xa0000000)
-#endif
diff --git a/arch/arm/mach-iop33x/include/mach/debug-macro.S b/arch/arm/mach-iop33x/include/mach/debug-macro.S
index 40c500dd1fac..361be1f6026e 100644
--- a/arch/arm/mach-iop33x/include/mach/debug-macro.S
+++ b/arch/arm/mach-iop33x/include/mach/debug-macro.S
@@ -11,7 +11,7 @@
 * published by the Free Software Foundation.
 */
-                .macro  addruart, rp, rv
+                .macro  addruart, rp, rv, tmp
                mov     \rp, #0x00ff0000
                orr     \rp, \rp, #0x0000f700
                orr     \rv, #0xfe000000        @ virtual
diff --git a/arch/arm/mach-iop33x/include/mach/memory.h b/arch/arm/mach-iop33x/include/mach/memory.h
deleted file mode 100644
index 8e1daf7006b6..000000000000
--- a/arch/arm/mach-iop33x/include/mach/memory.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/*
- * arch/arm/mach-iop33x/include/mach/memory.h
- */
-#ifndef __MEMORY_H
-#define __MEMORY_H
-/*
- * Physical DRAM offset.
- */
-#define PLAT_PHYS_OFFSET        UL(0x00000000)
-#endif
diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c
index 4068166c8993..59a512672bb9 100644
--- a/arch/arm/mach-ixp2000/core.c
+++ b/arch/arm/mach-ixp2000/core.c
@@ -13,7 +13,7 @@
 * License version 2. This program is licensed "as is" without any 
 * warranty of any kind, whether express or implied.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/spinlock.h>
@@ -39,7 +39,7 @@
 #include <asm/mach/time.h>
 #include <asm/mach/irq.h>
-#include <mach/gpio.h>
+#include <mach/gpio-ixp2000.h>
 static DEFINE_SPINLOCK(ixp2000_slowport_lock);
 static unsigned long ixp2000_slowport_irq_flags;
diff --git a/arch/arm/mach-ixp2000/include/mach/debug-macro.S b/arch/arm/mach-ixp2000/include/mach/debug-macro.S
index 0ef533b20972..bdd3ccdc2890 100644
--- a/arch/arm/mach-ixp2000/include/mach/debug-macro.S
+++ b/arch/arm/mach-ixp2000/include/mach/debug-macro.S
@@ -11,7 +11,7 @@
 *
 */
-                .macro  addruart, rp, rv
+                .macro  addruart, rp, rv, tmp
                mov     \rp, #0x00030000
 #ifdef  __ARMEB__
                orr     \rp, \rp, #0x00000003
diff --git a/arch/arm/mach-ixp2000/include/mach/gpio.h b/arch/arm/mach-ixp2000/include/mach/gpio-ixp2000.h
index 4a88d2c33dac..af836c76c3f1 100644
--- a/arch/arm/mach-ixp2000/include/mach/gpio.h
+++ b/arch/arm/mach-ixp2000/include/mach/gpio-ixp2000.h
@@ -3,7 +3,7 @@
 *
 * Copyright (C) 2002 Intel Corporation.
 *
- * This program is free software, you can redistribute it and/or modify 
+ * This program is free software, you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
@@ -11,7 +11,7 @@
 /*
 * IXP2000 GPIO in/out, edge/level detection for IRQs:
 * IRQs are generated on Falling-edge, Rising-Edge, Level-low, Level-High
- * or both Falling-edge and Rising-edge.  
+ * or both Falling-edge and Rising-edge.
 * This must be called *before* the corresponding IRQ is registerd.
 * Use this instead of directly setting the GPIO registers.
 * GPIOs may also be used as GPIOs (e.g. for emulating i2c/smb)
diff --git a/arch/arm/mach-ixp2000/ixdp2x00.c b/arch/arm/mach-ixp2000/ixdp2x00.c
index 235638f800e5..634b6c852f68 100644
--- a/arch/arm/mach-ixp2000/ixdp2x00.c
+++ b/arch/arm/mach-ixp2000/ixdp2x00.c
@@ -14,6 +14,7 @@
 *  Free Software Foundation;  either version 2 of the  License, or (at your
 *  option) any later version.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/mm.h>
@@ -40,8 +41,7 @@
 #include <asm/mach/flash.h>
 #include <asm/mach/arch.h>
-#include <mach/gpio.h>
+#include <mach/gpio-ixp2000.h>
 /*************************************************************************
 * IXDP2x00 IRQ Initialization
diff --git a/arch/arm/mach-ixp23xx/include/mach/debug-macro.S b/arch/arm/mach-ixp23xx/include/mach/debug-macro.S
index f7c6eef7fa22..5ff524c13744 100644
--- a/arch/arm/mach-ixp23xx/include/mach/debug-macro.S
+++ b/arch/arm/mach-ixp23xx/include/mach/debug-macro.S
@@ -12,7 +12,7 @@
 */
 #include <mach/ixp23xx.h>
-                .macro  addruart, rp, rv
+                .macro  addruart, rp, rv, tmp
                ldr     \rp, =IXP23XX_PERIPHERAL_PHYS   @ physical
                ldr     \rv, =IXP23XX_PERIPHERAL_VIRT   @ virtual
 #ifdef __ARMEB__
diff --git a/arch/arm/mach-ixp4xx/dsmg600-setup.c b/arch/arm/mach-ixp4xx/dsmg600-setup.c
index 71607a7ecc7e..8837fbca27ce 100644
--- a/arch/arm/mach-ixp4xx/dsmg600-setup.c
+++ b/arch/arm/mach-ixp4xx/dsmg600-setup.c
@@ -16,7 +16,7 @@
 * Author: Rod Whitby <rod@whitby.id.au>
 * Maintainers: http://www.nslu2-linux.org/
 */
+#include <linux/gpio.h>
 #include <linux/irq.h>
 #include <linux/jiffies.h>
 #include <linux/timer.h>
@@ -31,7 +31,6 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/flash.h>
 #include <asm/mach/time.h>
-#include <asm/gpio.h>
 #define DSMG600_SDA_PIN         5
 #define DSMG600_SCL_PIN         4
diff --git a/arch/arm/mach-ixp4xx/fsg-setup.c b/arch/arm/mach-ixp4xx/fsg-setup.c
index a9540cd90375..2887c3578c17 100644
--- a/arch/arm/mach-ixp4xx/fsg-setup.c
+++ b/arch/arm/mach-ixp4xx/fsg-setup.c
@@ -14,7 +14,7 @@
 * Maintainers: http://www.nslu2-linux.org/
 *
 */
+#include <linux/gpio.h>
 #include <linux/if_ether.h>
 #include <linux/irq.h>
 #include <linux/serial.h>
@@ -27,7 +27,6 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/flash.h>
-#include <asm/gpio.h>
 #define FSG_SDA_PIN             12
 #define FSG_SCL_PIN             13
diff --git a/arch/arm/mach-ixp4xx/include/mach/debug-macro.S b/arch/arm/mach-ixp4xx/include/mach/debug-macro.S
index b974a49c0aff..8c9f8d564492 100644
--- a/arch/arm/mach-ixp4xx/include/mach/debug-macro.S
+++ b/arch/arm/mach-ixp4xx/include/mach/debug-macro.S
@@ -10,7 +10,7 @@
 * published by the Free Software Foundation.
 */
-                .macro  addruart, rp, rv
+                .macro  addruart, rp, rv, tmp
 #ifdef __ARMEB__
                mov     \rp, #3         @ Uart regs are at off set of 3 if
                                        @ byte writes used - Big Endian.
diff --git a/arch/arm/mach-ixp4xx/include/mach/gpio.h b/arch/arm/mach-ixp4xx/include/mach/gpio.h
index a5f87ded2f28..83d6b4ed60bb 100644
--- a/arch/arm/mach-ixp4xx/include/mach/gpio.h
+++ b/arch/arm/mach-ixp4xx/include/mach/gpio.h
@@ -28,6 +28,8 @@
 #include <linux/kernel.h>
 #include <mach/hardware.h>
+#define __ARM_GPIOLIB_COMPLEX
 static inline int gpio_request(unsigned gpio, const char *label)
 {
        return 0;
@@ -70,6 +72,7 @@ static inline void gpio_set_value(unsigned gpio, int value)
 #include <asm-generic/gpio.h>                   /* cansleep wrappers */
 extern int gpio_to_irq(int gpio);
+#define gpio_to_irq gpio_to_irq
 extern int irq_to_gpio(unsigned int irq);
 #endif
diff --git a/arch/arm/mach-ixp4xx/include/mach/memory.h b/arch/arm/mach-ixp4xx/include/mach/memory.h
deleted file mode 100644
index 4caf1761f1e2..000000000000
--- a/arch/arm/mach-ixp4xx/include/mach/memory.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * arch/arm/mach-ixp4xx/include/mach/memory.h
- *
- * Copyright (c) 2001-2004 MontaVista Software, Inc.
- */
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
-#include <asm/sizes.h>
-/*
- * Physical DRAM offset.
- */
-#define PLAT_PHYS_OFFSET        UL(0x00000000)
-#endif
diff --git a/arch/arm/mach-ixp4xx/nas100d-setup.c b/arch/arm/mach-ixp4xx/nas100d-setup.c
index 9f4669260d4c..de716fa1aab6 100644
--- a/arch/arm/mach-ixp4xx/nas100d-setup.c
+++ b/arch/arm/mach-ixp4xx/nas100d-setup.c
@@ -17,7 +17,7 @@
 * Maintainers: http://www.nslu2-linux.org/
 *
 */
+#include <linux/gpio.h>
 #include <linux/if_ether.h>
 #include <linux/irq.h>
 #include <linux/jiffies.h>
@@ -32,7 +32,6 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/flash.h>
-#include <asm/gpio.h>
 #define NAS100D_SDA_PIN         5
 #define NAS100D_SCL_PIN         6
diff --git a/arch/arm/mach-ixp4xx/nslu2-setup.c b/arch/arm/mach-ixp4xx/nslu2-setup.c
index 3676fbf6ef9c..ac81ccb26bfe 100644
--- a/arch/arm/mach-ixp4xx/nslu2-setup.c
+++ b/arch/arm/mach-ixp4xx/nslu2-setup.c
@@ -16,7 +16,7 @@
 * Maintainers: http://www.nslu2-linux.org/
 *
 */
+#include <linux/gpio.h>
 #include <linux/if_ether.h>
 #include <linux/irq.h>
 #include <linux/serial.h>
@@ -30,7 +30,6 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/flash.h>
 #include <asm/mach/time.h>
-#include <asm/gpio.h>
 #define NSLU2_SDA_PIN           7
 #define NSLU2_SCL_PIN           6
diff --git a/arch/arm/mach-kirkwood/include/mach/debug-macro.S b/arch/arm/mach-kirkwood/include/mach/debug-macro.S
index db06ae437d08..f785d401a607 100644
--- a/arch/arm/mach-kirkwood/include/mach/debug-macro.S
+++ b/arch/arm/mach-kirkwood/include/mach/debug-macro.S
@@ -8,7 +8,7 @@
 #include <mach/bridge-regs.h>
-        .macro  addruart, rp, rv
+        .macro  addruart, rp, rv, tmp
        ldr     \rp, =KIRKWOOD_REGS_PHYS_BASE
        ldr     \rv, =KIRKWOOD_REGS_VIRT_BASE
        orr     \rp, \rp, #0x00012000
diff --git a/arch/arm/mach-kirkwood/include/mach/memory.h b/arch/arm/mach-kirkwood/include/mach/memory.h
deleted file mode 100644
index 4600b44e3ad3..000000000000
--- a/arch/arm/mach-kirkwood/include/mach/memory.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/*
- * arch/arm/mach-kirkwood/include/mach/memory.h
- */
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
-#define PLAT_PHYS_OFFSET                UL(0x00000000)
-#endif
diff --git a/arch/arm/mach-kirkwood/irq.c b/arch/arm/mach-kirkwood/irq.c
index 05d193a25b25..c4c68e5b94f1 100644
--- a/arch/arm/mach-kirkwood/irq.c
+++ b/arch/arm/mach-kirkwood/irq.c
@@ -7,14 +7,13 @@
 * License version 2.  This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/irq.h>
 #include <linux/io.h>
 #include <mach/bridge-regs.h>
 #include <plat/irq.h>
-#include <asm/gpio.h>
 #include "common.h"
 static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
diff --git a/arch/arm/mach-kirkwood/mpp.c b/arch/arm/mach-kirkwood/mpp.c
index b0a7d979a8ed..cc431fa22ccb 100644
--- a/arch/arm/mach-kirkwood/mpp.c
+++ b/arch/arm/mach-kirkwood/mpp.c
@@ -7,12 +7,11 @@
 * License version 2.  This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/mbus.h>
 #include <linux/io.h>
-#include <asm/gpio.h>
 #include <mach/hardware.h>
 #include <plat/mpp.h>
 #include "common.h"
diff --git a/arch/arm/mach-ks8695/Makefile b/arch/arm/mach-ks8695/Makefile
index 7e3e8160ed30..853efd9133c6 100644
--- a/arch/arm/mach-ks8695/Makefile
+++ b/arch/arm/mach-ks8695/Makefile
@@ -3,7 +3,7 @@
 # Makefile for KS8695 architecture support
 #
-obj-y                           := cpu.o irq.o time.o gpio.o devices.o
+obj-y                           := cpu.o irq.o time.o devices.o
 obj-m                           :=
 obj-n                           :=
 obj-                            :=
diff --git a/arch/arm/mach-ks8695/board-acs5k.c b/arch/arm/mach-ks8695/board-acs5k.c
index a5fcc7c7fe18..a91f99d265aa 100644
--- a/arch/arm/mach-ks8695/board-acs5k.c
+++ b/arch/arm/mach-ks8695/board-acs5k.c
@@ -10,7 +10,7 @@
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/types.h>
 #include <linux/interrupt.h>
@@ -34,7 +34,7 @@
 #include <asm/mach/irq.h>
 #include <mach/devices.h>
-#include <mach/gpio.h>
+#include <mach/gpio-ks8695.h>
 #include "generic.h"
diff --git a/arch/arm/mach-ks8695/board-dsm320.c b/arch/arm/mach-ks8695/board-dsm320.c
index fb91a716a7db..d24bcef2e2dd 100644
--- a/arch/arm/mach-ks8695/board-dsm320.c
+++ b/arch/arm/mach-ks8695/board-dsm320.c
@@ -10,7 +10,7 @@
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/types.h>
 #include <linux/interrupt.h>
@@ -29,7 +29,7 @@
 #include <asm/mach/irq.h>
 #include <mach/devices.h>
-#include <mach/gpio.h>
+#include <mach/gpio-ks8695.h>
 #include "generic.h"
diff --git a/arch/arm/mach-ks8695/board-micrel.c b/arch/arm/mach-ks8695/board-micrel.c
index 8f67a750b6c7..16c95657f8fd 100644
--- a/arch/arm/mach-ks8695/board-micrel.c
+++ b/arch/arm/mach-ks8695/board-micrel.c
@@ -5,7 +5,7 @@
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/types.h>
 #include <linux/interrupt.h>
@@ -18,7 +18,7 @@
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
-#include <mach/gpio.h>
+#include <mach/gpio-ks8695.h>
 #include <mach/devices.h>
 #include "generic.h"
diff --git a/arch/arm/mach-ks8695/devices.c b/arch/arm/mach-ks8695/devices.c
index b89fb6d46ccc..73bd63812878 100644
--- a/arch/arm/mach-ks8695/devices.c
+++ b/arch/arm/mach-ks8695/devices.c
@@ -20,6 +20,7 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
+#include <linux/gpio.h>
 #include <linux/platform_device.h>
 #include <mach/irqs.h>
diff --git a/arch/arm/mach-ks8695/gpio.c b/arch/arm/mach-ks8695/gpio.c
deleted file mode 100644
index 31e456508a6f..000000000000
--- a/arch/arm/mach-ks8695/gpio.c
+++ /dev/null
@@ -1,319 +0,0 @@
-/*
- * arch/arm/mach-ks8695/gpio.c
- *
- * Copyright (C) 2006 Andrew Victor
- * Updated to GPIOLIB, Copyright 2008 Simtec Electronics
- *                     Daniel Silverstone <dsilvers@simtec.co.uk>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/init.h>
-#include <linux/debugfs.h>
-#include <linux/seq_file.h>
-#include <linux/module.h>
-#include <linux/io.h>
-#include <mach/hardware.h>
-#include <asm/mach/irq.h>
-#include <mach/regs-gpio.h>
-#include <mach/gpio.h>
-/*
- * Configure a GPIO line for either GPIO function, or its internal
- * function (Interrupt, Timer, etc).
- */
-static void ks8695_gpio_mode(unsigned int pin, short gpio)
-{
-        unsigned int enable[] = { IOPC_IOEINT0EN, IOPC_IOEINT1EN, IOPC_IOEINT2EN, IOPC_IOEINT3EN, IOPC_IOTIM0EN, IOPC_IOTIM1EN };
-        unsigned long x, flags;
-        if (pin > KS8695_GPIO_5)        /* only GPIO 0..5 have internal functions */
-                return;
-        local_irq_save(flags);
-        x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPC);
-        if (gpio)                       /* GPIO: set bit to 0 */
-                x &= ~enable[pin];
-        else                            /* Internal function: set bit to 1 */
-                x |= enable[pin];
-        __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPC);
-        local_irq_restore(flags);
-}
-static unsigned short gpio_irq[] = { KS8695_IRQ_EXTERN0, KS8695_IRQ_EXTERN1, KS8695_IRQ_EXTERN2, KS8695_IRQ_EXTERN3 };
-/*
- * Configure GPIO pin as external interrupt source.
- */
-int ks8695_gpio_interrupt(unsigned int pin, unsigned int type)
-{
-        unsigned long x, flags;
-        if (pin > KS8695_GPIO_3)        /* only GPIO 0..3 can generate IRQ */
-                return -EINVAL;
-        local_irq_save(flags);
-        /* set pin as input */
-        x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPM);
-        x &= ~IOPM(pin);
-        __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPM);
-        local_irq_restore(flags);
-        /* Set IRQ triggering type */
-        irq_set_irq_type(gpio_irq[pin], type);
-        /* enable interrupt mode */
-        ks8695_gpio_mode(pin, 0);
-        return 0;
-}
-EXPORT_SYMBOL(ks8695_gpio_interrupt);
-/* .... Generic GPIO interface .............................................. */
-/*
- * Configure the GPIO line as an input.
- */
-static int ks8695_gpio_direction_input(struct gpio_chip *gc, unsigned int pin)
-{
-        unsigned long x, flags;
-        if (pin > KS8695_GPIO_15)
-                return -EINVAL;
-        /* set pin to GPIO mode */
-        ks8695_gpio_mode(pin, 1);
-        local_irq_save(flags);
-        /* set pin as input */
-        x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPM);
-        x &= ~IOPM(pin);
-        __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPM);
-        local_irq_restore(flags);
-        return 0;
-}
-/*
- * Configure the GPIO line as an output, with default state.
- */
-static int ks8695_gpio_direction_output(struct gpio_chip *gc,
-                                        unsigned int pin, int state)
-{
-        unsigned long x, flags;
-        if (pin > KS8695_GPIO_15)
-                return -EINVAL;
-        /* set pin to GPIO mode */
-        ks8695_gpio_mode(pin, 1);
-        local_irq_save(flags);
-        /* set line state */
-        x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD);
-        if (state)
-                x |= IOPD(pin);
-        else
-                x &= ~IOPD(pin);
-        __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPD);
-        /* set pin as output */
-        x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPM);
-        x |= IOPM(pin);
-        __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPM);
-        local_irq_restore(flags);
-        return 0;
-}
-/*
- * Set the state of an output GPIO line.
- */
-static void ks8695_gpio_set_value(struct gpio_chip *gc,
-                                  unsigned int pin, int state)
-{
-        unsigned long x, flags;
-        if (pin > KS8695_GPIO_15)
-                return;
-        local_irq_save(flags);
-        /* set output line state */
-        x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD);
-        if (state)
-                x |= IOPD(pin);
-        else
-                x &= ~IOPD(pin);
-        __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPD);
-        local_irq_restore(flags);
-}
-/*
- * Read the state of a GPIO line.
- */
-static int ks8695_gpio_get_value(struct gpio_chip *gc, unsigned int pin)
-{
-        unsigned long x;
-        if (pin > KS8695_GPIO_15)
-                return -EINVAL;
-        x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD);
-        return (x & IOPD(pin)) != 0;
-}
-/*
- * Map GPIO line to IRQ number.
- */
-static int ks8695_gpio_to_irq(struct gpio_chip *gc, unsigned int pin)
-{
-        if (pin > KS8695_GPIO_3)        /* only GPIO 0..3 can generate IRQ */
-                return -EINVAL;
-        return gpio_irq[pin];
-}
-/*
- * Map IRQ number to GPIO line.
- */
-int irq_to_gpio(unsigned int irq)
-{
-        if ((irq < KS8695_IRQ_EXTERN0) || (irq > KS8695_IRQ_EXTERN3))
-                return -EINVAL;
-        return (irq - KS8695_IRQ_EXTERN0);
-}
-EXPORT_SYMBOL(irq_to_gpio);
-/* GPIOLIB interface */
-static struct gpio_chip ks8695_gpio_chip = {
-        .label                  = "KS8695",
-        .direction_input        = ks8695_gpio_direction_input,
-        .direction_output       = ks8695_gpio_direction_output,
-        .get                    = ks8695_gpio_get_value,
-        .set                    = ks8695_gpio_set_value,
-        .to_irq                 = ks8695_gpio_to_irq,
-        .base                   = 0,
-        .ngpio                  = 16,
-        .can_sleep              = 0,
-};
-/* Register the GPIOs */
-void ks8695_register_gpios(void)
-{
-        if (gpiochip_add(&ks8695_gpio_chip))
-                printk(KERN_ERR "Unable to register core GPIOs\n");
-}
-/* .... Debug interface ..................................................... */
-#ifdef CONFIG_DEBUG_FS
-static int ks8695_gpio_show(struct seq_file *s, void *unused)
-{
-        unsigned int enable[] = { IOPC_IOEINT0EN, IOPC_IOEINT1EN, IOPC_IOEINT2EN, IOPC_IOEINT3EN, IOPC_IOTIM0EN, IOPC_IOTIM1EN };
-        unsigned int intmask[] = { IOPC_IOEINT0TM, IOPC_IOEINT1TM, IOPC_IOEINT2TM, IOPC_IOEINT3TM };
-        unsigned long mode, ctrl, data;
-        int i;
-        mode = __raw_readl(KS8695_GPIO_VA + KS8695_IOPM);
-        ctrl = __raw_readl(KS8695_GPIO_VA + KS8695_IOPC);
-        data = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD);
-        seq_printf(s, "Pin\tI/O\tFunction\tState\n\n");
-        for (i = KS8695_GPIO_0; i <= KS8695_GPIO_15 ; i++) {
-                seq_printf(s, "%i:\t", i);
-                seq_printf(s, "%s\t", (mode & IOPM(i)) ? "Output" : "Input");
-                if (i <= KS8695_GPIO_3) {
-                        if (ctrl & enable[i]) {
-                                seq_printf(s, "EXT%i ", i);
-                                switch ((ctrl & intmask[i]) >> (4 * i)) {
-                                        case IOPC_TM_LOW:
-                                                seq_printf(s, "(Low)");         break;
-                                        case IOPC_TM_HIGH:
-                                                seq_printf(s, "(High)");        break;
-                                        case IOPC_TM_RISING:
-                                                seq_printf(s, "(Rising)");      break;
-                                        case IOPC_TM_FALLING:
-                                                seq_printf(s, "(Falling)");     break;
-                                        case IOPC_TM_EDGE:
-                                                seq_printf(s, "(Edges)");       break;
-                                }
-                        }
-                        else
-                                seq_printf(s, "GPIO\t");
-                }
-                else if (i <= KS8695_GPIO_5) {
-                        if (ctrl & enable[i])
-                                seq_printf(s, "TOUT%i\t", i - KS8695_GPIO_4);
-                        else
-                                seq_printf(s, "GPIO\t");
-                }
-                else
-                        seq_printf(s, "GPIO\t");
-                seq_printf(s, "\t");
-                seq_printf(s, "%i\n", (data & IOPD(i)) ? 1 : 0);
-        }
-        return 0;
-}
-static int ks8695_gpio_open(struct inode *inode, struct file *file)
-{
-        return single_open(file, ks8695_gpio_show, NULL);
-}
-static const struct file_operations ks8695_gpio_operations = {
-        .open           = ks8695_gpio_open,
-        .read           = seq_read,
-        .llseek         = seq_lseek,
-        .release        = single_release,
-};
-static int __init ks8695_gpio_debugfs_init(void)
-{
-        /* /sys/kernel/debug/ks8695_gpio */
-        (void) debugfs_create_file("ks8695_gpio", S_IFREG | S_IRUGO, NULL, NULL, &ks8695_gpio_operations);
-        return 0;
-}
-postcore_initcall(ks8695_gpio_debugfs_init);
-#endif
diff --git a/arch/arm/mach-ks8695/include/mach/debug-macro.S b/arch/arm/mach-ks8695/include/mach/debug-macro.S
index bf516adf1925..a79e48981202 100644
--- a/arch/arm/mach-ks8695/include/mach/debug-macro.S
+++ b/arch/arm/mach-ks8695/include/mach/debug-macro.S
@@ -14,7 +14,7 @@
 #include <mach/hardware.h>
 #include <mach/regs-uart.h>
-        .macro  addruart, rp, rv
+        .macro  addruart, rp, rv, tmp
                ldr     \rp, =KS8695_UART_PA            @ physical base address
                ldr     \rv, =KS8695_UART_VA            @ virtual base address
        .endm
diff --git a/arch/arm/mach-ks8695/include/mach/gpio-ks8695.h b/arch/arm/mach-ks8695/include/mach/gpio-ks8695.h
new file mode 100644
index 000000000000..6eb034d60325
--- /dev/null
+++ b/arch/arm/mach-ks8695/include/mach/gpio-ks8695.h
@@ -0,0 +1,39 @@
+/*
+ * Copyright (C) 2006 Andrew Victor
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __MACH_KS8659_GPIO_H
+#define __MACH_KS8659_GPIO_H
+#include <linux/kernel.h>
+#define KS8695_GPIO_0           0
+#define KS8695_GPIO_1           1
+#define KS8695_GPIO_2           2
+#define KS8695_GPIO_3           3
+#define KS8695_GPIO_4           4
+#define KS8695_GPIO_5           5
+#define KS8695_GPIO_6           6
+#define KS8695_GPIO_7           7
+#define KS8695_GPIO_8           8
+#define KS8695_GPIO_9           9
+#define KS8695_GPIO_10          10
+#define KS8695_GPIO_11          11
+#define KS8695_GPIO_12          12
+#define KS8695_GPIO_13          13
+#define KS8695_GPIO_14          14
+#define KS8695_GPIO_15          15
+/*
+ * Configure GPIO pin as external interrupt source.
+ */
+extern int ks8695_gpio_interrupt(unsigned int pin, unsigned int type);
+/* Register the GPIOs */
+extern void ks8695_register_gpios(void);
+#endif /* __MACH_KS8659_GPIO_H */
diff --git a/arch/arm/mach-ks8695/include/mach/gpio.h b/arch/arm/mach-ks8695/include/mach/gpio.h
index 86312d476bc6..f5fda36e4512 100644
--- a/arch/arm/mach-ks8695/include/mach/gpio.h
+++ b/arch/arm/mach-ks8695/include/mach/gpio.h
@@ -11,47 +11,9 @@
 #ifndef __ASM_ARCH_GPIO_H_
 #define __ASM_ARCH_GPIO_H_
-#include <linux/kernel.h>
-#define KS8695_GPIO_0           0
-#define KS8695_GPIO_1           1
-#define KS8695_GPIO_2           2
-#define KS8695_GPIO_3           3
-#define KS8695_GPIO_4           4
-#define KS8695_GPIO_5           5
-#define KS8695_GPIO_6           6
-#define KS8695_GPIO_7           7
-#define KS8695_GPIO_8           8
-#define KS8695_GPIO_9           9
-#define KS8695_GPIO_10          10
-#define KS8695_GPIO_11          11
-#define KS8695_GPIO_12          12
-#define KS8695_GPIO_13          13
-#define KS8695_GPIO_14          14
-#define KS8695_GPIO_15          15
-/*
- * Configure GPIO pin as external interrupt source.
- */
-extern int ks8695_gpio_interrupt(unsigned int pin, unsigned int type);
 /*
 * Map IRQ number to GPIO line.
 */
 extern int irq_to_gpio(unsigned int irq);
-#include <asm-generic/gpio.h>
-/* If it turns out that we need to optimise GPIO access for the
- * Micrel's GPIOs, then these can be changed to check their argument
- * directly as static inlines. However for now it's probably not
- * worthwhile.
- */
-#define gpio_get_value __gpio_get_value
-#define gpio_set_value __gpio_set_value
-#define gpio_to_irq __gpio_to_irq
-/* Register the GPIOs */
-extern void ks8695_register_gpios(void);
 #endif
diff --git a/arch/arm/mach-ks8695/leds.c b/arch/arm/mach-ks8695/leds.c
index 184ef74e4bee..d6f6502ac9b5 100644
--- a/arch/arm/mach-ks8695/leds.c
+++ b/arch/arm/mach-ks8695/leds.c
@@ -7,14 +7,14 @@
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/init.h>
+#include <linux/gpio.h>
 #include <asm/leds.h>
 #include <mach/devices.h>
-#include <mach/gpio.h>
 static inline void ks8695_led_on(unsigned int led)
diff --git a/arch/arm/mach-l7200/include/mach/debug-macro.S b/arch/arm/mach-l7200/include/mach/debug-macro.S
index b0a2db77d392..0b4e760159b9 100644
--- a/arch/arm/mach-l7200/include/mach/debug-macro.S
+++ b/arch/arm/mach-l7200/include/mach/debug-macro.S
@@ -14,7 +14,7 @@
                .equ    io_virt, IO_BASE
                .equ    io_phys, IO_START
-                .macro  addruart, rp, rv
+                .macro  addruart, rp, rv, tmp
                mov     \rp, #0x00044000        @ UART1
 @               mov     \rp, #0x00045000        @ UART2
                add     \rv, \rp, #io_virt      @ virtual address
diff --git a/arch/arm/mach-lpc32xx/Makefile b/arch/arm/mach-lpc32xx/Makefile
index a5fc5d0eeaeb..f5db805ab958 100644
--- a/arch/arm/mach-lpc32xx/Makefile
+++ b/arch/arm/mach-lpc32xx/Makefile
@@ -3,6 +3,6 @@
 #
 obj-y   := timer.o irq.o common.o serial.o clock.o
-obj-y   += gpiolib.o pm.o suspend.o
+obj-y   += pm.o suspend.o
 obj-y   += phy3250.o
diff --git a/arch/arm/mach-lpc32xx/gpiolib.c b/arch/arm/mach-lpc32xx/gpiolib.c
deleted file mode 100644
index 69061ea8997a..000000000000
--- a/arch/arm/mach-lpc32xx/gpiolib.c
+++ /dev/null
@@ -1,446 +0,0 @@
-/*
- * arch/arm/mach-lpc32xx/gpiolib.c
- *
- * Author: Kevin Wells <kevin.wells@nxp.com>
- *
- * Copyright (C) 2010 NXP Semiconductors
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/io.h>
-#include <linux/errno.h>
-#include <linux/gpio.h>
-#include <mach/hardware.h>
-#include <mach/platform.h>
-#include "common.h"
-#define LPC32XX_GPIO_P3_INP_STATE               _GPREG(0x000)
-#define LPC32XX_GPIO_P3_OUTP_SET                _GPREG(0x004)
-#define LPC32XX_GPIO_P3_OUTP_CLR                _GPREG(0x008)
-#define LPC32XX_GPIO_P3_OUTP_STATE              _GPREG(0x00C)
-#define LPC32XX_GPIO_P2_DIR_SET                 _GPREG(0x010)
-#define LPC32XX_GPIO_P2_DIR_CLR                 _GPREG(0x014)
-#define LPC32XX_GPIO_P2_DIR_STATE               _GPREG(0x018)
-#define LPC32XX_GPIO_P2_INP_STATE               _GPREG(0x01C)
-#define LPC32XX_GPIO_P2_OUTP_SET                _GPREG(0x020)
-#define LPC32XX_GPIO_P2_OUTP_CLR                _GPREG(0x024)
-#define LPC32XX_GPIO_P2_MUX_SET                 _GPREG(0x028)
-#define LPC32XX_GPIO_P2_MUX_CLR                 _GPREG(0x02C)
-#define LPC32XX_GPIO_P2_MUX_STATE               _GPREG(0x030)
-#define LPC32XX_GPIO_P0_INP_STATE               _GPREG(0x040)
-#define LPC32XX_GPIO_P0_OUTP_SET                _GPREG(0x044)
-#define LPC32XX_GPIO_P0_OUTP_CLR                _GPREG(0x048)
-#define LPC32XX_GPIO_P0_OUTP_STATE              _GPREG(0x04C)
-#define LPC32XX_GPIO_P0_DIR_SET                 _GPREG(0x050)
-#define LPC32XX_GPIO_P0_DIR_CLR                 _GPREG(0x054)
-#define LPC32XX_GPIO_P0_DIR_STATE               _GPREG(0x058)
-#define LPC32XX_GPIO_P1_INP_STATE               _GPREG(0x060)
-#define LPC32XX_GPIO_P1_OUTP_SET                _GPREG(0x064)
-#define LPC32XX_GPIO_P1_OUTP_CLR                _GPREG(0x068)
-#define LPC32XX_GPIO_P1_OUTP_STATE              _GPREG(0x06C)
-#define LPC32XX_GPIO_P1_DIR_SET                 _GPREG(0x070)
-#define LPC32XX_GPIO_P1_DIR_CLR                 _GPREG(0x074)
-#define LPC32XX_GPIO_P1_DIR_STATE               _GPREG(0x078)
-#define GPIO012_PIN_TO_BIT(x)                   (1 << (x))
-#define GPIO3_PIN_TO_BIT(x)                     (1 << ((x) + 25))
-#define GPO3_PIN_TO_BIT(x)                      (1 << (x))
-#define GPIO012_PIN_IN_SEL(x, y)                (((x) >> (y)) & 1)
-#define GPIO3_PIN_IN_SHIFT(x)                   ((x) == 5 ? 24 : 10 + (x))
-#define GPIO3_PIN_IN_SEL(x, y)                  ((x) >> GPIO3_PIN_IN_SHIFT(y))
-#define GPIO3_PIN5_IN_SEL(x)                    (((x) >> 24) & 1)
-#define GPI3_PIN_IN_SEL(x, y)                   (((x) >> (y)) & 1)
-struct gpio_regs {
-        void __iomem *inp_state;
-        void __iomem *outp_set;
-        void __iomem *outp_clr;
-        void __iomem *dir_set;
-        void __iomem *dir_clr;
-};
-/*
- * GPIO names
- */
-static const char *gpio_p0_names[LPC32XX_GPIO_P0_MAX] = {
-        "p0.0", "p0.1", "p0.2", "p0.3",
-        "p0.4", "p0.5", "p0.6", "p0.7"
-};
-static const char *gpio_p1_names[LPC32XX_GPIO_P1_MAX] = {
-        "p1.0", "p1.1", "p1.2", "p1.3",
-        "p1.4", "p1.5", "p1.6", "p1.7",
-        "p1.8", "p1.9", "p1.10", "p1.11",
-        "p1.12", "p1.13", "p1.14", "p1.15",
-        "p1.16", "p1.17", "p1.18", "p1.19",
-        "p1.20", "p1.21", "p1.22", "p1.23",
-};
-static const char *gpio_p2_names[LPC32XX_GPIO_P2_MAX] = {
-        "p2.0", "p2.1", "p2.2", "p2.3",
-        "p2.4", "p2.5", "p2.6", "p2.7",
-        "p2.8", "p2.9", "p2.10", "p2.11",
-        "p2.12"
-};
-static const char *gpio_p3_names[LPC32XX_GPIO_P3_MAX] = {
-        "gpi000", "gpio01", "gpio02", "gpio03",
-        "gpio04", "gpio05"
-};
-static const char *gpi_p3_names[LPC32XX_GPI_P3_MAX] = {
-        "gpi00", "gpi01", "gpi02", "gpi03",
-        "gpi04", "gpi05", "gpi06", "gpi07",
-        "gpi08", "gpi09",  NULL,    NULL,
-         NULL,    NULL,    NULL,   "gpi15",
-        "gpi16", "gpi17", "gpi18", "gpi19",
-        "gpi20", "gpi21", "gpi22", "gpi23",
-        "gpi24", "gpi25", "gpi26", "gpi27"
-};
-static const char *gpo_p3_names[LPC32XX_GPO_P3_MAX] = {
-        "gpo00", "gpo01", "gpo02", "gpo03",
-        "gpo04", "gpo05", "gpo06", "gpo07",
-        "gpo08", "gpo09", "gpo10", "gpo11",
-        "gpo12", "gpo13", "gpo14", "gpo15",
-        "gpo16", "gpo17", "gpo18", "gpo19",
-        "gpo20", "gpo21", "gpo22", "gpo23"
-};
-static struct gpio_regs gpio_grp_regs_p0 = {
-        .inp_state      = LPC32XX_GPIO_P0_INP_STATE,
-        .outp_set       = LPC32XX_GPIO_P0_OUTP_SET,
-        .outp_clr       = LPC32XX_GPIO_P0_OUTP_CLR,
-        .dir_set        = LPC32XX_GPIO_P0_DIR_SET,
-        .dir_clr        = LPC32XX_GPIO_P0_DIR_CLR,
-};
-static struct gpio_regs gpio_grp_regs_p1 = {
-        .inp_state      = LPC32XX_GPIO_P1_INP_STATE,
-        .outp_set       = LPC32XX_GPIO_P1_OUTP_SET,
-        .outp_clr       = LPC32XX_GPIO_P1_OUTP_CLR,
-        .dir_set        = LPC32XX_GPIO_P1_DIR_SET,
-        .dir_clr        = LPC32XX_GPIO_P1_DIR_CLR,
-};
-static struct gpio_regs gpio_grp_regs_p2 = {
-        .inp_state      = LPC32XX_GPIO_P2_INP_STATE,
-        .outp_set       = LPC32XX_GPIO_P2_OUTP_SET,
-        .outp_clr       = LPC32XX_GPIO_P2_OUTP_CLR,
-        .dir_set        = LPC32XX_GPIO_P2_DIR_SET,
-        .dir_clr        = LPC32XX_GPIO_P2_DIR_CLR,
-};
-static struct gpio_regs gpio_grp_regs_p3 = {
-        .inp_state      = LPC32XX_GPIO_P3_INP_STATE,
-        .outp_set       = LPC32XX_GPIO_P3_OUTP_SET,
-        .outp_clr       = LPC32XX_GPIO_P3_OUTP_CLR,
-        .dir_set        = LPC32XX_GPIO_P2_DIR_SET,
-        .dir_clr        = LPC32XX_GPIO_P2_DIR_CLR,
-};
-struct lpc32xx_gpio_chip {
-        struct gpio_chip        chip;
-        struct gpio_regs        *gpio_grp;
-};
-static inline struct lpc32xx_gpio_chip *to_lpc32xx_gpio(
-        struct gpio_chip *gpc)
-{
-        return container_of(gpc, struct lpc32xx_gpio_chip, chip);
-}
-static void __set_gpio_dir_p012(struct lpc32xx_gpio_chip *group,
-        unsigned pin, int input)
-{
-        if (input)
-                __raw_writel(GPIO012_PIN_TO_BIT(pin),
-                        group->gpio_grp->dir_clr);
-        else
-                __raw_writel(GPIO012_PIN_TO_BIT(pin),
-                        group->gpio_grp->dir_set);
-}
-static void __set_gpio_dir_p3(struct lpc32xx_gpio_chip *group,
-        unsigned pin, int input)
-{
-        u32 u = GPIO3_PIN_TO_BIT(pin);
-        if (input)
-                __raw_writel(u, group->gpio_grp->dir_clr);
-        else
-                __raw_writel(u, group->gpio_grp->dir_set);
-}
-static void __set_gpio_level_p012(struct lpc32xx_gpio_chip *group,
-        unsigned pin, int high)
-{
-        if (high)
-                __raw_writel(GPIO012_PIN_TO_BIT(pin),
-                        group->gpio_grp->outp_set);
-        else
-                __raw_writel(GPIO012_PIN_TO_BIT(pin),
-                        group->gpio_grp->outp_clr);
-}
-static void __set_gpio_level_p3(struct lpc32xx_gpio_chip *group,
-        unsigned pin, int high)
-{
-        u32 u = GPIO3_PIN_TO_BIT(pin);
-        if (high)
-                __raw_writel(u, group->gpio_grp->outp_set);
-        else
-                __raw_writel(u, group->gpio_grp->outp_clr);
-}
-static void __set_gpo_level_p3(struct lpc32xx_gpio_chip *group,
-        unsigned pin, int high)
-{
-        if (high)
-                __raw_writel(GPO3_PIN_TO_BIT(pin), group->gpio_grp->outp_set);
-        else
-                __raw_writel(GPO3_PIN_TO_BIT(pin), group->gpio_grp->outp_clr);
-}
-static int __get_gpio_state_p012(struct lpc32xx_gpio_chip *group,
-        unsigned pin)
-{
-        return GPIO012_PIN_IN_SEL(__raw_readl(group->gpio_grp->inp_state),
-                pin);
-}
-static int __get_gpio_state_p3(struct lpc32xx_gpio_chip *group,
-        unsigned pin)
-{
-        int state = __raw_readl(group->gpio_grp->inp_state);
-        /*
-         * P3 GPIO pin input mapping is not contiguous, GPIOP3-0..4 is mapped
-         * to bits 10..14, while GPIOP3-5 is mapped to bit 24.
-         */
-        return GPIO3_PIN_IN_SEL(state, pin);
-}
-static int __get_gpi_state_p3(struct lpc32xx_gpio_chip *group,
-        unsigned pin)
-{
-        return GPI3_PIN_IN_SEL(__raw_readl(group->gpio_grp->inp_state), pin);
-}
-/*
- * GENERIC_GPIO primitives.
- */
-static int lpc32xx_gpio_dir_input_p012(struct gpio_chip *chip,
-        unsigned pin)
-{
-        struct lpc32xx_gpio_chip *group = to_lpc32xx_gpio(chip);
-        __set_gpio_dir_p012(group, pin, 1);
-        return 0;
-}
-static int lpc32xx_gpio_dir_input_p3(struct gpio_chip *chip,
-        unsigned pin)
-{
-        struct lpc32xx_gpio_chip *group = to_lpc32xx_gpio(chip);
-        __set_gpio_dir_p3(group, pin, 1);
-        return 0;
-}
-static int lpc32xx_gpio_dir_in_always(struct gpio_chip *chip,
-        unsigned pin)
-{
-        return 0;
-}
-static int lpc32xx_gpio_get_value_p012(struct gpio_chip *chip, unsigned pin)
-{
-        struct lpc32xx_gpio_chip *group = to_lpc32xx_gpio(chip);
-        return __get_gpio_state_p012(group, pin);
-}
-static int lpc32xx_gpio_get_value_p3(struct gpio_chip *chip, unsigned pin)
-{
-        struct lpc32xx_gpio_chip *group = to_lpc32xx_gpio(chip);
-        return __get_gpio_state_p3(group, pin);
-}
-static int lpc32xx_gpi_get_value(struct gpio_chip *chip, unsigned pin)
-{
-        struct lpc32xx_gpio_chip *group = to_lpc32xx_gpio(chip);
-        return __get_gpi_state_p3(group, pin);
-}
-static int lpc32xx_gpio_dir_output_p012(struct gpio_chip *chip, unsigned pin,
-        int value)
-{
-        struct lpc32xx_gpio_chip *group = to_lpc32xx_gpio(chip);
-        __set_gpio_dir_p012(group, pin, 0);
-        return 0;
-}
-static int lpc32xx_gpio_dir_output_p3(struct gpio_chip *chip, unsigned pin,
-        int value)
-{
-        struct lpc32xx_gpio_chip *group = to_lpc32xx_gpio(chip);
-        __set_gpio_dir_p3(group, pin, 0);
-        return 0;
-}
-static int lpc32xx_gpio_dir_out_always(struct gpio_chip *chip, unsigned pin,
-        int value)
-{
-        return 0;
-}
-static void lpc32xx_gpio_set_value_p012(struct gpio_chip *chip, unsigned pin,
-        int value)
-{
-        struct lpc32xx_gpio_chip *group = to_lpc32xx_gpio(chip);
-        __set_gpio_level_p012(group, pin, value);
-}
-static void lpc32xx_gpio_set_value_p3(struct gpio_chip *chip, unsigned pin,
-        int value)
-{
-        struct lpc32xx_gpio_chip *group = to_lpc32xx_gpio(chip);
-        __set_gpio_level_p3(group, pin, value);
-}
-static void lpc32xx_gpo_set_value(struct gpio_chip *chip, unsigned pin,
-        int value)
-{
-        struct lpc32xx_gpio_chip *group = to_lpc32xx_gpio(chip);
-        __set_gpo_level_p3(group, pin, value);
-}
-static int lpc32xx_gpio_request(struct gpio_chip *chip, unsigned pin)
-{
-        if (pin < chip->ngpio)
-                return 0;
-        return -EINVAL;
-}
-static struct lpc32xx_gpio_chip lpc32xx_gpiochip[] = {
-        {
-                .chip = {
-                        .label                  = "gpio_p0",
-                        .direction_input        = lpc32xx_gpio_dir_input_p012,
-                        .get                    = lpc32xx_gpio_get_value_p012,
-                        .direction_output       = lpc32xx_gpio_dir_output_p012,
-                        .set                    = lpc32xx_gpio_set_value_p012,
-                        .request                = lpc32xx_gpio_request,
-                        .base                   = LPC32XX_GPIO_P0_GRP,
-                        .ngpio                  = LPC32XX_GPIO_P0_MAX,
-                        .names                  = gpio_p0_names,
-                        .can_sleep              = 0,
-                },
-                .gpio_grp = &gpio_grp_regs_p0,
-        },
-        {
-                .chip = {
-                        .label                  = "gpio_p1",
-                        .direction_input        = lpc32xx_gpio_dir_input_p012,
-                        .get                    = lpc32xx_gpio_get_value_p012,
-                        .direction_output       = lpc32xx_gpio_dir_output_p012,
-                        .set                    = lpc32xx_gpio_set_value_p012,
-                        .request                = lpc32xx_gpio_request,
-                        .base                   = LPC32XX_GPIO_P1_GRP,
-                        .ngpio                  = LPC32XX_GPIO_P1_MAX,
-                        .names                  = gpio_p1_names,
-                        .can_sleep              = 0,
-                },
-                .gpio_grp = &gpio_grp_regs_p1,
-        },
-        {
-                .chip = {
-                        .label                  = "gpio_p2",
-                        .direction_input        = lpc32xx_gpio_dir_input_p012,
-                        .get                    = lpc32xx_gpio_get_value_p012,
-                        .direction_output       = lpc32xx_gpio_dir_output_p012,
-                        .set                    = lpc32xx_gpio_set_value_p012,
-                        .request                = lpc32xx_gpio_request,
-                        .base                   = LPC32XX_GPIO_P2_GRP,
-                        .ngpio                  = LPC32XX_GPIO_P2_MAX,
-                        .names                  = gpio_p2_names,
-                        .can_sleep              = 0,
-                },
-                .gpio_grp = &gpio_grp_regs_p2,
-        },
-        {
-                .chip = {
-                        .label                  = "gpio_p3",
-                        .direction_input        = lpc32xx_gpio_dir_input_p3,
-                        .get                    = lpc32xx_gpio_get_value_p3,
-                        .direction_output       = lpc32xx_gpio_dir_output_p3,
-                        .set                    = lpc32xx_gpio_set_value_p3,
-                        .request                = lpc32xx_gpio_request,
-                        .base                   = LPC32XX_GPIO_P3_GRP,
-                        .ngpio                  = LPC32XX_GPIO_P3_MAX,
-                        .names                  = gpio_p3_names,
-                        .can_sleep              = 0,
-                },
-                .gpio_grp = &gpio_grp_regs_p3,
-        },
-        {
-                .chip = {
-                        .label                  = "gpi_p3",
-                        .direction_input        = lpc32xx_gpio_dir_in_always,
-                        .get                    = lpc32xx_gpi_get_value,
-                        .request                = lpc32xx_gpio_request,
-                        .base                   = LPC32XX_GPI_P3_GRP,
-                        .ngpio                  = LPC32XX_GPI_P3_MAX,
-                        .names                  = gpi_p3_names,
-                        .can_sleep              = 0,
-                },
-                .gpio_grp = &gpio_grp_regs_p3,
-        },
-        {
-                .chip = {
-                        .label                  = "gpo_p3",
-                        .direction_output       = lpc32xx_gpio_dir_out_always,
-                        .set                    = lpc32xx_gpo_set_value,
-                        .request                = lpc32xx_gpio_request,
-                        .base                   = LPC32XX_GPO_P3_GRP,
-                        .ngpio                  = LPC32XX_GPO_P3_MAX,
-                        .names                  = gpo_p3_names,
-                        .can_sleep              = 0,
-                },
-                .gpio_grp = &gpio_grp_regs_p3,
-        },
-};
-void __init lpc32xx_gpio_init(void)
-{
-        int i;
-        for (i = 0; i < ARRAY_SIZE(lpc32xx_gpiochip); i++)
-                gpiochip_add(&lpc32xx_gpiochip[i].chip);
-}
diff --git a/arch/arm/mach-lpc32xx/include/mach/debug-macro.S b/arch/arm/mach-lpc32xx/include/mach/debug-macro.S
index 629e744aeb9e..351bd6c84909 100644
--- a/arch/arm/mach-lpc32xx/include/mach/debug-macro.S
+++ b/arch/arm/mach-lpc32xx/include/mach/debug-macro.S
@@ -20,7 +20,7 @@
 * Debug output is hardcoded to standard UART 5
 */
-        .macro  addruart, rp, rv
+        .macro  addruart, rp, rv, tmp
        ldreq   \rp, =0x40090000
        ldrne   \rv, =0xF4090000
        .endm
diff --git a/arch/arm/mach-lpc32xx/include/mach/gpio-lpc32xx.h b/arch/arm/mach-lpc32xx/include/mach/gpio-lpc32xx.h
new file mode 100644
index 000000000000..1816e22a3479
--- /dev/null
+++ b/arch/arm/mach-lpc32xx/include/mach/gpio-lpc32xx.h
@@ -0,0 +1,50 @@
+/*
+ * Author: Kevin Wells <kevin.wells@nxp.com>
+ *
+ * Copyright (C) 2010 NXP Semiconductors
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#ifndef __MACH_GPIO_LPC32XX_H
+#define __MACH_GPIO_LPC32XX_H
+/*
+ * Note!
+ * Muxed GP pins need to be setup to the GP state in the board level
+ * code prior to using this driver.
+ * GPI pins : 28xP3 group
+ * GPO pins : 24xP3 group
+ * GPIO pins: 8xP0 group, 24xP1 group, 13xP2 group, 6xP3 group
+ */
+#define LPC32XX_GPIO_P0_MAX 8
+#define LPC32XX_GPIO_P1_MAX 24
+#define LPC32XX_GPIO_P2_MAX 13
+#define LPC32XX_GPIO_P3_MAX 6
+#define LPC32XX_GPI_P3_MAX 28
+#define LPC32XX_GPO_P3_MAX 24
+#define LPC32XX_GPIO_P0_GRP 0
+#define LPC32XX_GPIO_P1_GRP (LPC32XX_GPIO_P0_GRP + LPC32XX_GPIO_P0_MAX)
+#define LPC32XX_GPIO_P2_GRP (LPC32XX_GPIO_P1_GRP + LPC32XX_GPIO_P1_MAX)
+#define LPC32XX_GPIO_P3_GRP (LPC32XX_GPIO_P2_GRP + LPC32XX_GPIO_P2_MAX)
+#define LPC32XX_GPI_P3_GRP (LPC32XX_GPIO_P3_GRP + LPC32XX_GPIO_P3_MAX)
+#define LPC32XX_GPO_P3_GRP (LPC32XX_GPI_P3_GRP + LPC32XX_GPI_P3_MAX)
+/*
+ * A specific GPIO can be selected with this macro
+ * ie, GPIO_05 can be selected with LPC32XX_GPIO(LPC32XX_GPIO_P3_GRP, 5)
+ * See the LPC32x0 User's guide for GPIO group numbers
+ */
+#define LPC32XX_GPIO(x, y) ((x) + (y))
+#endif /* __MACH_GPIO_LPC32XX_H */
diff --git a/arch/arm/mach-lpc32xx/include/mach/gpio.h b/arch/arm/mach-lpc32xx/include/mach/gpio.h
index 67d03da1eee9..e69de29bb2d1 100644
--- a/arch/arm/mach-lpc32xx/include/mach/gpio.h
+++ b/arch/arm/mach-lpc32xx/include/mach/gpio.h
@@ -1,74 +0,0 @@
-/*
- * arch/arm/mach-lpc32xx/include/mach/gpio.h
- *
- * Author: Kevin Wells <kevin.wells@nxp.com>
- *
- * Copyright (C) 2010 NXP Semiconductors
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-#ifndef __ASM_ARCH_GPIO_H
-#define __ASM_ARCH_GPIO_H
-#include <asm-generic/gpio.h>
-/*
- * Note!
- * Muxed GP pins need to be setup to the GP state in the board level
- * code prior to using this driver.
- * GPI pins : 28xP3 group
- * GPO pins : 24xP3 group
- * GPIO pins: 8xP0 group, 24xP1 group, 13xP2 group, 6xP3 group
- */
-#define LPC32XX_GPIO_P0_MAX 8
-#define LPC32XX_GPIO_P1_MAX 24
-#define LPC32XX_GPIO_P2_MAX 13
-#define LPC32XX_GPIO_P3_MAX 6
-#define LPC32XX_GPI_P3_MAX 28
-#define LPC32XX_GPO_P3_MAX 24
-#define LPC32XX_GPIO_P0_GRP 0
-#define LPC32XX_GPIO_P1_GRP (LPC32XX_GPIO_P0_GRP + LPC32XX_GPIO_P0_MAX)
-#define LPC32XX_GPIO_P2_GRP (LPC32XX_GPIO_P1_GRP + LPC32XX_GPIO_P1_MAX)
-#define LPC32XX_GPIO_P3_GRP (LPC32XX_GPIO_P2_GRP + LPC32XX_GPIO_P2_MAX)
-#define LPC32XX_GPI_P3_GRP (LPC32XX_GPIO_P3_GRP + LPC32XX_GPIO_P3_MAX)
-#define LPC32XX_GPO_P3_GRP (LPC32XX_GPI_P3_GRP + LPC32XX_GPI_P3_MAX)
-/*
- * A specific GPIO can be selected with this macro
- * ie, GPIO_05 can be selected with LPC32XX_GPIO(LPC32XX_GPIO_P3_GRP, 5)
- * See the LPC32x0 User's guide for GPIO group numbers
- */
-#define LPC32XX_GPIO(x, y) ((x) + (y))
-static inline int gpio_get_value(unsigned gpio)
-{
-        return __gpio_get_value(gpio);
-}
-static inline void gpio_set_value(unsigned gpio, int value)
-{
-        __gpio_set_value(gpio, value);
-}
-static inline int gpio_cansleep(unsigned gpio)
-{
-        return __gpio_cansleep(gpio);
-}
-static inline int gpio_to_irq(unsigned gpio)
-{
-        return __gpio_to_irq(gpio);
-}
-#endif
diff --git a/arch/arm/mach-lpc32xx/include/mach/memory.h b/arch/arm/mach-lpc32xx/include/mach/memory.h
deleted file mode 100644
index a647dd624afa..000000000000
--- a/arch/arm/mach-lpc32xx/include/mach/memory.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * arch/arm/mach-lpc32xx/include/mach/memory.h
- *
- * Author: Kevin Wells <kevin.wells@nxp.com>
- *
- * Copyright (C) 2010 NXP Semiconductors
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
-/*
- * Physical DRAM offset of bank 0
- */
-#define PLAT_PHYS_OFFSET        UL(0x80000000)
-#endif
diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy3250.c
index 9b621e14d16a..6d2f0d1b9373 100644
--- a/arch/arm/mach-lpc32xx/phy3250.c
+++ b/arch/arm/mach-lpc32xx/phy3250.c
@@ -37,6 +37,7 @@
 #include <mach/hardware.h>
 #include <mach/platform.h>
+#include <mach/gpio-lpc32xx.h>
 #include "common.h"
 /*
diff --git a/arch/arm/mach-mmp/Kconfig b/arch/arm/mach-mmp/Kconfig
index 56ef5f6c8116..323d4c9e9f44 100644
--- a/arch/arm/mach-mmp/Kconfig
+++ b/arch/arm/mach-mmp/Kconfig
@@ -77,7 +77,7 @@ config MACH_TETON_BGA
          Say 'Y' here if you want to support the Marvell PXA168-based
          Teton BGA Development Board.
-config MACH_SHEEVAD
+config MACH_GPLUGD
        bool "Marvell's PXA168 GuruPlug Display (gplugD) Board"
        select CPU_PXA168
        help
diff --git a/arch/arm/mach-mmp/Makefile b/arch/arm/mach-mmp/Makefile
index b0ac942327aa..8f948f981646 100644
--- a/arch/arm/mach-mmp/Makefile
+++ b/arch/arm/mach-mmp/Makefile
@@ -19,4 +19,4 @@ obj-$(CONFIG_MACH_BROWNSTONE)	+= brownstone.o
 obj-$(CONFIG_MACH_FLINT)        += flint.o
 obj-$(CONFIG_MACH_MARVELL_JASPER) += jasper.o
 obj-$(CONFIG_MACH_TETON_BGA)    += teton_bga.o
-obj-$(CONFIG_MACH_SHEEVAD)      += gplugd.o
+obj-$(CONFIG_MACH_GPLUGD)       += gplugd.o
diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c
index 06b5fa853c93..833c3a2784aa 100644
--- a/arch/arm/mach-mmp/aspenite.c
+++ b/arch/arm/mach-mmp/aspenite.c
@@ -8,7 +8,7 @@
 *  it under the terms of the GNU General Public License version 2 as
 *  publishhed by the Free Software Foundation.
 */
+#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
@@ -17,13 +17,13 @@
 #include <linux/mtd/partitions.h>
 #include <linux/mtd/nand.h>
 #include <linux/interrupt.h>
+#include <linux/gpio.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <mach/addr-map.h>
 #include <mach/mfp-pxa168.h>
 #include <mach/pxa168.h>
-#include <mach/gpio.h>
 #include <video/pxa168fb.h>
 #include <linux/input.h>
 #include <plat/pxa27x_keypad.h>
diff --git a/arch/arm/mach-mmp/brownstone.c b/arch/arm/mach-mmp/brownstone.c
index c79162a50f28..e411252e3d39 100644
--- a/arch/arm/mach-mmp/brownstone.c
+++ b/arch/arm/mach-mmp/brownstone.c
@@ -14,7 +14,6 @@
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
-#include <linux/gpio.h>
 #include <linux/regulator/machine.h>
 #include <linux/regulator/max8649.h>
 #include <linux/regulator/fixed.h>
diff --git a/arch/arm/mach-mmp/clock.h b/arch/arm/mach-mmp/clock.h
index 3143e994e672..149b30cd1469 100644
--- a/arch/arm/mach-mmp/clock.h
+++ b/arch/arm/mach-mmp/clock.h
@@ -30,7 +30,7 @@ extern struct clkops apmu_clk_ops;
 #define APBC_CLK(_name, _reg, _fnclksel, _rate)                 \
 struct clk clk_##_name = {                                      \
-                .clk_rst        = (void __iomem *)APBC_##_reg,  \
+                .clk_rst        = APBC_##_reg,                  \
                .fnclksel       = _fnclksel,                    \
                .rate           = _rate,                        \
                .ops            = &apbc_clk_ops,                \
@@ -38,7 +38,7 @@ struct clk clk_##_name = {					\
 #define APBC_CLK_OPS(_name, _reg, _fnclksel, _rate, _ops)       \
 struct clk clk_##_name = {                                      \
-                .clk_rst        = (void __iomem *)APBC_##_reg,  \
+                .clk_rst        = APBC_##_reg,                  \
                .fnclksel       = _fnclksel,                    \
                .rate           = _rate,                        \
                .ops            = _ops,                         \
@@ -46,7 +46,7 @@ struct clk clk_##_name = {					\
 #define APMU_CLK(_name, _reg, _eval, _rate)                     \
 struct clk clk_##_name = {                                      \
-                .clk_rst        = (void __iomem *)APMU_##_reg,  \
+                .clk_rst        = APMU_##_reg,                  \
                .enable_val     = _eval,                        \
                .rate           = _rate,                        \
                .ops            = &apmu_clk_ops,                \
@@ -54,7 +54,7 @@ struct clk clk_##_name = {					\
 #define APMU_CLK_OPS(_name, _reg, _eval, _rate, _ops)           \
 struct clk clk_##_name = {                                      \
-                .clk_rst        = (void __iomem *)APMU_##_reg,  \
+                .clk_rst        = APMU_##_reg,                  \
                .enable_val     = _eval,                        \
                .rate           = _rate,                        \
                .ops            = _ops,                         \
diff --git a/arch/arm/mach-mmp/common.c b/arch/arm/mach-mmp/common.c
index 0ec0ca80bb3e..5720674739f0 100644
--- a/arch/arm/mach-mmp/common.c
+++ b/arch/arm/mach-mmp/common.c
@@ -27,12 +27,12 @@ EXPORT_SYMBOL(mmp_chip_id);
 static struct map_desc standard_io_desc[] __initdata = {
        {
                .pfn            = __phys_to_pfn(APB_PHYS_BASE),
-                .virtual        = APB_VIRT_BASE,
+                .virtual        = (unsigned long)APB_VIRT_BASE,
                .length         = APB_PHYS_SIZE,
                .type           = MT_DEVICE,
        }, {
                .pfn            = __phys_to_pfn(AXI_PHYS_BASE),
-                .virtual        = AXI_VIRT_BASE,
+                .virtual        = (unsigned long)AXI_VIRT_BASE,
                .length         = AXI_PHYS_SIZE,
                .type           = MT_DEVICE,
        },
diff --git a/arch/arm/mach-mmp/gplugd.c b/arch/arm/mach-mmp/gplugd.c
index 98e25d9aaab6..69156568bc41 100644
--- a/arch/arm/mach-mmp/gplugd.c
+++ b/arch/arm/mach-mmp/gplugd.c
@@ -9,11 +9,11 @@
 */
 #include <linux/init.h>
+#include <linux/gpio.h>
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>
-#include <mach/gpio.h>
 #include <mach/pxa168.h>
 #include <mach/mfp-pxa168.h>
@@ -188,7 +188,7 @@ static void __init gplugd_init(void)
        pxa168_add_eth(&gplugd_eth_platform_data);
 }
-MACHINE_START(SHEEVAD, "PXA168-based GuruPlug Display (gplugD) Platform")
+MACHINE_START(GPLUGD, "PXA168-based GuruPlug Display (gplugD) Platform")
        .map_io         = mmp_map_io,
        .nr_irqs        = IRQ_BOARD_START,
        .init_irq       = pxa168_init_irq,
diff --git a/arch/arm/mach-mmp/include/mach/addr-map.h b/arch/arm/mach-mmp/include/mach/addr-map.h
index 3254089a644d..3e404acd6ff4 100644
--- a/arch/arm/mach-mmp/include/mach/addr-map.h
+++ b/arch/arm/mach-mmp/include/mach/addr-map.h
@@ -11,6 +11,12 @@
 #ifndef __ASM_MACH_ADDR_MAP_H
 #define __ASM_MACH_ADDR_MAP_H
+#ifndef __ASSEMBLER__
+#define IOMEM(x)        ((void __iomem *)(x))
+#else
+#define IOMEM(x)        (x)
+#endif
 /* APB - Application Subsystem Peripheral Bus
 *
 * NOTE: the DMA controller registers are actually on the AXI fabric #1
@@ -18,11 +24,11 @@
 * peripherals on APB, let's count it into the ABP mapping area.
 */
 #define APB_PHYS_BASE           0xd4000000
-#define APB_VIRT_BASE           0xfe000000
+#define APB_VIRT_BASE           IOMEM(0xfe000000)
 #define APB_PHYS_SIZE           0x00200000
 #define AXI_PHYS_BASE           0xd4200000
-#define AXI_VIRT_BASE           0xfe200000
+#define AXI_VIRT_BASE           IOMEM(0xfe200000)
 #define AXI_PHYS_SIZE           0x00200000
 /* Static Memory Controller - Chip Select 0 and 1 */
diff --git a/arch/arm/mach-mmp/include/mach/debug-macro.S b/arch/arm/mach-mmp/include/mach/debug-macro.S
index 7e2ebd3efc7c..b6f14d203c25 100644
--- a/arch/arm/mach-mmp/include/mach/debug-macro.S
+++ b/arch/arm/mach-mmp/include/mach/debug-macro.S
@@ -11,7 +11,7 @@
 #include <mach/addr-map.h>
-                .macro  addruart, rp, rv
+                .macro  addruart, rp, rv, tmp
                ldr     \rp, =APB_PHYS_BASE             @ physical
                ldr     \rv, =APB_VIRT_BASE             @ virtual
                orr     \rp, \rp, #0x00017000
diff --git a/arch/arm/mach-mmp/include/mach/gpio-pxa.h b/arch/arm/mach-mmp/include/mach/gpio-pxa.h
new file mode 100644
index 000000000000..d14eeaf16322
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/gpio-pxa.h
@@ -0,0 +1,30 @@
+#ifndef __ASM_MACH_GPIO_PXA_H
+#define __ASM_MACH_GPIO_PXA_H
+#include <mach/addr-map.h>
+#include <mach/irqs.h>
+#define GPIO_REGS_VIRT  (APB_VIRT_BASE + 0x19000)
+#define BANK_OFF(n)     (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
+#define GPIO_REG(x)     (GPIO_REGS_VIRT + (x))
+#define NR_BUILTIN_GPIO         IRQ_GPIO_NUM
+#define gpio_to_bank(gpio)      ((gpio) >> 5)
+/* NOTE: these macros are defined here to make optimization of
+ * gpio_{get,set}_value() to work when 'gpio' is a constant.
+ * Usage of these macros otherwise is no longer recommended,
+ * use generic GPIO API whenever possible.
+ */
+#define GPIO_bit(gpio)  (1 << ((gpio) & 0x1f))
+#define GPLR(x)         GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x00)
+#define GPDR(x)         GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x0c)
+#define GPSR(x)         GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x18)
+#define GPCR(x)         GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x24)
+#include <plat/gpio-pxa.h>
+#endif /* __ASM_MACH_GPIO_PXA_H */
diff --git a/arch/arm/mach-mmp/include/mach/gpio.h b/arch/arm/mach-mmp/include/mach/gpio.h
index 7bfb827f3fe3..681262359d1c 100644
--- a/arch/arm/mach-mmp/include/mach/gpio.h
+++ b/arch/arm/mach-mmp/include/mach/gpio.h
@@ -1,36 +1,13 @@
 #ifndef __ASM_MACH_GPIO_H
 #define __ASM_MACH_GPIO_H
-#include <mach/addr-map.h>
-#include <mach/irqs.h>
 #include <asm-generic/gpio.h>
-#define GPIO_REGS_VIRT  (APB_VIRT_BASE + 0x19000)
-#define BANK_OFF(n)     (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
-#define GPIO_REG(x)     (*((volatile u32 *)(GPIO_REGS_VIRT + (x))))
-#define NR_BUILTIN_GPIO         IRQ_GPIO_NUM
-#define gpio_to_bank(gpio)      ((gpio) >> 5)
 #define gpio_to_irq(gpio)       (IRQ_GPIO_START + (gpio))
 #define irq_to_gpio(irq)        ((irq) - IRQ_GPIO_START)
 #define __gpio_is_inverted(gpio)        (0)
 #define __gpio_is_occupied(gpio)        (0)
-/* NOTE: these macros are defined here to make optimization of
- * gpio_{get,set}_value() to work when 'gpio' is a constant.
- * Usage of these macros otherwise is no longer recommended,
- * use generic GPIO API whenever possible.
- */
-#define GPIO_bit(gpio)  (1 << ((gpio) & 0x1f))
-#define GPLR(x)         GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x00)
-#define GPDR(x)         GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x0c)
-#define GPSR(x)         GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x18)
-#define GPCR(x)         GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x24)
 #include <plat/gpio.h>
 #endif /* __ASM_MACH_GPIO_H */
diff --git a/arch/arm/mach-mmp/include/mach/memory.h b/arch/arm/mach-mmp/include/mach/memory.h
deleted file mode 100644
index d68b50a2d6a0..000000000000
--- a/arch/arm/mach-mmp/include/mach/memory.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/*
- * linux/arch/arm/mach-mmp/include/mach/memory.h
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __ASM_MACH_MEMORY_H
-#define __ASM_MACH_MEMORY_H
-#define PLAT_PHYS_OFFSET        UL(0x00000000)
-#endif /* __ASM_MACH_MEMORY_H */
diff --git a/arch/arm/mach-mmp/jasper.c b/arch/arm/mach-mmp/jasper.c
index 5d6421d63254..8bfac6612623 100644
--- a/arch/arm/mach-mmp/jasper.c
+++ b/arch/arm/mach-mmp/jasper.c
@@ -14,7 +14,6 @@
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
-#include <linux/gpio.h>
 #include <linux/regulator/machine.h>
 #include <linux/regulator/max8649.h>
 #include <linux/mfd/max8925.h>
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c
index 079c18861d5c..7a7e8e4dde41 100644
--- a/arch/arm/mach-mmp/mmp2.c
+++ b/arch/arm/mach-mmp/mmp2.c
@@ -9,7 +9,6 @@
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
@@ -25,7 +24,7 @@
 #include <mach/irqs.h>
 #include <mach/dma.h>
 #include <mach/mfp.h>
-#include <mach/gpio.h>
+#include <mach/gpio-pxa.h>
 #include <mach/devices.h>
 #include <mach/mmp2.h>
@@ -87,7 +86,8 @@ static struct mfp_addr_map mmp2_addr_map[] __initdata = {
 void mmp2_clear_pmic_int(void)
 {
-        unsigned long mfpr_pmic, data;
+        void __iomem *mfpr_pmic;
+        unsigned long data;
        mfpr_pmic = APB_VIRT_BASE + 0x1e000 + 0x2c4;
        data = __raw_readl(mfpr_pmic);
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
index 0156f535dae7..50c1763911ff 100644
--- a/arch/arm/mach-mmp/pxa168.c
+++ b/arch/arm/mach-mmp/pxa168.c
@@ -7,7 +7,6 @@
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
@@ -21,7 +20,7 @@
 #include <mach/regs-apbc.h>
 #include <mach/regs-apmu.h>
 #include <mach/irqs.h>
-#include <mach/gpio.h>
+#include <mach/gpio-pxa.h>
 #include <mach/dma.h>
 #include <mach/devices.h>
 #include <mach/mfp.h>
diff --git a/arch/arm/mach-mmp/pxa910.c b/arch/arm/mach-mmp/pxa910.c
index 1464607aa60d..4ebbfbba39fc 100644
--- a/arch/arm/mach-mmp/pxa910.c
+++ b/arch/arm/mach-mmp/pxa910.c
@@ -7,7 +7,6 @@
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
@@ -20,7 +19,7 @@
 #include <mach/regs-apmu.h>
 #include <mach/cputype.h>
 #include <mach/irqs.h>
-#include <mach/gpio.h>
+#include <mach/gpio-pxa.h>
 #include <mach/dma.h>
 #include <mach/mfp.h>
 #include <mach/devices.h>
diff --git a/arch/arm/mach-mmp/tavorevb.c b/arch/arm/mach-mmp/tavorevb.c
index c296b75c4453..eb5be879fd8c 100644
--- a/arch/arm/mach-mmp/tavorevb.c
+++ b/arch/arm/mach-mmp/tavorevb.c
@@ -7,18 +7,18 @@
 *  it under the terms of the GNU General Public License version 2 as
 *  publishhed by the Free Software Foundation.
 */
+#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
 #include <linux/smc91x.h>
+#include <linux/gpio.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <mach/addr-map.h>
 #include <mach/mfp-pxa910.h>
 #include <mach/pxa910.h>
-#include <mach/gpio.h>
 #include "common.h"
diff --git a/arch/arm/mach-msm/board-msm7x27.c b/arch/arm/mach-msm/board-msm7x27.c
index a80765533f13..6d84ee740df4 100644
--- a/arch/arm/mach-msm/board-msm7x27.c
+++ b/arch/arm/mach-msm/board-msm7x27.c
@@ -13,7 +13,7 @@
 * GNU General Public License for more details.
 *
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
@@ -34,7 +34,6 @@
 #include <mach/vreg.h>
 #include <mach/mpp.h>
-#include <mach/gpio.h>
 #include <mach/board.h>
 #include <mach/msm_iomap.h>
diff --git a/arch/arm/mach-msm/board-msm7x30.c b/arch/arm/mach-msm/board-msm7x30.c
index 5a2ab6855183..71de5062c71e 100644
--- a/arch/arm/mach-msm/board-msm7x30.c
+++ b/arch/arm/mach-msm/board-msm7x30.c
@@ -14,7 +14,7 @@
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
 * 02110-1301, USA.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/irq.h>
 #include <linux/gpio.h>
@@ -24,13 +24,13 @@
 #include <linux/smsc911x.h>
 #include <linux/usb/msm_hsusb.h>
 #include <linux/clkdev.h>
+#include <linux/memblock.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/memory.h>
 #include <asm/setup.h>
-#include <mach/gpio.h>
 #include <mach/board.h>
 #include <mach/msm_iomap.h>
 #include <mach/dma.h>
@@ -42,6 +42,21 @@
 extern struct sys_timer msm_timer;
+static void __init msm7x30_fixup(struct machine_desc *desc, struct tag *tag,
+                         char **cmdline, struct meminfo *mi)
+{
+        for (; tag->hdr.size; tag = tag_next(tag))
+                if (tag->hdr.tag == ATAG_MEM && tag->u.mem.start == 0x200000) {
+                        tag->u.mem.start = 0;
+                        tag->u.mem.size += SZ_2M;
+                }
+}
+static void __init msm7x30_reserve(void)
+{
+        memblock_remove(0x0, SZ_2M);
+}
 static int hsusb_phy_init_seq[] = {
        0x30, 0x32,     /* Enable and set Pre-Emphasis Depth to 20% */
        0x02, 0x36,     /* Disable CDR Auto Reset feature */
@@ -107,6 +122,8 @@ static void __init msm7x30_map_io(void)
 MACHINE_START(MSM7X30_SURF, "QCT MSM7X30 SURF")
        .atag_offset = 0x100,
+        .fixup = msm7x30_fixup,
+        .reserve = msm7x30_reserve,
        .map_io = msm7x30_map_io,
        .init_irq = msm7x30_init_irq,
        .init_machine = msm7x30_init,
@@ -115,6 +132,8 @@ MACHINE_END
 MACHINE_START(MSM7X30_FFA, "QCT MSM7X30 FFA")
        .atag_offset = 0x100,
+        .fixup = msm7x30_fixup,
+        .reserve = msm7x30_reserve,
        .map_io = msm7x30_map_io,
        .init_irq = msm7x30_init_irq,
        .init_machine = msm7x30_init,
@@ -123,6 +142,8 @@ MACHINE_END
 MACHINE_START(MSM7X30_FLUID, "QCT MSM7X30 FLUID")
        .atag_offset = 0x100,
+        .fixup = msm7x30_fixup,
+        .reserve = msm7x30_reserve,
        .map_io = msm7x30_map_io,
        .init_irq = msm7x30_init_irq,
        .init_machine = msm7x30_init,
diff --git a/arch/arm/mach-msm/board-msm8960.c b/arch/arm/mach-msm/board-msm8960.c
index 35c7ceeb3f29..b04468e7d00e 100644
--- a/arch/arm/mach-msm/board-msm8960.c
+++ b/arch/arm/mach-msm/board-msm8960.c
@@ -20,16 +20,34 @@
 #include <linux/io.h>
 #include <linux/irq.h>
 #include <linux/clkdev.h>
+#include <linux/memblock.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/hardware/gic.h>
+#include <asm/setup.h>
 #include <mach/board.h>
 #include <mach/msm_iomap.h>
 #include "devices.h"
+static void __init msm8960_fixup(struct machine_desc *desc, struct tag *tag,
+                         char **cmdline, struct meminfo *mi)
+{
+        for (; tag->hdr.size; tag = tag_next(tag))
+                if (tag->hdr.tag == ATAG_MEM &&
+                                tag->u.mem.start == 0x40200000) {
+                        tag->u.mem.start = 0x40000000;
+                        tag->u.mem.size += SZ_2M;
+                }
+}
+static void __init msm8960_reserve(void)
+{
+        memblock_remove(0x40000000, SZ_2M);
+}
 static void __init msm8960_map_io(void)
 {
        msm_map_msm8960_io();
@@ -76,6 +94,8 @@ static void __init msm8960_rumi3_init(void)
 }
 MACHINE_START(MSM8960_SIM, "QCT MSM8960 SIMULATOR")
+        .fixup = msm8960_fixup,
+        .reserve = msm8960_reserve,
        .map_io = msm8960_map_io,
        .init_irq = msm8960_init_irq,
        .timer = &msm_timer,
@@ -83,6 +103,8 @@ MACHINE_START(MSM8960_SIM, "QCT MSM8960 SIMULATOR")
 MACHINE_END
 MACHINE_START(MSM8960_RUMI3, "QCT MSM8960 RUMI3")
+        .fixup = msm8960_fixup,
+        .reserve = msm8960_reserve,
        .map_io = msm8960_map_io,
        .init_irq = msm8960_init_irq,
        .timer = &msm_timer,
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c
index 1163b6fd05d2..9221f54778be 100644
--- a/arch/arm/mach-msm/board-msm8x60.c
+++ b/arch/arm/mach-msm/board-msm8x60.c
@@ -20,14 +20,31 @@
 #include <linux/platform_device.h>
 #include <linux/io.h>
 #include <linux/irq.h>
+#include <linux/memblock.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/hardware/gic.h>
+#include <asm/setup.h>
 #include <mach/board.h>
 #include <mach/msm_iomap.h>
+static void __init msm8x60_fixup(struct machine_desc *desc, struct tag *tag,
+                         char **cmdline, struct meminfo *mi)
+{
+        for (; tag->hdr.size; tag = tag_next(tag))
+                if (tag->hdr.tag == ATAG_MEM &&
+                                tag->u.mem.start == 0x40200000) {
+                        tag->u.mem.start = 0x40000000;
+                        tag->u.mem.size += SZ_2M;
+                }
+}
+static void __init msm8x60_reserve(void)
+{
+        memblock_remove(0x40000000, SZ_2M);
+}
 static void __init msm8x60_map_io(void)
 {
@@ -65,6 +82,8 @@ static void __init msm8x60_init(void)
 }
 MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3")
+        .fixup = msm8x60_fixup,
+        .reserve = msm8x60_reserve,
        .map_io = msm8x60_map_io,
        .init_irq = msm8x60_init_irq,
        .init_machine = msm8x60_init,
@@ -72,6 +91,8 @@ MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3")
 MACHINE_END
 MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF")
+        .fixup = msm8x60_fixup,
+        .reserve = msm8x60_reserve,
        .map_io = msm8x60_map_io,
        .init_irq = msm8x60_init_irq,
        .init_machine = msm8x60_init,
@@ -79,6 +100,8 @@ MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF")
 MACHINE_END
 MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR")
+        .fixup = msm8x60_fixup,
+        .reserve = msm8x60_reserve,
        .map_io = msm8x60_map_io,
        .init_irq = msm8x60_init_irq,
        .init_machine = msm8x60_init,
@@ -86,6 +109,8 @@ MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR")
 MACHINE_END
 MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA")
+        .fixup = msm8x60_fixup,
+        .reserve = msm8x60_reserve,
        .map_io = msm8x60_map_io,
        .init_irq = msm8x60_init_irq,
        .init_machine = msm8x60_init,
diff --git a/arch/arm/mach-msm/board-qsd8x50.c b/arch/arm/mach-msm/board-qsd8x50.c
index 51109b1f4342..7e8909c978c3 100644
--- a/arch/arm/mach-msm/board-qsd8x50.c
+++ b/arch/arm/mach-msm/board-qsd8x50.c
@@ -14,7 +14,7 @@
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
 * 02110-1301, USA.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/irq.h>
 #include <linux/gpio.h>
@@ -32,7 +32,6 @@
 #include <mach/board.h>
 #include <mach/irqs.h>
 #include <mach/sirc.h>
-#include <mach/gpio.h>
 #include <mach/vreg.h>
 #include <mach/mmc.h>
diff --git a/arch/arm/mach-msm/board-sapphire.c b/arch/arm/mach-msm/board-sapphire.c
index dc0bcb5a6b9a..afa9293d5800 100644
--- a/arch/arm/mach-msm/board-sapphire.c
+++ b/arch/arm/mach-msm/board-sapphire.c
@@ -11,7 +11,7 @@
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
@@ -22,7 +22,6 @@
 #include <linux/delay.h>
-#include <asm/gpio.h>
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
diff --git a/arch/arm/mach-msm/board-trout-mmc.c b/arch/arm/mach-msm/board-trout-mmc.c
index f7a9724788b0..8650342b7493 100644
--- a/arch/arm/mach-msm/board-trout-mmc.c
+++ b/arch/arm/mach-msm/board-trout-mmc.c
@@ -1,7 +1,7 @@
 /* linux/arch/arm/mach-msm/board-trout-mmc.c
 ** Author: Brian Swetland <swetland@google.com>
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
@@ -11,7 +11,6 @@
 #include <linux/err.h>
 #include <linux/debugfs.h>
-#include <asm/gpio.h>
 #include <asm/io.h>
 #include <mach/vreg.h>
diff --git a/arch/arm/mach-msm/board-trout-panel.c b/arch/arm/mach-msm/board-trout-panel.c
index 729bb49a44ca..25105c1027fe 100644
--- a/arch/arm/mach-msm/board-trout-panel.c
+++ b/arch/arm/mach-msm/board-trout-panel.c
@@ -1,7 +1,7 @@
 /* linux/arch/arm/mach-msm/board-trout-mddi.c
 ** Author: Brian Swetland <swetland@google.com>
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
@@ -11,7 +11,6 @@
 #include <linux/err.h>
 #include <asm/io.h>
-#include <asm/gpio.h>
 #include <asm/mach-types.h>
 #include <mach/msm_fb.h>
diff --git a/arch/arm/mach-msm/include/mach/debug-macro.S b/arch/arm/mach-msm/include/mach/debug-macro.S
index 646b99ebc773..2dc73ccddb11 100644
--- a/arch/arm/mach-msm/include/mach/debug-macro.S
+++ b/arch/arm/mach-msm/include/mach/debug-macro.S
@@ -20,7 +20,7 @@
 #include <mach/msm_iomap.h>
 #if defined(CONFIG_HAS_MSM_DEBUG_UART_PHYS) && !defined(CONFIG_MSM_DEBUG_UART_NONE)
-        .macro  addruart, rp, rv
+        .macro  addruart, rp, rv, tmp
        ldr     \rp, =MSM_DEBUG_UART_PHYS
        ldr     \rv, =MSM_DEBUG_UART_BASE
        .endm
@@ -37,7 +37,7 @@
        beq     1001b
        .endm
 #else
-        .macro  addruart, rp, rv
+        .macro  addruart, rp, rv, tmp
        mov     \rv, #0xff000000
        orr     \rv, \rv, #0x00f00000
        .endm
diff --git a/arch/arm/mach-msm/include/mach/gpio.h b/arch/arm/mach-msm/include/mach/gpio.h
index 36ad50d3bfaa..40a8c178f10d 100644
--- a/arch/arm/mach-msm/include/mach/gpio.h
+++ b/arch/arm/mach-msm/include/mach/gpio.h
@@ -1,26 +1 @@
-/*
+/* empty */
- * Copyright (C) 2007 Google, Inc.
- * Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved.
- * Author: Mike Lockwood <lockwood@android.com>
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-#ifndef __ASM_ARCH_MSM_GPIO_H
-#define __ASM_ARCH_MSM_GPIO_H
-#include <asm-generic/gpio.h>
-#define gpio_get_value  __gpio_get_value
-#define gpio_set_value  __gpio_set_value
-#define gpio_cansleep   __gpio_cansleep
-#define gpio_to_irq     __gpio_to_irq
-#endif /* __ASM_ARCH_MSM_GPIO_H */
diff --git a/arch/arm/mach-msm/include/mach/memory.h b/arch/arm/mach-msm/include/mach/memory.h
deleted file mode 100644
index f2f8d299ba95..000000000000
--- a/arch/arm/mach-msm/include/mach/memory.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/* arch/arm/mach-msm/include/mach/memory.h
- *
- * Copyright (C) 2007 Google, Inc.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
-/* physical offset of RAM */
-#if defined(CONFIG_ARCH_QSD8X50) && defined(CONFIG_MSM_SOC_REV_A)
-#define PLAT_PHYS_OFFSET                UL(0x00000000)
-#elif defined(CONFIG_ARCH_QSD8X50)
-#define PLAT_PHYS_OFFSET                UL(0x20000000)
-#elif defined(CONFIG_ARCH_MSM7X30)
-#define PLAT_PHYS_OFFSET                UL(0x00200000)
-#elif defined(CONFIG_ARCH_MSM8X60)
-#define PLAT_PHYS_OFFSET                UL(0x40200000)
-#elif defined(CONFIG_ARCH_MSM8960)
-#define PLAT_PHYS_OFFSET                UL(0x40200000)
-#else
-#define PLAT_PHYS_OFFSET                UL(0x10000000)
-#endif
-#endif
diff --git a/arch/arm/mach-mv78xx0/include/mach/debug-macro.S b/arch/arm/mach-mv78xx0/include/mach/debug-macro.S
index 04891428e48b..a7df02b049b7 100644
--- a/arch/arm/mach-mv78xx0/include/mach/debug-macro.S
+++ b/arch/arm/mach-mv78xx0/include/mach/debug-macro.S
@@ -8,7 +8,7 @@
 #include <mach/mv78xx0.h>
-        .macro  addruart, rp, rv
+        .macro  addruart, rp, rv, tmp
        ldr     \rp, =MV78XX0_REGS_PHYS_BASE
        ldr     \rv, =MV78XX0_REGS_VIRT_BASE
        orr     \rp, \rp, #0x00012000
diff --git a/arch/arm/mach-mv78xx0/include/mach/memory.h b/arch/arm/mach-mv78xx0/include/mach/memory.h
deleted file mode 100644
index a648c51f2e42..000000000000
--- a/arch/arm/mach-mv78xx0/include/mach/memory.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/*
- * arch/arm/mach-mv78xx0/include/mach/memory.h
- */
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
-#define PLAT_PHYS_OFFSET                UL(0x00000000)
-#endif
diff --git a/arch/arm/mach-mv78xx0/irq.c b/arch/arm/mach-mv78xx0/irq.c
index 3e24431bb5ea..e421b701663b 100644
--- a/arch/arm/mach-mv78xx0/irq.c
+++ b/arch/arm/mach-mv78xx0/irq.c
@@ -7,12 +7,11 @@
 * License version 2.  This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/pci.h>
 #include <linux/irq.h>
-#include <asm/gpio.h>
 #include <mach/bridge-regs.h>
 #include <plat/irq.h>
 #include "common.h"
diff --git a/arch/arm/mach-mv78xx0/mpp.c b/arch/arm/mach-mv78xx0/mpp.c
index 59b7686b9209..cf4e494d44bf 100644
--- a/arch/arm/mach-mv78xx0/mpp.c
+++ b/arch/arm/mach-mv78xx0/mpp.c
@@ -7,13 +7,12 @@
 * License version 2.  This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/mbus.h>
 #include <linux/io.h>
 #include <plat/mpp.h>
-#include <asm/gpio.h>
 #include <mach/hardware.h>
 #include "common.h"
 #include "mpp.h"
diff --git a/arch/arm/mach-mx5/pm-imx5.c b/arch/arm/mach-mx5/pm-imx5.c
index 0624fb8edffb..98052fc852c7 100644
--- a/arch/arm/mach-mx5/pm-imx5.c
+++ b/arch/arm/mach-mx5/pm-imx5.c
@@ -20,9 +20,13 @@
 static struct clk *gpc_dvfs_clk;
+static int mx5_suspend_prepare(void)
+{
+        return clk_enable(gpc_dvfs_clk);
+}
 static int mx5_suspend_enter(suspend_state_t state)
 {
-        clk_enable(gpc_dvfs_clk);
        switch (state) {
        case PM_SUSPEND_MEM:
                mx5_cpu_lp_set(STOP_POWER_OFF);
@@ -43,11 +47,14 @@ static int mx5_suspend_enter(suspend_state_t state)
                __raw_writel(0, MXC_SRPG_EMPGC1_SRPGCR);
        }
        cpu_do_idle();
-        clk_disable(gpc_dvfs_clk);
        return 0;
 }
+static void mx5_suspend_finish(void)
+{
+        clk_disable(gpc_dvfs_clk);
+}
 static int mx5_pm_valid(suspend_state_t state)
 {
        return (state > PM_SUSPEND_ON && state <= PM_SUSPEND_MAX);
@@ -55,7 +62,9 @@ static int mx5_pm_valid(suspend_state_t state)
 static const struct platform_suspend_ops mx5_suspend_ops = {
        .valid = mx5_pm_valid,
+        .prepare = mx5_suspend_prepare,
        .enter = mx5_suspend_enter,
+        .finish = mx5_suspend_finish,
 };
 static int __init mx5_pm_init(void)
diff --git a/arch/arm/mach-mxs/clock-mx28.c b/arch/arm/mach-mxs/clock-mx28.c
index 5dcc59d5b9ec..ba532279d1a1 100644
--- a/arch/arm/mach-mxs/clock-mx28.c
+++ b/arch/arm/mach-mxs/clock-mx28.c
@@ -349,7 +349,7 @@ static int name##_set_rate(struct clk *clk, unsigned long rate)		\
                                                                        \
                reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##fr); \
                reg &= ~BM_CLKCTRL_##fr##_##fs##FRAC;                   \
-                reg |= frac;                                            \
+                reg |= frac << BP_CLKCTRL_##fr##_##fs##FRAC;            \
                __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_##fr); \
        }                                                               \
                                                                        \
diff --git a/arch/arm/mach-mxs/include/mach/debug-macro.S b/arch/arm/mach-mxs/include/mach/debug-macro.S
index 79650a1ad78d..714570d83668 100644
--- a/arch/arm/mach-mxs/include/mach/debug-macro.S
+++ b/arch/arm/mach-mxs/include/mach/debug-macro.S
@@ -30,7 +30,7 @@
 #define UART_VADDR      MXS_IO_ADDRESS(UART_PADDR)
-                .macro  addruart, rp, rv
+                .macro  addruart, rp, rv, tmp
                ldr     \rp, =UART_PADDR        @ physical
                ldr     \rv, =UART_VADDR        @ virtual
                .endm
diff --git a/arch/arm/mach-mxs/include/mach/gpio.h b/arch/arm/mach-mxs/include/mach/gpio.h
index 56025aa0a639..40a8c178f10d 100644
--- a/arch/arm/mach-mxs/include/mach/gpio.h
+++ b/arch/arm/mach-mxs/include/mach/gpio.h
@@ -1,31 +1 @@
-/*
+/* empty */
- * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved.
- * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
- * MA  02110-1301, USA.
- */
-#ifndef __MACH_MXS_GPIO_H__
-#define __MACH_MXS_GPIO_H__
-#include <asm-generic/gpio.h>
-/* use gpiolib dispatchers */
-#define gpio_get_value          __gpio_get_value
-#define gpio_set_value          __gpio_set_value
-#define gpio_cansleep           __gpio_cansleep
-#define gpio_to_irq             __gpio_to_irq
-#endif /* __MACH_MXS_GPIO_H__ */
diff --git a/arch/arm/mach-mxs/include/mach/memory.h b/arch/arm/mach-mxs/include/mach/memory.h
deleted file mode 100644
index b5420a5c2d4b..000000000000
--- a/arch/arm/mach-mxs/include/mach/memory.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * Copyright (C) 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- */
-#ifndef __MACH_MXS_MEMORY_H__
-#define __MACH_MXS_MEMORY_H__
-#define PHYS_OFFSET             UL(0x40000000)
-#endif /* __MACH_MXS_MEMORY_H__ */
diff --git a/arch/arm/mach-netx/include/mach/debug-macro.S b/arch/arm/mach-netx/include/mach/debug-macro.S
index 56a915228180..247781e096e2 100644
--- a/arch/arm/mach-netx/include/mach/debug-macro.S
+++ b/arch/arm/mach-netx/include/mach/debug-macro.S
@@ -13,7 +13,7 @@
 #include "hardware.h"
-                .macro  addruart, rp, rv
+                .macro  addruart, rp, rv, tmp
                mov     \rp, #0x00000a00
                orr     \rv, \rp, #io_p2v(0x00100000)   @ virtual
                orr     \rp, \rp, #0x00100000           @ physical
diff --git a/arch/arm/mach-netx/include/mach/memory.h b/arch/arm/mach-netx/include/mach/memory.h
deleted file mode 100644
index 59561496c36e..000000000000
--- a/arch/arm/mach-netx/include/mach/memory.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- *  arch/arm/mach-netx/include/mach/memory.h
- *
- * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
-#define PLAT_PHYS_OFFSET UL(0x80000000)
-#endif
diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c
index 398a75f62bee..0cbb74c96ef7 100644
--- a/arch/arm/mach-nomadik/board-nhk8815.c
+++ b/arch/arm/mach-nomadik/board-nhk8815.c
@@ -27,6 +27,7 @@
 #include <asm/mach/irq.h>
 #include <asm/mach/flash.h>
+#include <plat/gpio-nomadik.h>
 #include <plat/mtu.h>
 #include <mach/setup.h>
diff --git a/arch/arm/mach-nomadik/cpu-8815.c b/arch/arm/mach-nomadik/cpu-8815.c
index ac58e3b03b1a..dc67717db6f0 100644
--- a/arch/arm/mach-nomadik/cpu-8815.c
+++ b/arch/arm/mach-nomadik/cpu-8815.c
@@ -21,8 +21,8 @@
 #include <linux/device.h>
 #include <linux/amba/bus.h>
 #include <linux/platform_device.h>
-#include <linux/gpio.h>
+#include <plat/gpio-nomadik.h>
 #include <mach/hardware.h>
 #include <mach/irqs.h>
 #include <asm/mach/map.h>
diff --git a/arch/arm/mach-nomadik/i2c-8815nhk.c b/arch/arm/mach-nomadik/i2c-8815nhk.c
index abfe25a08d6b..0fc2f6f1cc97 100644
--- a/arch/arm/mach-nomadik/i2c-8815nhk.c
+++ b/arch/arm/mach-nomadik/i2c-8815nhk.c
@@ -3,8 +3,8 @@
 #include <linux/i2c.h>
 #include <linux/i2c-algo-bit.h>
 #include <linux/i2c-gpio.h>
-#include <linux/gpio.h>
 #include <linux/platform_device.h>
+#include <plat/gpio-nomadik.h>
 /*
 * There are two busses in the 8815NHK.
diff --git a/arch/arm/mach-nomadik/include/mach/debug-macro.S b/arch/arm/mach-nomadik/include/mach/debug-macro.S
index e7151b4b8889..735417922ce2 100644
--- a/arch/arm/mach-nomadik/include/mach/debug-macro.S
+++ b/arch/arm/mach-nomadik/include/mach/debug-macro.S
@@ -10,7 +10,7 @@
 *
 */
-                .macro  addruart, rp, rv
+                .macro  addruart, rp, rv, tmp
                mov     \rp, #0x00100000
                add     \rp, \rp, #0x000fb000
                add     \rv, \rp, #0xf0000000   @ virtual base
diff --git a/arch/arm/mach-nomadik/include/mach/gpio.h b/arch/arm/mach-nomadik/include/mach/gpio.h
index 7a81a0420343..efdde0ae0a4f 100644
--- a/arch/arm/mach-nomadik/include/mach/gpio.h
+++ b/arch/arm/mach-nomadik/include/mach/gpio.h
@@ -1,6 +1,4 @@
 #ifndef __ASM_ARCH_GPIO_H
 #define __ASM_ARCH_GPIO_H
-#include <plat/gpio.h>
 #endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-nomadik/include/mach/memory.h b/arch/arm/mach-nomadik/include/mach/memory.h
deleted file mode 100644
index d3325211ba6a..000000000000
--- a/arch/arm/mach-nomadik/include/mach/memory.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- *  mach-nomadik/include/mach/memory.h
- *
- *  Copyright (C) 1999 ARM Limited
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
-/*
- * Physical DRAM offset.
- */
-#define PLAT_PHYS_OFFSET        UL(0x00000000)
-#endif
diff --git a/arch/arm/mach-nuc93x/include/mach/memory.h b/arch/arm/mach-nuc93x/include/mach/memory.h
deleted file mode 100644
index ef9864b002a6..000000000000
--- a/arch/arm/mach-nuc93x/include/mach/memory.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * arch/arm/mach-nuc93x/include/mach/memory.h
- *
- * Copyright (c) 2008 Nuvoton technology corporation
- * All rights reserved.
- *
- * Wan ZongShun <mcuos.com@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- */
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
-#define PLAT_PHYS_OFFSET        UL(0x00000000)
-#endif
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c
index eb36b25450a0..4ea60e2038ea 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -11,7 +11,7 @@
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/input.h>
@@ -30,7 +30,6 @@
 #include <plat/io.h>
 #include <plat/board-ams-delta.h>
-#include <mach/gpio.h>
 #include <plat/keypad.h>
 #include <plat/mux.h>
 #include <plat/usb.h>
diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c
index 999789c4811d..31e089b6f03f 100644
--- a/arch/arm/mach-omap1/board-fsample.c
+++ b/arch/arm/mach-omap1/board-fsample.c
@@ -10,7 +10,7 @@
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
@@ -28,7 +28,6 @@
 #include <asm/mach/map.h>
 #include <plat/tc.h>
-#include <mach/gpio.h>
 #include <plat/mux.h>
 #include <plat/flash.h>
 #include <plat/fpga.h>
diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c
index 23cc9e4ad50d..05c6e9d858f3 100644
--- a/arch/arm/mach-omap1/board-generic.c
+++ b/arch/arm/mach-omap1/board-generic.c
@@ -12,7 +12,7 @@
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
@@ -22,7 +22,6 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include <mach/gpio.h>
 #include <plat/mux.h>
 #include <plat/usb.h>
 #include <plat/board.h>
diff --git a/arch/arm/mach-omap1/board-h2-mmc.c b/arch/arm/mach-omap1/board-h2-mmc.c
index f2fc43d8382b..da0e37d40823 100644
--- a/arch/arm/mach-omap1/board-h2-mmc.c
+++ b/arch/arm/mach-omap1/board-h2-mmc.c
@@ -11,13 +11,12 @@
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
+#include <linux/gpio.h>
 #include <linux/platform_device.h>
 #include <linux/i2c/tps65010.h>
 #include <plat/mmc.h>
-#include <mach/gpio.h>
 #include "board-h2.h"
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c
index 6c70c28d055c..c2e279173d42 100644
--- a/arch/arm/mach-omap1/board-h2.c
+++ b/arch/arm/mach-omap1/board-h2.c
@@ -18,7 +18,7 @@
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
 #include <linux/delay.h>
@@ -32,7 +32,6 @@
 #include <linux/smc91x.h>
 #include <mach/hardware.h>
-#include <asm/gpio.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
diff --git a/arch/arm/mach-omap1/board-h3-mmc.c b/arch/arm/mach-omap1/board-h3-mmc.c
index 2098525e7cc5..f8242aa9b763 100644
--- a/arch/arm/mach-omap1/board-h3-mmc.c
+++ b/arch/arm/mach-omap1/board-h3-mmc.c
@@ -11,13 +11,12 @@
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
+#include <linux/gpio.h>
 #include <linux/platform_device.h>
 #include <linux/i2c/tps65010.h>
 #include <plat/mmc.h>
-#include <mach/gpio.h>
 #include "board-h3.h"
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c
index 8e2b64a46929..8f5b6af7ed59 100644
--- a/arch/arm/mach-omap1/board-h3.c
+++ b/arch/arm/mach-omap1/board-h3.c
@@ -13,7 +13,7 @@
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
+#include <linux/gpio.h>
 #include <linux/types.h>
 #include <linux/init.h>
 #include <linux/major.h>
@@ -34,7 +34,6 @@
 #include <asm/setup.h>
 #include <asm/page.h>
 #include <mach/hardware.h>
-#include <asm/gpio.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c
index e81ead1c89ea..fcd1a3c31896 100644
--- a/arch/arm/mach-omap1/board-htcherald.c
+++ b/arch/arm/mach-omap1/board-htcherald.c
@@ -23,7 +23,6 @@
 * 02110-1301, USA.
 *
 */
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c
index 8b034594fbc7..c2234caf8a7a 100644
--- a/arch/arm/mach-omap1/board-innovator.c
+++ b/arch/arm/mach-omap1/board-innovator.c
@@ -15,7 +15,7 @@
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
@@ -34,7 +34,6 @@
 #include <plat/mux.h>
 #include <plat/flash.h>
 #include <plat/fpga.h>
-#include <mach/gpio.h>
 #include <plat/tc.h>
 #include <plat/usb.h>
 #include <plat/keypad.h>
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c
index 6825635ac681..02789c5d3703 100644
--- a/arch/arm/mach-omap1/board-nokia770.c
+++ b/arch/arm/mach-omap1/board-nokia770.c
@@ -7,7 +7,7 @@
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/mutex.h>
@@ -26,7 +26,6 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include <mach/gpio.h>
 #include <plat/mux.h>
 #include <plat/usb.h>
 #include <plat/board.h>
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c
index 44b8e9362bf4..e4dca1deebb4 100644
--- a/arch/arm/mach-omap1/board-osk.c
+++ b/arch/arm/mach-omap1/board-osk.c
@@ -25,7 +25,7 @@
 * with this program; if not, write  to the Free Software Foundation, Inc.,
 * 675 Mass Ave, Cambridge, MA 02139, USA.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
@@ -42,7 +42,6 @@
 #include <linux/i2c/tps65010.h>
 #include <mach/hardware.h>
-#include <asm/gpio.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c
index 3d8cd90b1dbb..50c4e398bcc8 100644
--- a/arch/arm/mach-omap1/board-palmte.c
+++ b/arch/arm/mach-omap1/board-palmte.c
@@ -16,7 +16,7 @@
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/input.h>
@@ -33,7 +33,6 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include <mach/gpio.h>
 #include <plat/flash.h>
 #include <plat/mux.h>
 #include <plat/usb.h>
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c
index d0eefe81cd1b..273771cb1b61 100644
--- a/arch/arm/mach-omap1/board-palmtt.c
+++ b/arch/arm/mach-omap1/board-palmtt.c
@@ -12,6 +12,7 @@
 */
 #include <linux/delay.h>
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
@@ -30,7 +31,6 @@
 #include <asm/mach/map.h>
 #include <plat/led.h>
-#include <mach/gpio.h>
 #include <plat/flash.h>
 #include <plat/mux.h>
 #include <plat/usb.h>
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c
index 98e79bc09213..de36ade38ef7 100644
--- a/arch/arm/mach-omap1/board-palmz71.c
+++ b/arch/arm/mach-omap1/board-palmz71.c
@@ -15,6 +15,7 @@
 */
 #include <linux/delay.h>
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
@@ -32,7 +33,6 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include <mach/gpio.h>
 #include <plat/flash.h>
 #include <plat/mux.h>
 #include <plat/usb.h>
diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c
index ad3a1567604e..04b1befaced6 100644
--- a/arch/arm/mach-omap1/board-perseus2.c
+++ b/arch/arm/mach-omap1/board-perseus2.c
@@ -10,7 +10,7 @@
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
@@ -28,7 +28,6 @@
 #include <asm/mach/map.h>
 #include <plat/tc.h>
-#include <mach/gpio.h>
 #include <plat/mux.h>
 #include <plat/fpga.h>
 #include <plat/flash.h>
diff --git a/arch/arm/mach-omap1/board-sx1-mmc.c b/arch/arm/mach-omap1/board-sx1-mmc.c
index e8ddd86e3fda..b59f78850e69 100644
--- a/arch/arm/mach-omap1/board-sx1-mmc.c
+++ b/arch/arm/mach-omap1/board-sx1-mmc.c
@@ -12,11 +12,11 @@
 * published by the Free Software Foundation.
 */
+#include <linux/gpio.h>
 #include <linux/platform_device.h>
 #include <mach/hardware.h>
 #include <plat/mmc.h>
-#include <mach/gpio.h>
 #include <plat/board-sx1.h>
 #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c
index 602b55c39d3d..2bea941741d5 100644
--- a/arch/arm/mach-omap1/board-sx1.c
+++ b/arch/arm/mach-omap1/board-sx1.c
@@ -14,7 +14,7 @@
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/input.h>
@@ -32,7 +32,6 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include <mach/gpio.h>
 #include <plat/flash.h>
 #include <plat/mux.h>
 #include <plat/dma.h>
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c
index 80165154617a..940faed82be2 100644
--- a/arch/arm/mach-omap1/board-voiceblue.c
+++ b/arch/arm/mach-omap1/board-voiceblue.c
@@ -13,6 +13,7 @@
 */
 #include <linux/delay.h>
+#include <linux/gpio.h>
 #include <linux/platform_device.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
@@ -33,7 +34,6 @@
 #include <plat/board-voiceblue.h>
 #include <plat/common.h>
-#include <mach/gpio.h>
 #include <plat/flash.h>
 #include <plat/mux.h>
 #include <plat/tc.h>
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index 36f26c3fa25e..7c50ecf68123 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -10,6 +10,7 @@
 */
 #include <linux/dma-mapping.h>
+#include <linux/gpio.h>
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
@@ -24,7 +25,6 @@
 #include <plat/tc.h>
 #include <plat/board.h>
 #include <plat/mux.h>
-#include <mach/gpio.h>
 #include <plat/mmc.h>
 #include <plat/omap7xx.h>
 #include <plat/mcbsp.h>
diff --git a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c
index cddbf8b089ce..0a17a1a7e00d 100644
--- a/arch/arm/mach-omap1/fpga.c
+++ b/arch/arm/mach-omap1/fpga.c
@@ -17,6 +17,7 @@
 */
 #include <linux/types.h>
+#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/device.h>
@@ -28,7 +29,6 @@
 #include <asm/mach/irq.h>
 #include <plat/fpga.h>
-#include <mach/gpio.h>
 static void fpga_mask_irq(struct irq_data *d)
 {
diff --git a/arch/arm/mach-omap1/include/mach/debug-macro.S b/arch/arm/mach-omap1/include/mach/debug-macro.S
index 62856044eb63..2b36a281dc84 100644
--- a/arch/arm/mach-omap1/include/mach/debug-macro.S
+++ b/arch/arm/mach-omap1/include/mach/debug-macro.S
@@ -13,13 +13,8 @@
 #include <linux/serial_reg.h>
-#include <asm/memory.h>
 #include <plat/serial.h>
-#define omap_uart_v2p(x)        ((x) - PAGE_OFFSET + PLAT_PHYS_OFFSET)
-#define omap_uart_p2v(x)        ((x) - PLAT_PHYS_OFFSET + PAGE_OFFSET)
                .pushsection .data
 omap_uart_phys: .word   0x0
 omap_uart_virt: .word   0x0
@@ -31,26 +26,24 @@ omap_uart_virt:	.word	0x0
                 * the desired UART phys and virt addresses temporarily into
                 * the omap_uart_phys and omap_uart_virt above.
                 */
-                .macro  addruart, rp, rv
+                .macro  addruart, rp, rv, tmp
                /* Use omap_uart_phys/virt if already configured */
-9:              mrc     p15, 0, \rp, c1, c0
+9:              adr     \rp, 99f                @ get effective addr of 99f
-                tst     \rp, #1                 @ MMU enabled?
+                ldr     \rv, [\rp]              @ get absolute addr of 99f
-                ldreq   \rp, =omap_uart_v2p(omap_uart_phys)     @ MMU disabled
+                sub     \rv, \rv, \rp           @ offset between the two
-                ldrne   \rp, =omap_uart_phys    @ MMU enabled
+                ldr     \rp, [\rp, #4]          @ abs addr of omap_uart_phys
-                add     \rv, \rp, #4            @ omap_uart_virt
+                sub     \tmp, \rp, \rv          @ make it effective
-                ldr     \rp, [\rp, #0]
+                ldr     \rp, [\tmp, #0]         @ omap_uart_phys
-                ldr     \rv, [\rv, #0]
+                ldr     \rv, [\tmp, #4]         @ omap_uart_virt
                cmp     \rp, #0                 @ is port configured?
                cmpne   \rv, #0
-                bne     99f                     @ already configured
+                bne     100f                    @ already configured
                /* Check the debug UART configuration set in uncompress.h */
-                mrc     p15, 0, \rp, c1, c0
+                and     \rp, pc, #0xff000000
-                tst     \rp, #1                 @ MMU enabled?
+                ldr     \rv, =OMAP_UART_INFO_OFS
-                ldreq   \rp, =OMAP_UART_INFO    @ MMU not enabled
+                ldr     \rp, [\rp, \rv]
-                ldrne   \rp, =omap_uart_p2v(OMAP_UART_INFO)     @ MMU enabled
-                ldr     \rp, [\rp, #0]
                /* Select the UART to use based on the UART1 scratchpad value */
 10:             cmp     \rp, #0                 @ no port configured?
@@ -74,17 +67,18 @@ omap_uart_virt:	.word	0x0
                /* Store both phys and virt address for the uart */
 98:             add     \rp, \rp, #0xff000000   @ phys base
-                mrc     p15, 0, \rv, c1, c0
+                str     \rp, [\tmp, #0]         @ omap_uart_phys
-                tst     \rv, #1                 @ MMU enabled?
-                ldreq   \rv, =omap_uart_v2p(omap_uart_phys)     @ MMU disabled
-                ldrne   \rv, =omap_uart_phys    @ MMU enabled
-                str     \rp, [\rv, #0]
                sub     \rp, \rp, #0xff000000   @ phys base
                add     \rp, \rp, #0xfe000000   @ virt base
-                add     \rv, \rv, #4            @ omap_uart_lsr
+                str     \rp, [\tmp, #4]         @ omap_uart_virt
-                str     \rp, [\rv, #0]
                b       9b
-99:
+                .align
+99:             .word   .
+                .word   omap_uart_phys
+                .ltorg
+100:
                .endm
                .macro  senduart,rd,rx
diff --git a/arch/arm/mach-omap1/include/mach/memory.h b/arch/arm/mach-omap1/include/mach/memory.h
index e9b600c113ef..c6337645ba8a 100644
--- a/arch/arm/mach-omap1/include/mach/memory.h
+++ b/arch/arm/mach-omap1/include/mach/memory.h
@@ -2,4 +2,55 @@
 * arch/arm/mach-omap1/include/mach/memory.h
 */
-#include <plat/memory.h>
+#ifndef __ASM_ARCH_MEMORY_H
+#define __ASM_ARCH_MEMORY_H
+/*
+ * Physical DRAM offset.
+ */
+#define PLAT_PHYS_OFFSET                UL(0x10000000)
+/*
+ * Bus address is physical address, except for OMAP-1510 Local Bus.
+ * OMAP-1510 bus address is translated into a Local Bus address if the
+ * OMAP bus type is lbus. We do the address translation based on the
+ * device overriding the defaults used in the dma-mapping API.
+ * Note that the is_lbus_device() test is not very efficient on 1510
+ * because of the strncmp().
+ */
+#ifdef CONFIG_ARCH_OMAP15XX
+/*
+ * OMAP-1510 Local Bus address offset
+ */
+#define OMAP1510_LB_OFFSET      UL(0x30000000)
+#define virt_to_lbus(x)         ((x) - PAGE_OFFSET + OMAP1510_LB_OFFSET)
+#define lbus_to_virt(x)         ((x) - OMAP1510_LB_OFFSET + PAGE_OFFSET)
+#define is_lbus_device(dev)     (cpu_is_omap15xx() && dev && (strncmp(dev_name(dev), "ohci", 4) == 0))
+#define __arch_pfn_to_dma(dev, pfn)     \
+        ({ dma_addr_t __dma = __pfn_to_phys(pfn); \
+           if (is_lbus_device(dev)) \
+                __dma = __dma - PHYS_OFFSET + OMAP1510_LB_OFFSET; \
+           __dma; })
+#define __arch_dma_to_pfn(dev, addr)    \
+        ({ dma_addr_t __dma = addr;                             \
+           if (is_lbus_device(dev))                             \
+                __dma += PHYS_OFFSET - OMAP1510_LB_OFFSET;      \
+           __phys_to_pfn(__dma);                                \
+        })
+#define __arch_dma_to_virt(dev, addr)   ({ (void *) (is_lbus_device(dev) ? \
+                                                lbus_to_virt(addr) : \
+                                                __phys_to_virt(addr)); })
+#define __arch_virt_to_dma(dev, addr)   ({ unsigned long __addr = (unsigned long)(addr); \
+                                           (dma_addr_t) (is_lbus_device(dev) ? \
+                                                virt_to_lbus(__addr) : \
+                                                __virt_to_phys(__addr)); })
+#endif  /* CONFIG_ARCH_OMAP15XX */
+#endif
diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c
index e2b9c901ab67..e5b104b7fce6 100644
--- a/arch/arm/mach-omap1/irq.c
+++ b/arch/arm/mach-omap1/irq.c
@@ -35,7 +35,7 @@
 * with this program; if not, write  to the Free Software Foundation, Inc.,
 * 675 Mass Ave, Cambridge, MA 02139, USA.
 */
+#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/module.h>
 #include <linux/sched.h>
@@ -45,7 +45,6 @@
 #include <mach/hardware.h>
 #include <asm/irq.h>
 #include <asm/mach/irq.h>
-#include <mach/gpio.h>
 #include <plat/cpu.h>
 #define IRQ_BANK(irq) ((irq) >> 5)
diff --git a/arch/arm/mach-omap1/leds-h2p2-debug.c b/arch/arm/mach-omap1/leds-h2p2-debug.c
index b4f9be52e1e8..4b818eb9f911 100644
--- a/arch/arm/mach-omap1/leds-h2p2-debug.c
+++ b/arch/arm/mach-omap1/leds-h2p2-debug.c
@@ -9,6 +9,7 @@
 * The "surfer" expansion board and H2 sample board also have two-color
 * green+red LEDs (in parallel), used here for timer and idle indicators.
 */
+#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/kernel_stat.h>
 #include <linux/sched.h>
@@ -20,7 +21,6 @@
 #include <asm/mach-types.h>
 #include <plat/fpga.h>
-#include <mach/gpio.h>
 #include "leds.h"
diff --git a/arch/arm/mach-omap1/leds-osk.c b/arch/arm/mach-omap1/leds-osk.c
index 499d7ad8697d..da09f4364979 100644
--- a/arch/arm/mach-omap1/leds-osk.c
+++ b/arch/arm/mach-omap1/leds-osk.c
@@ -3,14 +3,13 @@
 *
 * LED driver for OSK with optional Mistral QVGA board
 */
+#include <linux/gpio.h>
 #include <linux/init.h>
 #include <mach/hardware.h>
 #include <asm/leds.h>
 #include <asm/system.h>
-#include <mach/gpio.h>
 #include "leds.h"
diff --git a/arch/arm/mach-omap1/leds.c b/arch/arm/mach-omap1/leds.c
index 22eb11dde9e7..ae6dd93b8ddc 100644
--- a/arch/arm/mach-omap1/leds.c
+++ b/arch/arm/mach-omap1/leds.c
@@ -3,13 +3,13 @@
 *
 * OMAP LEDs dispatcher
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <asm/leds.h>
 #include <asm/mach-types.h>
-#include <mach/gpio.h>
 #include <plat/mux.h>
 #include "leds.h"
diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c
index 550ca9d9991d..93ae8f29727e 100644
--- a/arch/arm/mach-omap1/serial.c
+++ b/arch/arm/mach-omap1/serial.c
@@ -7,7 +7,7 @@
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
+#include <linux/gpio.h>
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
@@ -24,7 +24,6 @@
 #include <plat/board.h>
 #include <plat/mux.h>
-#include <mach/gpio.h>
 #include <plat/fpga.h>
 #include "pm.h"
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index 69d698c6c5df..d704f0ac328d 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -238,7 +238,8 @@ static int __init omap2430_i2c_init(void)
 {
        omap_register_i2c_bus(1, 100, sdp2430_i2c1_boardinfo,
                        ARRAY_SIZE(sdp2430_i2c1_boardinfo));
-        omap2_pmic_init("twl4030", &sdp2430_twldata);
+        omap_pmic_init(2, 100, "twl4030", INT_24XX_SYS_NIRQ,
+                        &sdp2430_twldata);
        return 0;
 }
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index 32a3a7fe0e95..515646886b59 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -133,7 +133,7 @@ static const int sdp4430_keymap[] = {
        KEY(7, 6, KEY_OK),
        KEY(7, 7, KEY_DOWN),
 };
-static struct omap_device_pad keypad_pads[] __initdata = {
+static struct omap_device_pad keypad_pads[] = {
        {       .name   = "kpd_col1.kpd_col1",
                .enable = OMAP_WAKEUP_EN | OMAP_MUX_MODE1,
        },
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index e8d45d3bd3e0..7ac546219e5d 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -15,7 +15,7 @@
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/device.h>
@@ -25,7 +25,6 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include <mach/gpio.h>
 #include <plat/usb.h>
 #include <plat/board.h>
 #include <plat/common.h>
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index 9a114bd910b1..c12666ee7017 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -10,7 +10,7 @@
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
@@ -31,7 +31,6 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include <mach/gpio.h>
 #include <plat/usb.h>
 #include <plat/board.h>
 #include <plat/common.h>
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index 2a2545153d15..e179da0c4da5 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -10,7 +10,7 @@
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 10adf66be7ba..7279ec075737 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -8,7 +8,7 @@
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
@@ -26,7 +26,6 @@
 #include <plat/tc.h>
 #include <plat/board.h>
 #include <plat/mcbsp.h>
-#include <mach/gpio.h>
 #include <plat/mmc.h>
 #include <plat/dma.h>
 #include <plat/omap_hwmod.h>
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index cc8791952a05..2dc002a388b3 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -137,8 +137,7 @@ static void omap4_hsmmc1_before_set_reg(struct device *dev, int slot,
         */
        reg = omap4_ctrl_pad_readl(control_pbias_offset);
        reg &= ~(OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK |
-                OMAP4_MMC1_PWRDNZ_MASK |
+                OMAP4_MMC1_PWRDNZ_MASK);
-                OMAP4_USBC1_ICUSB_PWRDNZ_MASK);
        omap4_ctrl_pad_writel(reg, control_pbias_offset);
 }
@@ -156,8 +155,7 @@ static void omap4_hsmmc1_after_set_reg(struct device *dev, int slot,
                else
                        reg |= OMAP4_MMC1_PBIASLITE_VMODE_MASK;
                reg |= (OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK |
-                        OMAP4_MMC1_PWRDNZ_MASK |
+                        OMAP4_MMC1_PWRDNZ_MASK);
-                        OMAP4_USBC1_ICUSB_PWRDNZ_MASK);
                omap4_ctrl_pad_writel(reg, control_pbias_offset);
                timeout = jiffies + msecs_to_jiffies(5);
@@ -171,16 +169,14 @@ static void omap4_hsmmc1_after_set_reg(struct device *dev, int slot,
                if (reg & OMAP4_MMC1_PBIASLITE_VMODE_ERROR_MASK) {
                        pr_err("Pbias Voltage is not same as LDO\n");
                        /* Caution : On VMODE_ERROR Power Down MMC IO */
-                        reg &= ~(OMAP4_MMC1_PWRDNZ_MASK |
+                        reg &= ~(OMAP4_MMC1_PWRDNZ_MASK);
-                                OMAP4_USBC1_ICUSB_PWRDNZ_MASK);
                        omap4_ctrl_pad_writel(reg, control_pbias_offset);
                }
        } else {
                reg = omap4_ctrl_pad_readl(control_pbias_offset);
                reg |= (OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK |
                        OMAP4_MMC1_PWRDNZ_MASK |
-                        OMAP4_MMC1_PBIASLITE_VMODE_MASK |
+                        OMAP4_MMC1_PBIASLITE_VMODE_MASK);
-                        OMAP4_USBC1_ICUSB_PWRDNZ_MASK);
                omap4_ctrl_pad_writel(reg, control_pbias_offset);
        }
 }
diff --git a/arch/arm/mach-omap2/include/mach/debug-macro.S b/arch/arm/mach-omap2/include/mach/debug-macro.S
index 48adfe9fe4f3..13f98e59cfef 100644
--- a/arch/arm/mach-omap2/include/mach/debug-macro.S
+++ b/arch/arm/mach-omap2/include/mach/debug-macro.S
@@ -13,15 +13,10 @@
 #include <linux/serial_reg.h>
-#include <asm/memory.h>
 #include <plat/serial.h>
 #define UART_OFFSET(addr)       ((addr) & 0x00ffffff)
-#define omap_uart_v2p(x)        ((x) - PAGE_OFFSET + PLAT_PHYS_OFFSET)
-#define omap_uart_p2v(x)        ((x) - PLAT_PHYS_OFFSET + PAGE_OFFSET)
                .pushsection .data
 omap_uart_phys: .word   0
 omap_uart_virt: .word   0
@@ -34,26 +29,25 @@ omap_uart_lsr:	.word	0
                 * the desired UART phys and virt addresses temporarily into
                 * the omap_uart_phys and omap_uart_virt above.
                 */
-                .macro  addruart, rp, rv
+                .macro  addruart, rp, rv, tmp
                /* Use omap_uart_phys/virt if already configured */
-10:             mrc     p15, 0, \rp, c1, c0
+10:             adr     \rp, 99f                @ get effective addr of 99f
-                tst     \rp, #1                 @ MMU enabled?
+                ldr     \rv, [\rp]              @ get absolute addr of 99f
-                ldreq   \rp, =omap_uart_v2p(omap_uart_phys)     @ MMU disabled
+                sub     \rv, \rv, \rp           @ offset between the two
-                ldrne   \rp, =omap_uart_phys    @ MMU enabled
+                ldr     \rp, [\rp, #4]          @ abs addr of omap_uart_phys
-                add     \rv, \rp, #4            @ omap_uart_virt
+                sub     \tmp, \rp, \rv          @ make it effective
-                ldr     \rp, [\rp, #0]
+                ldr     \rp, [\tmp, #0]         @ omap_uart_phys
-                ldr     \rv, [\rv, #0]
+                ldr     \rv, [\tmp, #4]         @ omap_uart_virt
                cmp     \rp, #0                 @ is port configured?
                cmpne   \rv, #0
-                bne     99f                     @ already configured
+                bne     100f                    @ already configured
                /* Check the debug UART configuration set in uncompress.h */
-                mrc     p15, 0, \rp, c1, c0
+                mov     \rp, pc
-                tst     \rp, #1                 @ MMU enabled?
+                ldr     \rv, =OMAP_UART_INFO_OFS
-                ldreq   \rp, =OMAP_UART_INFO    @ MMU not enabled
+                and     \rp, \rp, #0xff000000
-                ldrne   \rp, =omap_uart_p2v(OMAP_UART_INFO)     @ MMU enabled
+                ldr     \rp, [\rp, \rv]
-                ldr     \rp, [\rp, #0]
                /* Select the UART to use based on the UART1 scratchpad value */
                cmp     \rp, #0                 @ no port configured?
@@ -106,50 +100,47 @@ omap_uart_lsr:	.word	0
                b       98f
 83:             mov     \rp, #UART_OFFSET(TI816X_UART3_BASE)
                b       98f
 95:             ldr     \rp, =ZOOM_UART_BASE
-                mrc     p15, 0, \rv, c1, c0
+                str     \rp, [\tmp, #0]         @ omap_uart_phys
-                tst     \rv, #1                 @ MMU enabled?
-                ldreq   \rv, =omap_uart_v2p(omap_uart_phys)     @ MMU disabled
-                ldrne   \rv, =omap_uart_phys    @ MMU enabled
-                str     \rp, [\rv, #0]
                ldr     \rp, =ZOOM_UART_VIRT
-                add     \rv, \rv, #4            @ omap_uart_virt
+                str     \rp, [\tmp, #4]         @ omap_uart_virt
-                str     \rp, [\rv, #0]
                mov     \rp, #(UART_LSR << ZOOM_PORT_SHIFT)
-                add     \rv, \rv, #4            @ omap_uart_lsr
+                str     \rp, [\tmp, #8]         @ omap_uart_lsr
-                str     \rp, [\rv, #0]
                b       10b
                /* Store both phys and virt address for the uart */
 98:             add     \rp, \rp, #0x48000000   @ phys base
-                mrc     p15, 0, \rv, c1, c0
+                str     \rp, [\tmp, #0]         @ omap_uart_phys
-                tst     \rv, #1                 @ MMU enabled?
-                ldreq   \rv, =omap_uart_v2p(omap_uart_phys)     @ MMU disabled
-                ldrne   \rv, =omap_uart_phys    @ MMU enabled
-                str     \rp, [\rv, #0]
                sub     \rp, \rp, #0x48000000   @ phys base
                add     \rp, \rp, #0xfa000000   @ virt base
-                add     \rv, \rv, #4            @ omap_uart_virt
+                str     \rp, [\tmp, #4]         @ omap_uart_virt
-                str     \rp, [\rv, #0]
                mov     \rp, #(UART_LSR << OMAP_PORT_SHIFT)
-                add     \rv, \rv, #4            @ omap_uart_lsr
+                str     \rp, [\tmp, #8]         @ omap_uart_lsr
-                str     \rp, [\rv, #0]
                b       10b
-99:
+                .align
+99:             .word   .
+                .word   omap_uart_phys
+                .ltorg
+100:            /* Pass the UART_LSR reg address */
+                ldr     \tmp, [\tmp, #8]        @ omap_uart_lsr
+                add     \rp, \rp, \tmp
+                add     \rv, \rv, \tmp
                .endm
                .macro  senduart,rd,rx
-                strb    \rd, [\rx]
+                orr     \rd, \rd, \rx, lsl #24  @ preserve LSR reg offset
+                bic     \rx, \rx, #0xff         @ get base (THR) reg address
+                strb    \rd, [\rx]              @ send lower byte of rd
+                orr     \rx, \rx, \rd, lsr #24  @ restore original rx (LSR)
+                bic     \rd, \rd, #(0xff << 24) @ restore original rd
                .endm
                .macro  busyuart,rd,rx
-1001:           mrc     p15, 0, \rd, c1, c0
+1001:           ldrb    \rd, [\rx]              @ rx contains UART_LSR address
-                tst     \rd, #1                 @ MMU enabled?
-                ldreq   \rd, =omap_uart_v2p(omap_uart_lsr)      @ MMU disabled
-                ldrne   \rd, =omap_uart_lsr     @ MMU enabled
-                ldr     \rd, [\rd, #0]
-                ldrb    \rd, [\rx, \rd]
                and     \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
                teq     \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
                bne     1001b
diff --git a/arch/arm/mach-omap2/include/mach/memory.h b/arch/arm/mach-omap2/include/mach/memory.h
deleted file mode 100644
index ca6d32a917dd..000000000000
--- a/arch/arm/mach-omap2/include/mach/memory.h
+++ /dev/null
@@ -1,5 +0,0 @@
-/*
- * arch/arm/mach-omap2/include/mach/memory.h
- */
-#include <plat/memory.h>
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 3a12f7586a4c..65f1be6a182c 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -165,8 +165,8 @@ static void __init omap_init_irq(u32 base, int nr_irqs)
                omap_irq_bank_init_one(bank);
-                for (i = 0, j = 0; i < bank->nr_irqs; i += 32, j += 0x20)
+                for (j = 0; j < bank->nr_irqs; j += 32)
-                        omap_alloc_gc(bank->base_reg + j, i, 32);
+                        omap_alloc_gc(bank->base_reg + j, j, 32);
                nr_of_irqs += bank->nr_irqs;
                nr_banks++;
diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c
index a65145b02a55..19e4dac62a8c 100644
--- a/arch/arm/mach-omap2/usb-musb.c
+++ b/arch/arm/mach-omap2/usb-musb.c
@@ -137,9 +137,6 @@ void __init usb_musb_init(struct omap_musb_board_data *musb_board_data)
        musb_plat.mode = board_data->mode;
        musb_plat.extvbus = board_data->extvbus;
-        if (cpu_is_omap44xx())
-                omap4430_phy_init(dev);
        if (cpu_is_omap3517() || cpu_is_omap3505()) {
                oh_name = "am35x_otg_hs";
                name = "musb-am35x";
diff --git a/arch/arm/mach-orion5x/db88f5281-setup.c b/arch/arm/mach-orion5x/db88f5281-setup.c
index 88432aba972c..4b79a80d5e1f 100644
--- a/arch/arm/mach-orion5x/db88f5281-setup.c
+++ b/arch/arm/mach-orion5x/db88f5281-setup.c
@@ -9,7 +9,7 @@
 * License version 2.  This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
@@ -21,7 +21,6 @@
 #include <linux/mv643xx_eth.h>
 #include <linux/i2c.h>
 #include <asm/mach-types.h>
-#include <asm/gpio.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/pci.h>
 #include <mach/orion5x.h>
diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c
index 9e5c1663fc4f..343f60e9639f 100644
--- a/arch/arm/mach-orion5x/dns323-setup.c
+++ b/arch/arm/mach-orion5x/dns323-setup.c
@@ -13,7 +13,7 @@
 * License, or (at your option) any later version.
 *
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/delay.h>
@@ -30,7 +30,6 @@
 #include <linux/phy.h>
 #include <linux/marvell_phy.h>
 #include <asm/mach-types.h>
-#include <asm/gpio.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/pci.h>
 #include <mach/orion5x.h>
diff --git a/arch/arm/mach-orion5x/include/mach/debug-macro.S b/arch/arm/mach-orion5x/include/mach/debug-macro.S
index 5e3bf5b68aec..f340ed8f8dd0 100644
--- a/arch/arm/mach-orion5x/include/mach/debug-macro.S
+++ b/arch/arm/mach-orion5x/include/mach/debug-macro.S
@@ -10,7 +10,7 @@
 #include <mach/orion5x.h>
-        .macro  addruart, rp, rv
+        .macro  addruart, rp, rv, tmp
        ldr     \rp, =ORION5X_REGS_PHYS_BASE
        ldr     \rv, =ORION5X_REGS_VIRT_BASE
        orr     \rp, \rp, #0x00012000
diff --git a/arch/arm/mach-orion5x/include/mach/memory.h b/arch/arm/mach-orion5x/include/mach/memory.h
deleted file mode 100644
index 6769917882fe..000000000000
--- a/arch/arm/mach-orion5x/include/mach/memory.h
+++ /dev/null
@@ -1,12 +0,0 @@
-/*
- * arch/arm/mach-orion5x/include/mach/memory.h
- *
- * Marvell Orion memory definitions
- */
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
-#define PLAT_PHYS_OFFSET        UL(0x00000000)
-#endif
diff --git a/arch/arm/mach-orion5x/irq.c b/arch/arm/mach-orion5x/irq.c
index 43cf8bc9767b..b1b45fff776e 100644
--- a/arch/arm/mach-orion5x/irq.c
+++ b/arch/arm/mach-orion5x/irq.c
@@ -9,12 +9,11 @@
 * License version 2.  This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/irq.h>
 #include <linux/io.h>
-#include <asm/gpio.h>
 #include <mach/bridge-regs.h>
 #include <plat/irq.h>
 #include "common.h"
diff --git a/arch/arm/mach-orion5x/kurobox_pro-setup.c b/arch/arm/mach-orion5x/kurobox_pro-setup.c
index 9115511dc035..d3cd3f63258a 100644
--- a/arch/arm/mach-orion5x/kurobox_pro-setup.c
+++ b/arch/arm/mach-orion5x/kurobox_pro-setup.c
@@ -7,7 +7,7 @@
 * License version 2.  This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
@@ -21,7 +21,6 @@
 #include <linux/serial_reg.h>
 #include <linux/ata_platform.h>
 #include <asm/mach-types.h>
-#include <asm/gpio.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/pci.h>
 #include <mach/orion5x.h>
diff --git a/arch/arm/mach-orion5x/mv2120-setup.c b/arch/arm/mach-orion5x/mv2120-setup.c
index b3356ada64b9..201ae3676289 100644
--- a/arch/arm/mach-orion5x/mv2120-setup.c
+++ b/arch/arm/mach-orion5x/mv2120-setup.c
@@ -7,7 +7,7 @@
 * published by the Free Software Foundation; either version 2 of the
 * License, or (at your option) any later version.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
@@ -20,7 +20,6 @@
 #include <linux/i2c.h>
 #include <linux/ata_platform.h>
 #include <asm/mach-types.h>
-#include <asm/gpio.h>
 #include <asm/mach/arch.h>
 #include <mach/orion5x.h>
 #include "common.h"
diff --git a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
index 8c876664f494..ebd6767d8e88 100644
--- a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
@@ -7,7 +7,7 @@
 * License version 2.  This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
@@ -18,7 +18,6 @@
 #include <linux/ethtool.h>
 #include <net/dsa.h>
 #include <asm/mach-types.h>
-#include <asm/gpio.h>
 #include <asm/leds.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/pci.h>
diff --git a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
index 994644f59d8d..05db2d336b08 100644
--- a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
@@ -7,7 +7,7 @@
 * License version 2.  This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
@@ -19,7 +19,6 @@
 #include <linux/i2c.h>
 #include <net/dsa.h>
 #include <asm/mach-types.h>
-#include <asm/gpio.h>
 #include <asm/leds.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/pci.h>
diff --git a/arch/arm/mach-orion5x/rd88f5182-setup.c b/arch/arm/mach-orion5x/rd88f5182-setup.c
index 1903d25ecae9..e47fa0578ae3 100644
--- a/arch/arm/mach-orion5x/rd88f5182-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5182-setup.c
@@ -9,7 +9,7 @@
 * License version 2.  This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
@@ -20,7 +20,6 @@
 #include <linux/ata_platform.h>
 #include <linux/i2c.h>
 #include <asm/mach-types.h>
-#include <asm/gpio.h>
 #include <asm/leds.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/pci.h>
diff --git a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c
index e06fdae77f0a..64317251ec00 100644
--- a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c
+++ b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c
@@ -7,7 +7,7 @@
 * License version 2.  This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
@@ -21,7 +21,6 @@
 #include <linux/ethtool.h>
 #include <net/dsa.h>
 #include <asm/mach-types.h>
-#include <asm/gpio.h>
 #include <asm/leds.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/pci.h>
diff --git a/arch/arm/mach-orion5x/terastation_pro2-setup.c b/arch/arm/mach-orion5x/terastation_pro2-setup.c
index 306183273eb9..29f1526f7b70 100644
--- a/arch/arm/mach-orion5x/terastation_pro2-setup.c
+++ b/arch/arm/mach-orion5x/terastation_pro2-setup.c
@@ -8,7 +8,7 @@
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
@@ -20,7 +20,6 @@
 #include <linux/i2c.h>
 #include <linux/serial_reg.h>
 #include <asm/mach-types.h>
-#include <asm/gpio.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/pci.h>
 #include <mach/orion5x.h>
diff --git a/arch/arm/mach-orion5x/ts209-setup.c b/arch/arm/mach-orion5x/ts209-setup.c
index 3dbcd5ed77ef..31e51f9b4b64 100644
--- a/arch/arm/mach-orion5x/ts209-setup.c
+++ b/arch/arm/mach-orion5x/ts209-setup.c
@@ -8,7 +8,7 @@
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
@@ -23,7 +23,6 @@
 #include <linux/serial_reg.h>
 #include <linux/ata_platform.h>
 #include <asm/mach-types.h>
-#include <asm/gpio.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/pci.h>
 #include <mach/orion5x.h>
diff --git a/arch/arm/mach-orion5x/ts409-setup.c b/arch/arm/mach-orion5x/ts409-setup.c
index 23c9e2e5e550..0fbcc14e09d7 100644
--- a/arch/arm/mach-orion5x/ts409-setup.c
+++ b/arch/arm/mach-orion5x/ts409-setup.c
@@ -11,7 +11,7 @@
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
@@ -25,7 +25,6 @@
 #include <linux/i2c.h>
 #include <linux/serial_reg.h>
 #include <asm/mach-types.h>
-#include <asm/gpio.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/pci.h>
 #include <mach/orion5x.h>
diff --git a/arch/arm/mach-orion5x/wnr854t-setup.c b/arch/arm/mach-orion5x/wnr854t-setup.c
index 1c63a76f3ca3..b8be7d8d0cf4 100644
--- a/arch/arm/mach-orion5x/wnr854t-setup.c
+++ b/arch/arm/mach-orion5x/wnr854t-setup.c
@@ -5,7 +5,7 @@
 * License version 2.  This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
@@ -17,7 +17,6 @@
 #include <linux/ethtool.h>
 #include <net/dsa.h>
 #include <asm/mach-types.h>
-#include <asm/gpio.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/pci.h>
 #include <mach/orion5x.h>
diff --git a/arch/arm/mach-orion5x/wrt350n-v2-setup.c b/arch/arm/mach-orion5x/wrt350n-v2-setup.c
index 4fd9f18c9d5d..faf81a039360 100644
--- a/arch/arm/mach-orion5x/wrt350n-v2-setup.c
+++ b/arch/arm/mach-orion5x/wrt350n-v2-setup.c
@@ -5,7 +5,7 @@
 * License version 2.  This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
@@ -20,7 +20,6 @@
 #include <linux/input.h>
 #include <net/dsa.h>
 #include <asm/mach-types.h>
-#include <asm/gpio.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/pci.h>
 #include <mach/orion5x.h>
diff --git a/arch/arm/mach-pnx4008/gpio.c b/arch/arm/mach-pnx4008/gpio.c
index f219914f5b29..d3e71d3847b4 100644
--- a/arch/arm/mach-pnx4008/gpio.c
+++ b/arch/arm/mach-pnx4008/gpio.c
@@ -13,14 +13,13 @@
 * is licensed "as is" without any warranty of any kind, whether express
 * or implied.
 */
 #include <linux/types.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/io.h>
 #include <mach/hardware.h>
 #include <mach/platform.h>
-#include <mach/gpio.h>
+#include <mach/gpio-pnx4008.h>
 /* register definitions */
 #define PIO_VA_BASE     IO_ADDRESS(PNX4008_PIO_BASE)
diff --git a/arch/arm/mach-pnx4008/include/mach/debug-macro.S b/arch/arm/mach-pnx4008/include/mach/debug-macro.S
index 931afebaf064..469d60d97f5c 100644
--- a/arch/arm/mach-pnx4008/include/mach/debug-macro.S
+++ b/arch/arm/mach-pnx4008/include/mach/debug-macro.S
@@ -11,7 +11,7 @@
 *
 */
-                .macro  addruart, rp, rv
+                .macro  addruart, rp, rv, tmp
                mov     \rp, #0x00090000
                add     \rv, \rp, #0xf4000000   @ virtual
                add     \rp, \rp, #0x40000000   @ physical
diff --git a/arch/arm/mach-pnx4008/include/mach/gpio.h b/arch/arm/mach-pnx4008/include/mach/gpio-pnx4008.h
index 9591467eb9ec..41027dd7cf74 100644
--- a/arch/arm/mach-pnx4008/include/mach/gpio.h
+++ b/arch/arm/mach-pnx4008/include/mach/gpio-pnx4008.h
@@ -1,5 +1,5 @@
 /*
- * arch/arm/mach-pnx4008/include/mach/gpio.h
+ * arch/arm/mach-pnx4008/include/mach/gpio-pnx4008.h
 *
 * PNX4008 GPIO driver - header file
 *
diff --git a/arch/arm/mach-pnx4008/include/mach/memory.h b/arch/arm/mach-pnx4008/include/mach/memory.h
deleted file mode 100644
index 1275db61cee5..000000000000
--- a/arch/arm/mach-pnx4008/include/mach/memory.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * arch/arm/mach-pnx4008/include/mach/memory.h
- *
- * Copyright (c) 2005 Philips Semiconductors
- * Copyright (c) 2005 MontaVista Software, Inc.
- *
- *  This program is free software; you can redistribute  it and/or modify it
- *  under  the terms of  the GNU General  Public License as published by the
- *  Free Software Foundation;  either version 2 of the  License, or (at your
- *  option) any later version.
- */
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
-/*
- * Physical DRAM offset.
- */
-#define PLAT_PHYS_OFFSET        UL(0x80000000)
-#endif
diff --git a/arch/arm/mach-pnx4008/serial.c b/arch/arm/mach-pnx4008/serial.c
index f40961e51914..374c138ac1ac 100644
--- a/arch/arm/mach-pnx4008/serial.c
+++ b/arch/arm/mach-pnx4008/serial.c
@@ -9,7 +9,6 @@
 *  it under the terms of the GNU General Public License version 2 as
 *  published by the Free Software Foundation.
 */
 #include <linux/kernel.h>
 #include <linux/types.h>
 #include <linux/io.h>
@@ -19,8 +18,8 @@
 #include <linux/serial_core.h>
 #include <linux/serial_reg.h>
-#include <mach/gpio.h>
+#include <mach/gpio-pnx4008.h>
 #include <mach/clock.h>
 #define UART_3          0
diff --git a/arch/arm/mach-prima2/include/mach/debug-macro.S b/arch/arm/mach-prima2/include/mach/debug-macro.S
index bf75106333ff..cd97492bb075 100644
--- a/arch/arm/mach-prima2/include/mach/debug-macro.S
+++ b/arch/arm/mach-prima2/include/mach/debug-macro.S
@@ -9,7 +9,7 @@
 #include <mach/hardware.h>
 #include <mach/uart.h>
-        .macro  addruart, rp, rv
+        .macro  addruart, rp, rv, tmp
        ldr     \rp, =SIRFSOC_UART1_PA_BASE             @ physical
        ldr     \rv, =SIRFSOC_UART1_VA_BASE             @ virtual
        .endm
diff --git a/arch/arm/mach-prima2/include/mach/memory.h b/arch/arm/mach-prima2/include/mach/memory.h
deleted file mode 100644
index 368cd5a0601a..000000000000
--- a/arch/arm/mach-prima2/include/mach/memory.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * arch/arm/mach-prima2/include/mach/memory.h
- *
- * Copyright (c) 2010 – 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
- *
- * Licensed under GPLv2 or later.
- */
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
-#define PLAT_PHYS_OFFSET        UL(0x00000000)
-/*
- * Restrict DMA-able region to workaround silicon limitation.
- * The limitation restricts buffers available for DMA to SD/MMC
- * hardware to be below 256MB
- */
-#define ARM_DMA_ZONE_SIZE       (SZ_256M)
-#endif
diff --git a/arch/arm/mach-prima2/l2x0.c b/arch/arm/mach-prima2/l2x0.c
index 9cda2057bcfb..66c6387e5a04 100644
--- a/arch/arm/mach-prima2/l2x0.c
+++ b/arch/arm/mach-prima2/l2x0.c
@@ -13,7 +13,6 @@
 #include <linux/of.h>
 #include <linux/of_address.h>
 #include <asm/hardware/cache-l2x0.h>
-#include <mach/memory.h>
 #define L2X0_ADDR_FILTERING_START       0xC00
 #define L2X0_ADDR_FILTERING_END         0xC04
@@ -41,9 +40,9 @@ static int __init sirfsoc_of_l2x_init(void)
                /*
                 * set the physical memory windows L2 cache will cover
                 */
-                writel_relaxed(PLAT_PHYS_OFFSET + 1024 * 1024 * 1024,
+                writel_relaxed(PHYS_OFFSET + 1024 * 1024 * 1024,
                        sirfsoc_l2x_base + L2X0_ADDR_FILTERING_END);
-                writel_relaxed(PLAT_PHYS_OFFSET | 0x1,
+                writel_relaxed(PHYS_OFFSET | 0x1,
                        sirfsoc_l2x_base + L2X0_ADDR_FILTERING_START);
                writel_relaxed(0,
diff --git a/arch/arm/mach-prima2/prima2.c b/arch/arm/mach-prima2/prima2.c
index a3918d9994af..ef555c041962 100644
--- a/arch/arm/mach-prima2/prima2.c
+++ b/arch/arm/mach-prima2/prima2.c
@@ -36,6 +36,7 @@ MACHINE_START(PRIMA2_EVB, "prima2cb")
        .map_io         = sirfsoc_map_lluart,
        .init_irq       = sirfsoc_of_irq_init,
        .timer          = &sirfsoc_timer,
+        .dma_zone_size  = SZ_256M,
        .init_machine   = sirfsoc_mach_init,
        .dt_compat      = prima2cb_dt_match,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index cd19309fd3b8..61d3c72ded84 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -2,6 +2,27 @@ if ARCH_PXA
 menu "Intel PXA2xx/PXA3xx Implementations"
+config ARCH_PXA_V7
+        bool "ARMv7 (PXA95x) based systems"
+if ARCH_PXA_V7
+comment "Marvell Dev Platforms (sorted by hardware release time)"
+config MACH_TAVOREVB3
+        bool "PXA95x Development Platform (aka TavorEVB III)"
+        select CPU_PXA955
+config MACH_SAARB
+        bool "PXA955 Handheld Platform (aka SAARB)"
+        select CPU_PXA955
+endif
+config PXA_V7_MACH_AUTO
+        def_bool y
+        depends on ARCH_PXA_V7
+        depends on !MACH_SAARB
+        select MACH_TAVOREVB3
+if !ARCH_PXA_V7
 comment "Intel/Marvell Dev Platforms (sorted by hardware release time)"
 config ARCH_LUBBOCK
@@ -41,19 +62,11 @@ config MACH_TAVOREVB
        select PXA3xx
        select CPU_PXA930
-config MACH_TAVOREVB3
-        bool "PXA95x Development Platform (aka TavorEVB III)"
-        select CPU_PXA950
 config MACH_SAAR
        bool "PXA930 Handheld Platform (aka SAAR)"
        select PXA3xx
        select CPU_PXA930
-config MACH_SAARB
-        bool "PXA955 Handheld Platform (aka SAARB)"
-        select CPU_PXA955
 comment "Third Party Dev Platforms (sorted by vendor name)"
 config ARCH_PXA_IDP
@@ -414,6 +427,7 @@ config MACH_CENTRO
        bool "Palm Centro 685 (GSM)"
        default y
        depends on ARCH_PXA_PALM
+        select MACH_PALM27X
        select PXA27x
        select IWMMXT
        select PALM_TREO
@@ -425,6 +439,7 @@ config MACH_TREO680
        bool "Palm Treo 680"
        default y
        depends on ARCH_PXA_PALM
+        select MACH_PALM27X
        select PXA27x
        select IWMMXT
        select PALM_TREO
@@ -436,15 +451,18 @@ config MACH_RAUMFELD_RC
        bool "Raumfeld Controller"
        select PXA3xx
        select CPU_PXA300
+        select POWER_SUPPLY
        select HAVE_PWM
 config MACH_RAUMFELD_CONNECTOR
        bool "Raumfeld Connector"
+        select POWER_SUPPLY
        select PXA3xx
        select CPU_PXA300
 config MACH_RAUMFELD_SPEAKER
        bool "Raumfeld Speaker"
+        select POWER_SUPPLY
        select PXA3xx
        select CPU_PXA300
@@ -598,7 +616,7 @@ config MACH_ZIPIT2
        bool "Zipit Z2 Handheld"
        select PXA27x
        select HAVE_PWM
+endif
 endmenu
 config PXA25x
@@ -688,6 +706,8 @@ config SHARPSL_PM
 config SHARPSL_PM_MAX1111
        bool
        select HWMON
+        select SPI
+        select SPI_MASTER
        select SENSORS_MAX1111
 config PXA_HAVE_ISA_IRQS
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index cc39d17b2e07..be0f7df8685c 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -19,7 +19,7 @@ endif
 obj-$(CONFIG_PXA25x)            += mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa25x.o
 obj-$(CONFIG_PXA27x)            += mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa27x.o
 obj-$(CONFIG_PXA3xx)            += mfp-pxa3xx.o clock-pxa3xx.o pxa3xx.o smemc.o pxa3xx-ulpi.o
-obj-$(CONFIG_PXA95x)            += mfp-pxa3xx.o clock-pxa3xx.o pxa95x.o smemc.o
+obj-$(CONFIG_PXA95x)            += mfp-pxa3xx.o clock-pxa3xx.o pxa3xx.o pxa95x.o smemc.o
 obj-$(CONFIG_CPU_PXA300)        += pxa300.o
 obj-$(CONFIG_CPU_PXA320)        += pxa320.o
 obj-$(CONFIG_CPU_PXA930)        += pxa930.o
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c
index 7765d677adbb..fc0b8544e174 100644
--- a/arch/arm/mach-pxa/balloon3.c
+++ b/arch/arm/mach-pxa/balloon3.c
@@ -591,7 +591,7 @@ static void balloon3_nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ct
                                BALLOON3_NAND_CONTROL_REG);
                if (balloon3_ctl_set)
                        __raw_writel(balloon3_ctl_set,
-                                BALLOON3_NAND_CONTROL_REG |
+                                BALLOON3_NAND_CONTROL_REG +
                                BALLOON3_FPGA_SETnCLR);
        }
@@ -608,7 +608,7 @@ static void balloon3_nand_select_chip(struct mtd_info *mtd, int chip)
        __raw_writew(
                BALLOON3_NAND_CONTROL_FLCE0 | BALLOON3_NAND_CONTROL_FLCE1 |
                BALLOON3_NAND_CONTROL_FLCE2 | BALLOON3_NAND_CONTROL_FLCE3,
-                BALLOON3_NAND_CONTROL_REG | BALLOON3_FPGA_SETnCLR);
+                BALLOON3_NAND_CONTROL_REG + BALLOON3_FPGA_SETnCLR);
        /* Deassert correct nCE line */
        __raw_writew(BALLOON3_NAND_CONTROL_FLCE0 << chip,
@@ -626,7 +626,7 @@ static int balloon3_nand_probe(struct platform_device *pdev)
        int ret;
        __raw_writew(BALLOON3_NAND_CONTROL2_16BIT,
-                BALLOON3_NAND_CONTROL2_REG | BALLOON3_FPGA_SETnCLR);
+                BALLOON3_NAND_CONTROL2_REG + BALLOON3_FPGA_SETnCLR);
        ver = __raw_readw(BALLOON3_FPGA_VER);
        if (ver < 0x4f08)
@@ -649,7 +649,7 @@ static int balloon3_nand_probe(struct platform_device *pdev)
                BALLOON3_NAND_CONTROL_FLCE0 | BALLOON3_NAND_CONTROL_FLCE1 |
                BALLOON3_NAND_CONTROL_FLCE2 | BALLOON3_NAND_CONTROL_FLCE3 |
                BALLOON3_NAND_CONTROL_FLWP,
-                BALLOON3_NAND_CONTROL_REG | BALLOON3_FPGA_SETnCLR);
+                BALLOON3_NAND_CONTROL_REG + BALLOON3_FPGA_SETnCLR);
        return 0;
 err2:
@@ -807,7 +807,7 @@ static void __init balloon3_init(void)
 static struct map_desc balloon3_io_desc[] __initdata = {
        {       /* CPLD/FPGA */
-                .virtual        =  BALLOON3_FPGA_VIRT,
+                .virtual        = (unsigned long)BALLOON3_FPGA_VIRT,
                .pfn            = __phys_to_pfn(BALLOON3_FPGA_PHYS),
                .length         = BALLOON3_FPGA_LENGTH,
                .type           = MT_DEVICE,
diff --git a/arch/arm/mach-pxa/cm-x255.c b/arch/arm/mach-pxa/cm-x255.c
index 93f59f877fc6..be751470d37b 100644
--- a/arch/arm/mach-pxa/cm-x255.c
+++ b/arch/arm/mach-pxa/cm-x255.c
@@ -11,7 +11,6 @@
 #include <linux/platform_device.h>
 #include <linux/irq.h>
-#include <linux/gpio.h>
 #include <linux/mtd/partitions.h>
 #include <linux/mtd/physmap.h>
 #include <linux/mtd/nand-gpio.h>
diff --git a/arch/arm/mach-pxa/cm-x2xx-pci.c b/arch/arm/mach-pxa/cm-x2xx-pci.c
index 6bf479d9b5ac..ebd9259f5ac9 100644
--- a/arch/arm/mach-pxa/cm-x2xx-pci.c
+++ b/arch/arm/mach-pxa/cm-x2xx-pci.c
@@ -26,7 +26,7 @@
 #include <asm/hardware/it8152.h>
-unsigned long it8152_base_address;
+void __iomem *it8152_base_address;
 static int cmx2xx_it8152_irq_gpio;
 static void cmx2xx_it8152_irq_demux(unsigned int irq, struct irq_desc *desc)
diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c
index 349896c53abd..f2e4190080cb 100644
--- a/arch/arm/mach-pxa/cm-x2xx.c
+++ b/arch/arm/mach-pxa/cm-x2xx.c
@@ -39,7 +39,7 @@ extern void cmx270_init(void);
 #define CMX2XX_NR_IRQS          (IRQ_BOARD_START + 40)
 /* virtual addresses for statically mapped regions */
-#define CMX2XX_VIRT_BASE        (0xe8000000)
+#define CMX2XX_VIRT_BASE        (void __iomem *)(0xe8000000)
 #define CMX2XX_IT8152_VIRT      (CMX2XX_VIRT_BASE)
 /* physical address if local-bus attached devices */
@@ -482,7 +482,7 @@ static void __init cmx2xx_init_irq(void)
 /* Map PCI companion statically */
 static struct map_desc cmx2xx_io_desc[] __initdata = {
        [0] = { /* PCI bridge */
-                .virtual        = CMX2XX_IT8152_VIRT,
+                .virtual        = (unsigned long)CMX2XX_IT8152_VIRT,
                .pfn            = __phys_to_pfn(PXA_CS4_PHYS),
                .length         = SZ_64M,
                .type           = MT_DEVICE
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c
index 9ac0225cd51b..e40dc47cf2f1 100644
--- a/arch/arm/mach-pxa/cm-x300.c
+++ b/arch/arm/mach-pxa/cm-x300.c
@@ -775,7 +775,6 @@ static struct gpio cm_x300_wi2wi_gpios[] __initdata = {
 static void __init cm_x300_init_wi2wi(void)
 {
-        int bt_reset, wlan_en;
        int err;
        if (system_rev < 130) {
@@ -791,12 +790,11 @@ static void __init cm_x300_init_wi2wi(void)
        }
        udelay(10);
-        gpio_set_value(bt_reset, 0);
+        gpio_set_value(cm_x300_wi2wi_gpios[1].gpio, 0);
        udelay(10);
-        gpio_set_value(bt_reset, 1);
+        gpio_set_value(cm_x300_wi2wi_gpios[1].gpio, 1);
-        gpio_free(wlan_en);
+        gpio_free_array(ARRAY_AND_SIZE(cm_x300_wi2wi_gpios));
-        gpio_free(bt_reset);
 }
 /* MFP */
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c
index f5d91efc2965..5432ecb15def 100644
--- a/arch/arm/mach-pxa/generic.c
+++ b/arch/arm/mach-pxa/generic.c
@@ -16,6 +16,7 @@
 * initialization stuff for PXA machines which can be overridden later if
 * need be.
 */
+#include <linux/gpio.h>
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
@@ -26,7 +27,6 @@
 #include <asm/mach-types.h>
 #include <mach/reset.h>
-#include <mach/gpio.h>
 #include <mach/smemc.h>
 #include <mach/pxa3xx-regs.h>
diff --git a/arch/arm/mach-pxa/include/mach/addr-map.h b/arch/arm/mach-pxa/include/mach/addr-map.h
index f4c03659168c..bbf9df37ad4b 100644
--- a/arch/arm/mach-pxa/include/mach/addr-map.h
+++ b/arch/arm/mach-pxa/include/mach/addr-map.h
@@ -20,7 +20,7 @@
 * Peripheral Bus
 */
 #define PERIPH_PHYS             0x40000000
-#define PERIPH_VIRT             0xf2000000
+#define PERIPH_VIRT             IOMEM(0xf2000000)
 #define PERIPH_SIZE             0x02000000
 /*
@@ -28,21 +28,21 @@
 */
 #define PXA2XX_SMEMC_PHYS       0x48000000
 #define PXA3XX_SMEMC_PHYS       0x4a000000
-#define SMEMC_VIRT              0xf6000000
+#define SMEMC_VIRT              IOMEM(0xf6000000)
 #define SMEMC_SIZE              0x00100000
 /*
 * Dynamic Memory Controller (only on PXA3xx)
 */
 #define DMEMC_PHYS              0x48100000
-#define DMEMC_VIRT              0xf6100000
+#define DMEMC_VIRT              IOMEM(0xf6100000)
 #define DMEMC_SIZE              0x00100000
 /*
 * Internal Memory Controller (PXA27x and later)
 */
 #define IMEMC_PHYS              0x58000000
-#define IMEMC_VIRT              0xfe000000
+#define IMEMC_VIRT              IOMEM(0xfe000000)
 #define IMEMC_SIZE              0x00100000
 #endif /* __ASM_MACH_ADDR_MAP_H */
diff --git a/arch/arm/mach-pxa/include/mach/balloon3.h b/arch/arm/mach-pxa/include/mach/balloon3.h
index 7074e76146c9..6d7eab3d0867 100644
--- a/arch/arm/mach-pxa/include/mach/balloon3.h
+++ b/arch/arm/mach-pxa/include/mach/balloon3.h
@@ -23,7 +23,7 @@ enum balloon3_features {
 };
 #define BALLOON3_FPGA_PHYS      PXA_CS4_PHYS
-#define BALLOON3_FPGA_VIRT      (0xf1000000)    /* as per balloon2 */
+#define BALLOON3_FPGA_VIRT      IOMEM(0xf1000000)       /* as per balloon2 */
 #define BALLOON3_FPGA_LENGTH    0x01000000
 #define BALLOON3_FPGA_SETnCLR           (0x1000)
diff --git a/arch/arm/mach-pxa/include/mach/debug-macro.S b/arch/arm/mach-pxa/include/mach/debug-macro.S
index 7d5c75125d65..70b112e8ef68 100644
--- a/arch/arm/mach-pxa/include/mach/debug-macro.S
+++ b/arch/arm/mach-pxa/include/mach/debug-macro.S
@@ -13,7 +13,7 @@
 #include "hardware.h"
-                .macro  addruart, rp, rv
+                .macro  addruart, rp, rv, tmp
                mov     \rp, #0x00100000
                orr     \rv, \rp, #io_p2v(0x40000000)   @ virtual
                orr     \rp, \rp, #0x40000000           @ physical
diff --git a/arch/arm/mach-pxa/include/mach/gpio-pxa.h b/arch/arm/mach-pxa/include/mach/gpio-pxa.h
new file mode 100644
index 000000000000..576868f8b8c5
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/gpio-pxa.h
@@ -0,0 +1,133 @@
+/*
+ * Written by Philipp Zabel <philipp.zabel@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+#ifndef __MACH_PXA_GPIO_PXA_H
+#define __MACH_PXA_GPIO_PXA_H
+#include <mach/irqs.h>
+#include <mach/hardware.h>
+#define GPIO_REGS_VIRT  io_p2v(0x40E00000)
+#define BANK_OFF(n)     (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
+#define GPIO_REG(x)     (GPIO_REGS_VIRT + (x))
+/* GPIO Pin Level Registers */
+#define GPLR0           GPIO_REG(BANK_OFF(0) + 0x00)
+#define GPLR1           GPIO_REG(BANK_OFF(1) + 0x00)
+#define GPLR2           GPIO_REG(BANK_OFF(2) + 0x00)
+#define GPLR3           GPIO_REG(BANK_OFF(3) + 0x00)
+/* GPIO Pin Direction Registers */
+#define GPDR0           GPIO_REG(BANK_OFF(0) + 0x0c)
+#define GPDR1           GPIO_REG(BANK_OFF(1) + 0x0c)
+#define GPDR2           GPIO_REG(BANK_OFF(2) + 0x0c)
+#define GPDR3           GPIO_REG(BANK_OFF(3) + 0x0c)
+/* GPIO Pin Output Set Registers */
+#define GPSR0           GPIO_REG(BANK_OFF(0) + 0x18)
+#define GPSR1           GPIO_REG(BANK_OFF(1) + 0x18)
+#define GPSR2           GPIO_REG(BANK_OFF(2) + 0x18)
+#define GPSR3           GPIO_REG(BANK_OFF(3) + 0x18)
+/* GPIO Pin Output Clear Registers */
+#define GPCR0           GPIO_REG(BANK_OFF(0) + 0x24)
+#define GPCR1           GPIO_REG(BANK_OFF(1) + 0x24)
+#define GPCR2           GPIO_REG(BANK_OFF(2) + 0x24)
+#define GPCR3           GPIO_REG(BANK_OFF(3) + 0x24)
+/* GPIO Rising Edge Detect Registers */
+#define GRER0           GPIO_REG(BANK_OFF(0) + 0x30)
+#define GRER1           GPIO_REG(BANK_OFF(1) + 0x30)
+#define GRER2           GPIO_REG(BANK_OFF(2) + 0x30)
+#define GRER3           GPIO_REG(BANK_OFF(3) + 0x30)
+/* GPIO Falling Edge Detect Registers */
+#define GFER0           GPIO_REG(BANK_OFF(0) + 0x3c)
+#define GFER1           GPIO_REG(BANK_OFF(1) + 0x3c)
+#define GFER2           GPIO_REG(BANK_OFF(2) + 0x3c)
+#define GFER3           GPIO_REG(BANK_OFF(3) + 0x3c)
+/* GPIO Edge Detect Status Registers */
+#define GEDR0           GPIO_REG(BANK_OFF(0) + 0x48)
+#define GEDR1           GPIO_REG(BANK_OFF(1) + 0x48)
+#define GEDR2           GPIO_REG(BANK_OFF(2) + 0x48)
+#define GEDR3           GPIO_REG(BANK_OFF(3) + 0x48)
+/* GPIO Alternate Function Select Registers */
+#define GAFR0_L         GPIO_REG(0x0054)
+#define GAFR0_U         GPIO_REG(0x0058)
+#define GAFR1_L         GPIO_REG(0x005C)
+#define GAFR1_U         GPIO_REG(0x0060)
+#define GAFR2_L         GPIO_REG(0x0064)
+#define GAFR2_U         GPIO_REG(0x0068)
+#define GAFR3_L         GPIO_REG(0x006C)
+#define GAFR3_U         GPIO_REG(0x0070)
+/* More handy macros.  The argument is a literal GPIO number. */
+#define GPIO_bit(x)     (1 << ((x) & 0x1f))
+#define GPLR(x)         GPIO_REG(BANK_OFF((x) >> 5) + 0x00)
+#define GPDR(x)         GPIO_REG(BANK_OFF((x) >> 5) + 0x0c)
+#define GPSR(x)         GPIO_REG(BANK_OFF((x) >> 5) + 0x18)
+#define GPCR(x)         GPIO_REG(BANK_OFF((x) >> 5) + 0x24)
+#define GRER(x)         GPIO_REG(BANK_OFF((x) >> 5) + 0x30)
+#define GFER(x)         GPIO_REG(BANK_OFF((x) >> 5) + 0x3c)
+#define GEDR(x)         GPIO_REG(BANK_OFF((x) >> 5) + 0x48)
+#define GAFR(x)         GPIO_REG(0x54 + (((x) & 0x70) >> 2))
+#define NR_BUILTIN_GPIO         PXA_GPIO_IRQ_NUM
+#define gpio_to_bank(gpio)      ((gpio) >> 5)
+#ifdef CONFIG_CPU_PXA26x
+/* GPIO86/87/88/89 on PXA26x have their direction bits in GPDR2 inverted,
+ * as well as their Alternate Function value being '1' for GPIO in GAFRx.
+ */
+static inline int __gpio_is_inverted(unsigned gpio)
+{
+        return cpu_is_pxa25x() && gpio > 85;
+}
+#else
+static inline int __gpio_is_inverted(unsigned gpio) { return 0; }
+#endif
+/*
+ * On PXA25x and PXA27x, GAFRx and GPDRx together decide the alternate
+ * function of a GPIO, and GPDRx cannot be altered once configured. It
+ * is attributed as "occupied" here (I know this terminology isn't
+ * accurate, you are welcome to propose a better one :-)
+ */
+static inline int __gpio_is_occupied(unsigned gpio)
+{
+        if (cpu_is_pxa27x() || cpu_is_pxa25x()) {
+                int af = (GAFR(gpio) >> ((gpio & 0xf) * 2)) & 0x3;
+                int dir = GPDR(gpio) & GPIO_bit(gpio);
+                if (__gpio_is_inverted(gpio))
+                        return af != 1 || dir == 0;
+                else
+                        return af != 0 || dir != 0;
+        } else
+                return GPDR(gpio) & GPIO_bit(gpio);
+}
+#include <plat/gpio-pxa.h>
+#endif /* __MACH_PXA_GPIO_PXA_H */
diff --git a/arch/arm/mach-pxa/include/mach/gpio.h b/arch/arm/mach-pxa/include/mach/gpio.h
index c4639502efca..004cade7bb13 100644
--- a/arch/arm/mach-pxa/include/mach/gpio.h
+++ b/arch/arm/mach-pxa/include/mach/gpio.h
@@ -24,84 +24,10 @@
 #ifndef __ASM_ARCH_PXA_GPIO_H
 #define __ASM_ARCH_PXA_GPIO_H
-#include <mach/irqs.h>
-#include <mach/hardware.h>
 #include <asm-generic/gpio.h>
+/* The defines for the driver are needed for the accelerated accessors */
+#include "gpio-pxa.h"
-#define GPIO_REGS_VIRT  io_p2v(0x40E00000)
-#define BANK_OFF(n)     (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
-#define GPIO_REG(x)     (*(volatile u32 *)(GPIO_REGS_VIRT + (x)))
-/* GPIO Pin Level Registers */
-#define GPLR0           GPIO_REG(BANK_OFF(0) + 0x00)
-#define GPLR1           GPIO_REG(BANK_OFF(1) + 0x00)
-#define GPLR2           GPIO_REG(BANK_OFF(2) + 0x00)
-#define GPLR3           GPIO_REG(BANK_OFF(3) + 0x00)
-/* GPIO Pin Direction Registers */
-#define GPDR0           GPIO_REG(BANK_OFF(0) + 0x0c)
-#define GPDR1           GPIO_REG(BANK_OFF(1) + 0x0c)
-#define GPDR2           GPIO_REG(BANK_OFF(2) + 0x0c)
-#define GPDR3           GPIO_REG(BANK_OFF(3) + 0x0c)
-/* GPIO Pin Output Set Registers */
-#define GPSR0           GPIO_REG(BANK_OFF(0) + 0x18)
-#define GPSR1           GPIO_REG(BANK_OFF(1) + 0x18)
-#define GPSR2           GPIO_REG(BANK_OFF(2) + 0x18)
-#define GPSR3           GPIO_REG(BANK_OFF(3) + 0x18)
-/* GPIO Pin Output Clear Registers */
-#define GPCR0           GPIO_REG(BANK_OFF(0) + 0x24)
-#define GPCR1           GPIO_REG(BANK_OFF(1) + 0x24)
-#define GPCR2           GPIO_REG(BANK_OFF(2) + 0x24)
-#define GPCR3           GPIO_REG(BANK_OFF(3) + 0x24)
-/* GPIO Rising Edge Detect Registers */
-#define GRER0           GPIO_REG(BANK_OFF(0) + 0x30)
-#define GRER1           GPIO_REG(BANK_OFF(1) + 0x30)
-#define GRER2           GPIO_REG(BANK_OFF(2) + 0x30)
-#define GRER3           GPIO_REG(BANK_OFF(3) + 0x30)
-/* GPIO Falling Edge Detect Registers */
-#define GFER0           GPIO_REG(BANK_OFF(0) + 0x3c)
-#define GFER1           GPIO_REG(BANK_OFF(1) + 0x3c)
-#define GFER2           GPIO_REG(BANK_OFF(2) + 0x3c)
-#define GFER3           GPIO_REG(BANK_OFF(3) + 0x3c)
-/* GPIO Edge Detect Status Registers */
-#define GEDR0           GPIO_REG(BANK_OFF(0) + 0x48)
-#define GEDR1           GPIO_REG(BANK_OFF(1) + 0x48)
-#define GEDR2           GPIO_REG(BANK_OFF(2) + 0x48)
-#define GEDR3           GPIO_REG(BANK_OFF(3) + 0x48)
-/* GPIO Alternate Function Select Registers */
-#define GAFR0_L         GPIO_REG(0x0054)
-#define GAFR0_U         GPIO_REG(0x0058)
-#define GAFR1_L         GPIO_REG(0x005C)
-#define GAFR1_U         GPIO_REG(0x0060)
-#define GAFR2_L         GPIO_REG(0x0064)
-#define GAFR2_U         GPIO_REG(0x0068)
-#define GAFR3_L         GPIO_REG(0x006C)
-#define GAFR3_U         GPIO_REG(0x0070)
-/* More handy macros.  The argument is a literal GPIO number. */
-#define GPIO_bit(x)     (1 << ((x) & 0x1f))
-#define GPLR(x)         GPIO_REG(BANK_OFF((x) >> 5) + 0x00)
-#define GPDR(x)         GPIO_REG(BANK_OFF((x) >> 5) + 0x0c)
-#define GPSR(x)         GPIO_REG(BANK_OFF((x) >> 5) + 0x18)
-#define GPCR(x)         GPIO_REG(BANK_OFF((x) >> 5) + 0x24)
-#define GRER(x)         GPIO_REG(BANK_OFF((x) >> 5) + 0x30)
-#define GFER(x)         GPIO_REG(BANK_OFF((x) >> 5) + 0x3c)
-#define GEDR(x)         GPIO_REG(BANK_OFF((x) >> 5) + 0x48)
-#define GAFR(x)         GPIO_REG(0x54 + (((x) & 0x70) >> 2))
-#define NR_BUILTIN_GPIO         PXA_GPIO_IRQ_NUM
-#define gpio_to_bank(gpio)      ((gpio) >> 5)
 #define gpio_to_irq(gpio)       IRQ_GPIO(gpio)
 static inline int irq_to_gpio(unsigned int irq)
@@ -118,37 +44,5 @@ static inline int irq_to_gpio(unsigned int irq)
        return -1;
 }
-#ifdef CONFIG_CPU_PXA26x
-/* GPIO86/87/88/89 on PXA26x have their direction bits in GPDR2 inverted,
- * as well as their Alternate Function value being '1' for GPIO in GAFRx.
- */
-static inline int __gpio_is_inverted(unsigned gpio)
-{
-        return cpu_is_pxa25x() && gpio > 85;
-}
-#else
-static inline int __gpio_is_inverted(unsigned gpio) { return 0; }
-#endif
-/*
- * On PXA25x and PXA27x, GAFRx and GPDRx together decide the alternate
- * function of a GPIO, and GPDRx cannot be altered once configured. It
- * is attributed as "occupied" here (I know this terminology isn't
- * accurate, you are welcome to propose a better one :-)
- */
-static inline int __gpio_is_occupied(unsigned gpio)
-{
-        if (cpu_is_pxa27x() || cpu_is_pxa25x()) {
-                int af = (GAFR(gpio) >> ((gpio & 0xf) * 2)) & 0x3;
-                int dir = GPDR(gpio) & GPIO_bit(gpio);
-                if (__gpio_is_inverted(gpio))
-                        return af != 1 || dir == 0;
-                else
-                        return af != 0 || dir != 0;
-        } else
-                return GPDR(gpio) & GPIO_bit(gpio);
-}
 #include <plat/gpio.h>
 #endif
diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h
index de63ca3016b4..8184669dde28 100644
--- a/arch/arm/mach-pxa/include/mach/hardware.h
+++ b/arch/arm/mach-pxa/include/mach/hardware.h
@@ -36,22 +36,23 @@
 * Note that not all PXA2xx chips implement all those addresses, and the
 * kernel only maps the minimum needed range of this mapping.
 */
-#define io_p2v(x) (0xf2000000 + ((x) & 0x01ffffff) + (((x) & 0x1c000000) >> 1))
 #define io_v2p(x) (0x3c000000 + ((x) & 0x01ffffff) + (((x) & 0x0e000000) << 1))
+#define io_p2v(x) IOMEM(0xf2000000 + ((x) & 0x01ffffff) + (((x) & 0x1c000000) >> 1))
 #ifndef __ASSEMBLY__
+# define IOMEM(x) ((void __iomem *)(x))
-# define __REG(x)       (*((volatile u32 *)io_p2v(x)))
+# define __REG(x)       (*((volatile u32 __iomem *)io_p2v(x)))
 /* With indexed regs we don't want to feed the index through io_p2v()
   especially if it is a variable, otherwise horrible code will result. */
 # define __REG2(x,y)    \
-        (*(volatile u32 *)((u32)&__REG(x) + (y)))
+        (*(volatile u32 __iomem*)((u32)&__REG(x) + (y)))
 # define __PREG(x)      (io_v2p((u32)&(x)))
 #else
+# define IOMEM(x)       x 
 # define __REG(x)       io_p2v(x)
 # define __PREG(x)      io_v2p(x)
diff --git a/arch/arm/mach-pxa/include/mach/littleton.h b/arch/arm/mach-pxa/include/mach/littleton.h
index 2a5726c15e0e..b6238cbd8aea 100644
--- a/arch/arm/mach-pxa/include/mach/littleton.h
+++ b/arch/arm/mach-pxa/include/mach/littleton.h
@@ -1,7 +1,7 @@
 #ifndef __ASM_ARCH_LITTLETON_H
 #define __ASM_ARCH_LITTLETON_H
-#include <mach/gpio.h>
+#include <mach/gpio-pxa.h>
 #define LITTLETON_ETH_PHYS      0x30000000
diff --git a/arch/arm/mach-pxa/include/mach/lpd270.h b/arch/arm/mach-pxa/include/mach/lpd270.h
index cd070092b6eb..4edc712a2de8 100644
--- a/arch/arm/mach-pxa/include/mach/lpd270.h
+++ b/arch/arm/mach-pxa/include/mach/lpd270.h
@@ -13,13 +13,13 @@
 #define __ASM_ARCH_LPD270_H
 #define LPD270_CPLD_PHYS        PXA_CS2_PHYS
-#define LPD270_CPLD_VIRT        0xf0000000
+#define LPD270_CPLD_VIRT        IOMEM(0xf0000000)
 #define LPD270_CPLD_SIZE        0x00100000
 #define LPD270_ETH_PHYS         (PXA_CS2_PHYS + 0x01000000)
 /* CPLD registers  */
-#define LPD270_CPLD_REG(x)      ((unsigned long)(LPD270_CPLD_VIRT + (x)))
+#define LPD270_CPLD_REG(x)      (LPD270_CPLD_VIRT + (x))
 #define LPD270_CONTROL          LPD270_CPLD_REG(0x00)
 #define LPD270_PERIPHERAL0      LPD270_CPLD_REG(0x04)
 #define LPD270_PERIPHERAL1      LPD270_CPLD_REG(0x08)
diff --git a/arch/arm/mach-pxa/include/mach/memory.h b/arch/arm/mach-pxa/include/mach/memory.h
deleted file mode 100644
index d05a59727d66..000000000000
--- a/arch/arm/mach-pxa/include/mach/memory.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- *  arch/arm/mach-pxa/include/mach/memory.h
- *
- * Author:      Nicolas Pitre
- * Copyright:   (C) 2001 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
-/*
- * Physical DRAM offset.
- */
-#define PLAT_PHYS_OFFSET        UL(0xa0000000)
-#endif
diff --git a/arch/arm/mach-pxa/include/mach/mtd-xip.h b/arch/arm/mach-pxa/include/mach/mtd-xip.h
index 297387ec3618..990d2bf2fb45 100644
--- a/arch/arm/mach-pxa/include/mach/mtd-xip.h
+++ b/arch/arm/mach-pxa/include/mach/mtd-xip.h
@@ -16,7 +16,6 @@
 #define __ARCH_PXA_MTD_XIP_H__
 #include <mach/regs-ost.h>
-#include <mach/regs-intc.h>
 #define xip_irqpending()        (ICIP & ICMR)
diff --git a/arch/arm/mach-pxa/include/mach/palm27x.h b/arch/arm/mach-pxa/include/mach/palm27x.h
index 0a5e5eadebf5..f80bbe246afe 100644
--- a/arch/arm/mach-pxa/include/mach/palm27x.h
+++ b/arch/arm/mach-pxa/include/mach/palm27x.h
@@ -34,7 +34,7 @@ extern struct pxafb_mode_info palm_320x320_new_lcd_mode;
 extern void __init palm27x_lcd_init(int power,
                                        struct pxafb_mode_info *mode);
 #else
-static inline void palm27x_lcd_init(int power, struct pxafb_mode_info *mode) {}
+#define palm27x_lcd_init(power, mode)   do {} while (0)
 #endif
 #if     defined(CONFIG_USB_GADGET_PXA27X) || \
diff --git a/arch/arm/mach-pxa/include/mach/palmtx.h b/arch/arm/mach-pxa/include/mach/palmtx.h
index 10abc4f2e8e4..7074a6ed46c6 100644
--- a/arch/arm/mach-pxa/include/mach/palmtx.h
+++ b/arch/arm/mach-pxa/include/mach/palmtx.h
@@ -71,7 +71,7 @@
 /* Various addresses  */
 #define PALMTX_PCMCIA_PHYS      0x28000000
-#define PALMTX_PCMCIA_VIRT      0xf0000000
+#define PALMTX_PCMCIA_VIRT      IOMEM(0xf0000000)
 #define PALMTX_PCMCIA_SIZE      0x100000
 #define PALMTX_PHYS_RAM_START   0xa0000000
@@ -84,8 +84,8 @@
 #define PALMTX_NAND_ALE_PHYS    (PALMTX_PHYS_NAND_START | (1 << 24))
 #define PALMTX_NAND_CLE_PHYS    (PALMTX_PHYS_NAND_START | (1 << 25))
-#define PALMTX_NAND_ALE_VIRT    0xff100000
+#define PALMTX_NAND_ALE_VIRT    IOMEM(0xff100000)
-#define PALMTX_NAND_CLE_VIRT    0xff200000
+#define PALMTX_NAND_CLE_VIRT    IOMEM(0xff200000)
 /* TOUCHSCREEN */
 #define AC97_LINK_FRAME                 21
diff --git a/arch/arm/mach-pxa/include/mach/pxa27x.h b/arch/arm/mach-pxa/include/mach/pxa27x.h
index b9b1bdc4bacc..7cff640582b8 100644
--- a/arch/arm/mach-pxa/include/mach/pxa27x.h
+++ b/arch/arm/mach-pxa/include/mach/pxa27x.h
@@ -1,6 +1,7 @@
 #ifndef __MACH_PXA27x_H
 #define __MACH_PXA27x_H
+#include <linux/suspend.h>
 #include <mach/hardware.h>
 #include <mach/pxa2xx-regs.h>
 #include <mach/mfp-pxa27x.h>
@@ -21,6 +22,7 @@
 extern void __init pxa27x_map_io(void);
 extern void __init pxa27x_init_irq(void);
 extern int __init pxa27x_set_pwrmode(unsigned int mode);
+extern void pxa27x_cpu_pm_enter(suspend_state_t state);
 #define pxa27x_handle_irq       ichp_handle_irq
diff --git a/arch/arm/mach-pxa/include/mach/pxa95x.h b/arch/arm/mach-pxa/include/mach/pxa95x.h
new file mode 100644
index 000000000000..cbb097c4cb1f
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/pxa95x.h
@@ -0,0 +1,7 @@
+#ifndef __MACH_PXA95X_H
+#define __MACH_PXA95X_H
+#include <mach/pxa3xx.h>
+#include <mach/mfp-pxa930.h>
+#endif /* __MACH_PXA95X_H */
diff --git a/arch/arm/mach-pxa/include/mach/pxafb.h b/arch/arm/mach-pxa/include/mach/pxafb.h
index 01a45ac48114..486b4c519ae2 100644
--- a/arch/arm/mach-pxa/include/mach/pxafb.h
+++ b/arch/arm/mach-pxa/include/mach/pxafb.h
@@ -158,5 +158,18 @@ struct pxafb_mach_info {
 void pxa_set_fb_info(struct device *, struct pxafb_mach_info *);
 unsigned long pxafb_get_hsync_time(struct device *dev);
+#ifdef CONFIG_FB_PXA_SMARTPANEL
 extern int pxafb_smart_queue(struct fb_info *info, uint16_t *cmds, int);
 extern int pxafb_smart_flush(struct fb_info *info);
+#else
+static inline int pxafb_smart_queue(struct fb_info *info,
+                                    uint16_t *cmds, int n)
+{
+        return 0;
+}
+static inline int pxafb_smart_flush(struct fb_info *info)
+{
+        return 0;
+}
+#endif
diff --git a/arch/arm/mach-pxa/include/mach/smemc.h b/arch/arm/mach-pxa/include/mach/smemc.h
index 654adc90c9a0..b7de471b273a 100644
--- a/arch/arm/mach-pxa/include/mach/smemc.h
+++ b/arch/arm/mach-pxa/include/mach/smemc.h
@@ -13,7 +13,7 @@
 #define PXA2XX_SMEMC_BASE       0x48000000
 #define PXA3XX_SMEMC_BASE       0x4a000000
-#define SMEMC_VIRT              0xf6000000
+#define SMEMC_VIRT              IOMEM(0xf6000000)
 #define MDCNFG          (SMEMC_VIRT + 0x00)  /* SDRAM Configuration Register 0 */
 #define MDREFR          (SMEMC_VIRT + 0x04)  /* SDRAM Refresh Control Register */
diff --git a/arch/arm/mach-pxa/include/mach/zeus.h b/arch/arm/mach-pxa/include/mach/zeus.h
index 0641f31a56b7..56024f81d57e 100644
--- a/arch/arm/mach-pxa/include/mach/zeus.h
+++ b/arch/arm/mach-pxa/include/mach/zeus.h
@@ -68,7 +68,7 @@
 * Be gentle, and remap that over 32kB...
 */
-#define ZEUS_CPLD               (0xf0000000)
+#define ZEUS_CPLD               IOMEM(0xf0000000)
 #define ZEUS_CPLD_VERSION       (ZEUS_CPLD + 0x0000)
 #define ZEUS_CPLD_ISA_IRQ       (ZEUS_CPLD + 0x1000)
 #define ZEUS_CPLD_CONTROL       (ZEUS_CPLD + 0x2000)
@@ -76,7 +76,7 @@
 /* CPLD register bits */
 #define ZEUS_CPLD_CONTROL_CF_RST        0x01
-#define ZEUS_PC104IO            (0xf1000000)
+#define ZEUS_PC104IO            IOMEM(0xf1000000)
 #define ZEUS_SRAM_SIZE          (256 * 1024)
diff --git a/arch/arm/mach-pxa/include/mach/zylonite.h b/arch/arm/mach-pxa/include/mach/zylonite.h
index ea24998b923c..ecca976f03d2 100644
--- a/arch/arm/mach-pxa/include/mach/zylonite.h
+++ b/arch/arm/mach-pxa/include/mach/zylonite.h
@@ -19,7 +19,7 @@ extern int wm9713_irq;
 extern int lcd_id;
 extern int lcd_orientation;
-#ifdef CONFIG_CPU_PXA300
+#ifdef CONFIG_MACH_ZYLONITE300
 extern void zylonite_pxa300_init(void);
 #else
 static inline void zylonite_pxa300_init(void)
@@ -29,7 +29,7 @@ static inline void zylonite_pxa300_init(void)
 }
 #endif
-#ifdef CONFIG_CPU_PXA320
+#ifdef CONFIG_MACH_ZYLONITE320
 extern void zylonite_pxa320_init(void);
 #else
 static inline void zylonite_pxa320_init(void)
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
index b09e848eb6c6..25f29adf5114 100644
--- a/arch/arm/mach-pxa/irq.c
+++ b/arch/arm/mach-pxa/irq.c
@@ -11,7 +11,6 @@
 *  it under the terms of the GNU General Public License version 2 as
 *  published by the Free Software Foundation.
 */
 #include <linux/init.h>
 #include <linux/module.h>
 #include <linux/interrupt.h>
@@ -21,11 +20,11 @@
 #include <mach/hardware.h>
 #include <mach/irqs.h>
-#include <mach/gpio.h>
+#include <mach/gpio-pxa.h>
 #include "generic.h"
-#define IRQ_BASE                (void __iomem *)io_p2v(0x40d00000)
+#define IRQ_BASE                io_p2v(0x40d00000)
 #define ICIP                    (0x000)
 #define ICMR                    (0x004)
@@ -63,7 +62,7 @@ static inline void __iomem *irq_base(int i)
                0x40d00130,
        };
-        return (void __iomem *)io_p2v(phys_base[i]);
+        return io_p2v(phys_base[i]);
 }
 void pxa_mask_irq(struct irq_data *d)
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
index 16df0fc0879a..1dd530279e0b 100644
--- a/arch/arm/mach-pxa/lpd270.c
+++ b/arch/arm/mach-pxa/lpd270.c
@@ -12,7 +12,7 @@
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
+#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/syscore_ops.h>
@@ -39,7 +39,6 @@
 #include <asm/mach/flash.h>
 #include <mach/pxa27x.h>
-#include <mach/gpio.h>
 #include <mach/lpd270.h>
 #include <mach/audio.h>
 #include <mach/pxafb.h>
@@ -480,7 +479,7 @@ static void __init lpd270_init(void)
 static struct map_desc lpd270_io_desc[] __initdata = {
        {
-                .virtual        = LPD270_CPLD_VIRT,
+                .virtual        = (unsigned long)LPD270_CPLD_VIRT,
                .pfn            = __phys_to_pfn(LPD270_CPLD_PHYS),
                .length         = LPD270_CPLD_SIZE,
                .type           = MT_DEVICE,
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index a8c696bfc132..c48ce6da9184 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -11,6 +11,7 @@
 *  it under the terms of the GNU General Public License version 2 as
 *  published by the Free Software Foundation.
 */
+#include <linux/gpio.h>
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
@@ -42,7 +43,6 @@
 #include <asm/hardware/sa1111.h>
 #include <mach/pxa25x.h>
-#include <mach/gpio.h>
 #include <mach/audio.h>
 #include <mach/lubbock.h>
 #include <mach/udc.h>
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index cc6e14f6d114..0567d3965fda 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -12,7 +12,7 @@
 *  it under the terms of the GNU General Public License version 2 as
 *  published by the Free Software Foundation.
 */
+#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/syscore_ops.h>
@@ -43,7 +43,6 @@
 #include <asm/mach/flash.h>
 #include <mach/pxa27x.h>
-#include <mach/gpio.h>
 #include <mach/mainstone.h>
 #include <mach/audio.h>
 #include <mach/pxafb.h>
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c
index b27544bcafcb..43a5f6861ca3 100644
--- a/arch/arm/mach-pxa/mfp-pxa2xx.c
+++ b/arch/arm/mach-pxa/mfp-pxa2xx.c
@@ -12,15 +12,15 @@
 *  it under the terms of the GNU General Public License version 2 as
 *  published by the Free Software Foundation.
 */
+#include <linux/gpio.h>
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/syscore_ops.h>
-#include <mach/gpio.h>
 #include <mach/pxa2xx-regs.h>
 #include <mach/mfp-pxa2xx.h>
+#include <mach/gpio-pxa.h>
 #include "generic.h"
diff --git a/arch/arm/mach-pxa/palmtreo.c b/arch/arm/mach-pxa/palmtreo.c
index 7346fbfa8101..94e9708b349d 100644
--- a/arch/arm/mach-pxa/palmtreo.c
+++ b/arch/arm/mach-pxa/palmtreo.c
@@ -423,6 +423,7 @@ static void __init palmphone_common_init(void)
        palmtreo_leds_init();
 }
+#ifdef CONFIG_MACH_TREO680
 static void __init treo680_init(void)
 {
        pxa2xx_mfp_config(ARRAY_AND_SIZE(treo680_pin_config));
@@ -430,7 +431,9 @@ static void __init treo680_init(void)
        palm27x_mmc_init(GPIO_NR_TREO_SD_DETECT_N, GPIO_NR_TREO680_SD_READONLY,
                        GPIO_NR_TREO680_SD_POWER, 0);
 }
+#endif
+#ifdef CONFIG_MACH_CENTRO
 static void __init centro_init(void)
 {
        pxa2xx_mfp_config(ARRAY_AND_SIZE(centro685_pin_config));
@@ -438,7 +441,9 @@ static void __init centro_init(void)
        palm27x_mmc_init(GPIO_NR_TREO_SD_DETECT_N, -1,
                        GPIO_NR_CENTRO_SD_POWER, 1);
 }
+#endif
+#ifdef CONFIG_MACH_TREO680
 MACHINE_START(TREO680, "Palm Treo 680")
        .atag_offset    = 0x100,
        .map_io         = pxa27x_map_io,
@@ -448,7 +453,9 @@ MACHINE_START(TREO680, "Palm Treo 680")
        .timer          = &pxa_timer,
        .init_machine   = treo680_init,
 MACHINE_END
+#endif
+#ifdef CONFIG_MACH_CENTRO
 MACHINE_START(CENTRO, "Palm Centro 685")
        .atag_offset    = 0x100,
        .map_io         = pxa27x_map_io,
@@ -458,3 +465,4 @@ MACHINE_START(CENTRO, "Palm Centro 685")
        .timer          = &pxa_timer,
        .init_machine   = centro_init,
 MACHINE_END
+#endif
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c
index 2b9e76fc2c90..4e3e45927e95 100644
--- a/arch/arm/mach-pxa/palmtx.c
+++ b/arch/arm/mach-pxa/palmtx.c
@@ -247,7 +247,7 @@ static void palmtx_nand_cmd_ctl(struct mtd_info *mtd, int cmd,
                                 unsigned int ctrl)
 {
        struct nand_chip *this = mtd->priv;
-        unsigned long nandaddr = (unsigned long)this->IO_ADDR_W;
+        char __iomem *nandaddr = this->IO_ADDR_W;
        if (cmd == NAND_CMD_NONE)
                return;
@@ -315,17 +315,17 @@ static inline void palmtx_nand_init(void) {}
 ******************************************************************************/
 static struct map_desc palmtx_io_desc[] __initdata = {
 {
-        .virtual        = PALMTX_PCMCIA_VIRT,
+        .virtual        = (unsigned long)PALMTX_PCMCIA_VIRT,
        .pfn            = __phys_to_pfn(PALMTX_PCMCIA_PHYS),
        .length         = PALMTX_PCMCIA_SIZE,
        .type           = MT_DEVICE,
 }, {
-        .virtual        = PALMTX_NAND_ALE_VIRT,
+        .virtual        = (unsigned long)PALMTX_NAND_ALE_VIRT,
        .pfn            = __phys_to_pfn(PALMTX_NAND_ALE_PHYS),
        .length         = SZ_1M,
        .type           = MT_DEVICE,
 }, {
-        .virtual        = PALMTX_NAND_CLE_VIRT,
+        .virtual        = (unsigned long)PALMTX_NAND_CLE_VIRT,
        .pfn            = __phys_to_pfn(PALMTX_NAND_CLE_PHYS),
        .length         = SZ_1M,
        .type           = MT_DEVICE,
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c
index 6d5b7e062124..9a9c539f6c01 100644
--- a/arch/arm/mach-pxa/pcm990-baseboard.c
+++ b/arch/arm/mach-pxa/pcm990-baseboard.c
@@ -19,7 +19,7 @@
 *  it under the terms of the GNU General Public License version 2 as
 *  published by the Free Software Foundation.
 */
+#include <linux/gpio.h>
 #include <linux/irq.h>
 #include <linux/platform_device.h>
 #include <linux/i2c.h>
@@ -28,7 +28,6 @@
 #include <media/soc_camera.h>
-#include <asm/gpio.h>
 #include <mach/camera.h>
 #include <asm/mach/map.h>
 #include <mach/pxa27x.h>
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index 9c434d21a271..f05f9486b0cb 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -16,6 +16,7 @@
 * initialization stuff for PXA machines which can be overridden later if
 * need be.
 */
+#include <linux/gpio.h>
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
@@ -23,12 +24,12 @@
 #include <linux/suspend.h>
 #include <linux/syscore_ops.h>
 #include <linux/irq.h>
+#include <linux/gpio.h>
 #include <asm/mach/map.h>
 #include <asm/suspend.h>
 #include <mach/hardware.h>
 #include <mach/irqs.h>
-#include <mach/gpio.h>
 #include <mach/pxa25x.h>
 #include <mach/reset.h>
 #include <mach/pm.h>
@@ -324,7 +325,7 @@ void __init pxa26x_init_irq(void)
 static struct map_desc pxa25x_io_desc[] __initdata = {
        {       /* Mem Ctl */
-                .virtual        = SMEMC_VIRT,
+                .virtual        = (unsigned long)SMEMC_VIRT,
                .pfn            = __phys_to_pfn(PXA2XX_SMEMC_BASE),
                .length         = 0x00200000,
                .type           = MT_DEVICE
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index 9d2400b5f503..bc5a98ebaa72 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -11,6 +11,7 @@
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
+#include <linux/gpio.h>
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
@@ -20,13 +21,13 @@
 #include <linux/io.h>
 #include <linux/irq.h>
 #include <linux/i2c/pxa-i2c.h>
+#include <linux/gpio.h>
 #include <asm/mach/map.h>
 #include <mach/hardware.h>
 #include <asm/irq.h>
 #include <asm/suspend.h>
 #include <mach/irqs.h>
-#include <mach/gpio.h>
 #include <mach/pxa27x.h>
 #include <mach/reset.h>
 #include <mach/ohci.h>
@@ -390,7 +391,7 @@ void __init pxa27x_init_irq(void)
 static struct map_desc pxa27x_io_desc[] __initdata = {
        {       /* Mem Ctl */
-                .virtual        = SMEMC_VIRT,
+                .virtual        = (unsigned long)SMEMC_VIRT,
                .pfn            = __phys_to_pfn(PXA2XX_SMEMC_BASE),
                .length         = 0x00200000,
                .type           = MT_DEVICE
diff --git a/arch/arm/mach-pxa/pxa3xx-ulpi.c b/arch/arm/mach-pxa/pxa3xx-ulpi.c
index ce7168b233e2..e28dfb88827f 100644
--- a/arch/arm/mach-pxa/pxa3xx-ulpi.c
+++ b/arch/arm/mach-pxa/pxa3xx-ulpi.c
@@ -265,6 +265,7 @@ int pxa3xx_u2d_start_hc(struct usb_bus *host)
        return err;
 }
+EXPORT_SYMBOL_GPL(pxa3xx_u2d_start_hc);
 void pxa3xx_u2d_stop_hc(struct usb_bus *host)
 {
@@ -277,6 +278,7 @@ void pxa3xx_u2d_stop_hc(struct usb_bus *host)
        clk_disable(u2d->clk);
 }
+EXPORT_SYMBOL_GPL(pxa3xx_u2d_stop_hc);
 static int pxa3xx_u2d_probe(struct platform_device *pdev)
 {
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index b5cd9e5aba31..0737c59b88ae 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -12,7 +12,6 @@
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
@@ -26,7 +25,7 @@
 #include <asm/mach/map.h>
 #include <asm/suspend.h>
 #include <mach/hardware.h>
-#include <mach/gpio.h>
+#include <mach/gpio-pxa.h>
 #include <mach/pxa3xx-regs.h>
 #include <mach/reset.h>
 #include <mach/ohci.h>
@@ -394,7 +393,7 @@ void __init pxa3xx_init_irq(void)
 static struct map_desc pxa3xx_io_desc[] __initdata = {
        {       /* Mem Ctl */
-                .virtual        = SMEMC_VIRT,
+                .virtual        = (unsigned long)SMEMC_VIRT,
                .pfn            = __phys_to_pfn(PXA3XX_SMEMC_BASE),
                .length         = 0x00200000,
                .type           = MT_DEVICE
diff --git a/arch/arm/mach-pxa/pxa95x.c b/arch/arm/mach-pxa/pxa95x.c
index 0ee166b61f81..51371b39d2a3 100644
--- a/arch/arm/mach-pxa/pxa95x.c
+++ b/arch/arm/mach-pxa/pxa95x.c
@@ -9,7 +9,6 @@
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
@@ -21,7 +20,7 @@
 #include <linux/syscore_ops.h>
 #include <mach/hardware.h>
-#include <mach/gpio.h>
+#include <mach/gpio-pxa.h>
 #include <mach/pxa3xx-regs.h>
 #include <mach/pxa930.h>
 #include <mach/reset.h>
diff --git a/arch/arm/mach-pxa/saarb.c b/arch/arm/mach-pxa/saarb.c
index 5ce340320ab9..3e999e308a2d 100644
--- a/arch/arm/mach-pxa/saarb.c
+++ b/arch/arm/mach-pxa/saarb.c
@@ -9,12 +9,13 @@
 *  it under the terms of the GNU General Public License version 2 as
 *  publishhed by the Free Software Foundation.
 */
+#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/i2c.h>
 #include <linux/i2c/pxa-i2c.h>
 #include <linux/mfd/88pm860x.h>
+#include <linux/gpio.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -23,7 +24,7 @@
 #include <mach/hardware.h>
 #include <mach/mfp.h>
 #include <mach/mfp-pxa930.h>
-#include <mach/gpio.h>
+#include <mach/pxa95x.h>
 #include "generic.h"
diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c
index 65fed3753fa2..ead32c90fec1 100644
--- a/arch/arm/mach-pxa/z2.c
+++ b/arch/arm/mach-pxa/z2.c
@@ -686,7 +686,8 @@ static void z2_power_off(void)
         */
        PSPR = 0x0;
        local_irq_disable();
-        pxa27x_cpu_suspend(PWRMODE_DEEPSLEEP, PLAT_PHYS_OFFSET - PAGE_OFFSET);
+        pxa27x_set_pwrmode(PWRMODE_DEEPSLEEP);
+        pxa27x_cpu_pm_enter(PM_SUSPEND_MEM);
 }
 #else
 #define z2_power_off   NULL
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c
index c424e7d85ce3..498b83b089f3 100644
--- a/arch/arm/mach-pxa/zeus.c
+++ b/arch/arm/mach-pxa/zeus.c
@@ -860,25 +860,25 @@ static void __init zeus_init(void)
 static struct map_desc zeus_io_desc[] __initdata = {
        {
-                .virtual = ZEUS_CPLD_VERSION,
+                .virtual = (unsigned long)ZEUS_CPLD_VERSION,
                .pfn     = __phys_to_pfn(ZEUS_CPLD_VERSION_PHYS),
                .length  = 0x1000,
                .type    = MT_DEVICE,
        },
        {
-                .virtual = ZEUS_CPLD_ISA_IRQ,
+                .virtual = (unsigned long)ZEUS_CPLD_ISA_IRQ,
                .pfn     = __phys_to_pfn(ZEUS_CPLD_ISA_IRQ_PHYS),
                .length  = 0x1000,
                .type    = MT_DEVICE,
        },
        {
-                .virtual = ZEUS_CPLD_CONTROL,
+                .virtual = (unsigned long)ZEUS_CPLD_CONTROL,
                .pfn     = __phys_to_pfn(ZEUS_CPLD_CONTROL_PHYS),
                .length  = 0x1000,
                .type    = MT_DEVICE,
        },
        {
-                .virtual = ZEUS_PC104IO,
+                .virtual = (unsigned long)ZEUS_PC104IO,
                .pfn     = __phys_to_pfn(ZEUS_PC104IO_PHYS),
                .length  = 0x00800000,
                .type    = MT_DEVICE,
diff --git a/arch/arm/mach-realview/include/mach/debug-macro.S b/arch/arm/mach-realview/include/mach/debug-macro.S
index 90b687cbe04e..fb4901c4ef04 100644
--- a/arch/arm/mach-realview/include/mach/debug-macro.S
+++ b/arch/arm/mach-realview/include/mach/debug-macro.S
@@ -33,7 +33,7 @@
 #error "Unknown RealView platform"
 #endif
-                .macro  addruart, rp, rv
+                .macro  addruart, rp, rv, tmp
                mov     \rp, #DEBUG_LL_UART_OFFSET
                orr     \rv, \rp, #0xfb000000   @ virtual base
                orr     \rp, \rp, #0x10000000   @ physical base
diff --git a/arch/arm/mach-realview/include/mach/gpio.h b/arch/arm/mach-realview/include/mach/gpio.h
index 94ff27678a46..40a8c178f10d 100644
--- a/arch/arm/mach-realview/include/mach/gpio.h
+++ b/arch/arm/mach-realview/include/mach/gpio.h
@@ -1,6 +1 @@
-#include <asm-generic/gpio.h>
+/* empty */
-#define gpio_get_value  __gpio_get_value
-#define gpio_set_value  __gpio_set_value
-#define gpio_cansleep   __gpio_cansleep
-#define gpio_to_irq     __gpio_to_irq
diff --git a/arch/arm/mach-rpc/include/mach/debug-macro.S b/arch/arm/mach-rpc/include/mach/debug-macro.S
index 85effffdc2b2..6d28cc99b124 100644
--- a/arch/arm/mach-rpc/include/mach/debug-macro.S
+++ b/arch/arm/mach-rpc/include/mach/debug-macro.S
@@ -11,7 +11,7 @@
 *
 */
-                .macro  addruart, rp, rv
+                .macro  addruart, rp, rv, tmp
                mov     \rp, #0x00010000
                orr     \rp, \rp, #0x00000fe0
                orr     \rv, \rp, #0xe0000000   @ virtual
diff --git a/arch/arm/mach-s3c2400/include/mach/memory.h b/arch/arm/mach-s3c2400/include/mach/memory.h
deleted file mode 100644
index 3f33670dd012..000000000000
--- a/arch/arm/mach-s3c2400/include/mach/memory.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/* arch/arm/mach-s3c2400/include/mach/memory.h
- *  from arch/arm/mach-rpc/include/mach/memory.h
- *
- *  Copyright 2007 Simtec Electronics
- *      http://armlinux.simtec.co.uk/
- *      Ben Dooks <ben@simtec.co.uk>
- *
- *  Copyright (C) 1996,1997,1998 Russell King.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
-#define PLAT_PHYS_OFFSET        UL(0x0C000000)
-#endif
diff --git a/arch/arm/mach-s3c2410/include/mach/debug-macro.S b/arch/arm/mach-s3c2410/include/mach/debug-macro.S
index 5882deaa56be..4135de87d1f7 100644
--- a/arch/arm/mach-s3c2410/include/mach/debug-macro.S
+++ b/arch/arm/mach-s3c2410/include/mach/debug-macro.S
@@ -19,7 +19,7 @@
 #define S3C2410_UART1_OFF (0x4000)
 #define SHIFT_2440TXF (14-9)
-        .macro addruart, rp, rv
+        .macro addruart, rp, rv, tmp
                ldr     \rp, = S3C24XX_PA_UART
                ldr     \rv, = S3C24XX_VA_UART
 #if CONFIG_DEBUG_S3C_UART != 0
diff --git a/arch/arm/mach-s3c2410/include/mach/gpio.h b/arch/arm/mach-s3c2410/include/mach/gpio.h
index f7f6b07df30e..6fac70f3484e 100644
--- a/arch/arm/mach-s3c2410/include/mach/gpio.h
+++ b/arch/arm/mach-s3c2410/include/mach/gpio.h
@@ -11,11 +11,6 @@
 * published by the Free Software Foundation.
 */
-#define gpio_get_value  __gpio_get_value
-#define gpio_set_value  __gpio_set_value
-#define gpio_cansleep   __gpio_cansleep
-#define gpio_to_irq     __gpio_to_irq
 /* some boards require extra gpio capacity to support external
 * devices that need GPIO.
 */
@@ -28,7 +23,6 @@
 #define ARCH_NR_GPIOS   (256 + CONFIG_S3C24XX_GPIO_EXTRA)
 #endif
-#include <asm-generic/gpio.h>
 #include <mach/gpio-nrs.h>
 #include <mach/gpio-fns.h>
diff --git a/arch/arm/mach-s3c2410/include/mach/h1940-latch.h b/arch/arm/mach-s3c2410/include/mach/h1940-latch.h
index 97e42bfce81e..fc897d3a056c 100644
--- a/arch/arm/mach-s3c2410/include/mach/h1940-latch.h
+++ b/arch/arm/mach-s3c2410/include/mach/h1940-latch.h
@@ -14,7 +14,7 @@
 #ifndef __ASM_ARCH_H1940_LATCH_H
 #define __ASM_ARCH_H1940_LATCH_H
-#include <mach/gpio.h>
+#include <asm/gpio.h>
 #define H1940_LATCH_GPIO(x)             (S3C_GPIO_END + (x))
diff --git a/arch/arm/mach-s3c2410/include/mach/memory.h b/arch/arm/mach-s3c2410/include/mach/memory.h
deleted file mode 100644
index f92b97b89c0c..000000000000
--- a/arch/arm/mach-s3c2410/include/mach/memory.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/* arch/arm/mach-s3c2410/include/mach/memory.h
- *  from arch/arm/mach-rpc/include/mach/memory.h
- *
- *  Copyright (C) 1996,1997,1998 Russell King.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
-#define PLAT_PHYS_OFFSET        UL(0x30000000)
-#endif
diff --git a/arch/arm/mach-s3c64xx/include/mach/debug-macro.S b/arch/arm/mach-s3c64xx/include/mach/debug-macro.S
index a29e70550c70..c0c076a90f27 100644
--- a/arch/arm/mach-s3c64xx/include/mach/debug-macro.S
+++ b/arch/arm/mach-s3c64xx/include/mach/debug-macro.S
@@ -21,7 +21,7 @@
         * aligned and add in the offset when we load the value here.
         */
-        .macro addruart, rp, rv
+        .macro addruart, rp, rv, tmp
                ldr     \rp, = S3C_PA_UART
                ldr     \rv, = (S3C_VA_UART + S3C_PA_UART & 0xfffff)
 #if CONFIG_DEBUG_S3C_UART != 0
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio.h b/arch/arm/mach-s3c64xx/include/mach/gpio.h
index 0d46e994048a..6e34c2f6e670 100644
--- a/arch/arm/mach-s3c64xx/include/mach/gpio.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio.h
@@ -12,11 +12,6 @@
 * published by the Free Software Foundation.
 */
-#define gpio_get_value  __gpio_get_value
-#define gpio_set_value  __gpio_set_value
-#define gpio_cansleep   __gpio_cansleep
-#define gpio_to_irq     __gpio_to_irq
 /* GPIO bank sizes */
 #define S3C64XX_GPIO_A_NR       (8)
 #define S3C64XX_GPIO_B_NR       (7)
@@ -96,5 +91,3 @@ enum s3c_gpio_number {
 #define BOARD_NR_GPIOS 16
 #define ARCH_NR_GPIOS   (GPIO_BOARD_START + BOARD_NR_GPIOS)
-#include <asm-generic/gpio.h>
diff --git a/arch/arm/mach-s3c64xx/include/mach/memory.h b/arch/arm/mach-s3c64xx/include/mach/memory.h
deleted file mode 100644
index b704669f95ff..000000000000
--- a/arch/arm/mach-s3c64xx/include/mach/memory.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/* arch/arm/mach-s3c6400/include/mach/memory.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
-#define PLAT_PHYS_OFFSET     UL(0x50000000)
-#endif
diff --git a/arch/arm/mach-s5p64x0/include/mach/debug-macro.S b/arch/arm/mach-s5p64x0/include/mach/debug-macro.S
index 79b04e6a6f8e..e80ba3c69814 100644
--- a/arch/arm/mach-s5p64x0/include/mach/debug-macro.S
+++ b/arch/arm/mach-s5p64x0/include/mach/debug-macro.S
@@ -15,7 +15,7 @@
 #include <plat/regs-serial.h>
-        .macro addruart, rp, rv
+        .macro addruart, rp, rv, tmp
                mov     \rp, #0xE0000000
                orr     \rp, \rp, #0x00100000
                ldr     \rp, [\rp, #0x118 ]
diff --git a/arch/arm/mach-s5p64x0/include/mach/gpio.h b/arch/arm/mach-s5p64x0/include/mach/gpio.h
index adb5f298ead8..06cd3c9b16ac 100644
--- a/arch/arm/mach-s5p64x0/include/mach/gpio.h
+++ b/arch/arm/mach-s5p64x0/include/mach/gpio.h
@@ -13,11 +13,6 @@
 #ifndef __ASM_ARCH_GPIO_H
 #define __ASM_ARCH_GPIO_H __FILE__
-#define gpio_get_value  __gpio_get_value
-#define gpio_set_value  __gpio_set_value
-#define gpio_cansleep   __gpio_cansleep
-#define gpio_to_irq     __gpio_to_irq
 /* GPIO bank sizes */
 #define S5P6440_GPIO_A_NR       (6)
@@ -134,6 +129,4 @@ enum s5p6450_gpio_number {
 #define ARCH_NR_GPIOS           (S5P64X0_GPIO_END + CONFIG_SAMSUNG_GPIO_EXTRA)
-#include <asm-generic/gpio.h>
 #endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-s5p64x0/include/mach/memory.h b/arch/arm/mach-s5p64x0/include/mach/memory.h
deleted file mode 100644
index b14cbc3f521b..000000000000
--- a/arch/arm/mach-s5p64x0/include/mach/memory.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/* linux/arch/arm/mach-s5p64x0/include/mach/memory.h
- *
- * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com
- *
- * S5P64X0 - Memory definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H __FILE__
-#define PLAT_PHYS_OFFSET                UL(0x20000000)
-#endif /* __ASM_ARCH_MEMORY_H */
diff --git a/arch/arm/mach-s5pc100/include/mach/debug-macro.S b/arch/arm/mach-s5pc100/include/mach/debug-macro.S
index b2ba95ddf8e0..694f75937000 100644
--- a/arch/arm/mach-s5pc100/include/mach/debug-macro.S
+++ b/arch/arm/mach-s5pc100/include/mach/debug-macro.S
@@ -22,7 +22,7 @@
         * aligned and add in the offset when we load the value here.
         */
-        .macro addruart, rp, rv
+        .macro addruart, rp, rv, tmp
                ldr     \rp, = S3C_PA_UART
                ldr     \rv, = S3C_VA_UART
 #if CONFIG_DEBUG_S3C_UART != 0
diff --git a/arch/arm/mach-s5pc100/include/mach/gpio.h b/arch/arm/mach-s5pc100/include/mach/gpio.h
index 29a8a12d9b4f..5e1a924b595f 100644
--- a/arch/arm/mach-s5pc100/include/mach/gpio.h
+++ b/arch/arm/mach-s5pc100/include/mach/gpio.h
@@ -15,11 +15,6 @@
 #ifndef __ASM_ARCH_GPIO_H
 #define __ASM_ARCH_GPIO_H __FILE__
-#define gpio_get_value  __gpio_get_value
-#define gpio_set_value  __gpio_set_value
-#define gpio_cansleep   __gpio_cansleep
-#define gpio_to_irq     __gpio_to_irq
 /* GPIO bank sizes */
 #define S5PC100_GPIO_A0_NR      (8)
 #define S5PC100_GPIO_A1_NR      (5)
@@ -146,6 +141,4 @@ enum s5p_gpio_number {
 /* define the number of gpios we need to the one after the MP04() range */
 #define ARCH_NR_GPIOS           (S5PC100_GPIO_END + 1)
-#include <asm-generic/gpio.h>
 #endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-s5pc100/include/mach/memory.h b/arch/arm/mach-s5pc100/include/mach/memory.h
deleted file mode 100644
index bda4e79fd5fc..000000000000
--- a/arch/arm/mach-s5pc100/include/mach/memory.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/* arch/arm/mach-s5pc100/include/mach/memory.h
- *
- * Copyright 2008 Samsung Electronics Co.
- *      Byungho Min <bhmin@samsung.com>
- *
- * Based on mach-s3c6400/include/mach/memory.h
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
-#define PLAT_PHYS_OFFSET        UL(0x20000000)
-#endif
diff --git a/arch/arm/mach-s5pv210/include/mach/debug-macro.S b/arch/arm/mach-s5pv210/include/mach/debug-macro.S
index 169fe654a59e..79e55597ab63 100644
--- a/arch/arm/mach-s5pv210/include/mach/debug-macro.S
+++ b/arch/arm/mach-s5pv210/include/mach/debug-macro.S
@@ -21,7 +21,7 @@
         * aligned and add in the offset when we load the value here.
         */
-        .macro addruart, rp, rv
+        .macro addruart, rp, rv, tmp
                ldr     \rp, = S3C_PA_UART
                ldr     \rv, = S3C_VA_UART
 #if CONFIG_DEBUG_S3C_UART != 0
diff --git a/arch/arm/mach-s5pv210/include/mach/gpio.h b/arch/arm/mach-s5pv210/include/mach/gpio.h
index a5a1e331f8ed..6c8b903c02e4 100644
--- a/arch/arm/mach-s5pv210/include/mach/gpio.h
+++ b/arch/arm/mach-s5pv210/include/mach/gpio.h
@@ -13,11 +13,6 @@
 #ifndef __ASM_ARCH_GPIO_H
 #define __ASM_ARCH_GPIO_H __FILE__
-#define gpio_get_value  __gpio_get_value
-#define gpio_set_value  __gpio_set_value
-#define gpio_cansleep   __gpio_cansleep
-#define gpio_to_irq     __gpio_to_irq
 /* Practically, GPIO banks up to MP03 are the configurable gpio banks */
 /* GPIO bank sizes */
@@ -142,6 +137,4 @@ enum s5p_gpio_number {
 #define ARCH_NR_GPIOS           (S5PV210_MP05(S5PV210_GPIO_MP05_NR) +   \
                                 CONFIG_SAMSUNG_GPIO_EXTRA + 1)
-#include <asm-generic/gpio.h>
 #endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-sa1100/Makefile b/arch/arm/mach-sa1100/Makefile
index 41252d22e659..73a5c6431792 100644
--- a/arch/arm/mach-sa1100/Makefile
+++ b/arch/arm/mach-sa1100/Makefile
@@ -3,7 +3,7 @@
 #
 # Common support
-obj-y := clock.o generic.o gpio.o irq.o dma.o time.o #nmi-oopser.o
+obj-y := clock.o generic.o irq.o dma.o time.o #nmi-oopser.o
 obj-m :=
 obj-n :=
 obj-  :=
diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c
index e21f3470eece..5fa5ae1f39e1 100644
--- a/arch/arm/mach-sa1100/generic.c
+++ b/arch/arm/mach-sa1100/generic.c
@@ -9,6 +9,7 @@
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
+#include <linux/gpio.h>
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
@@ -24,7 +25,6 @@
 #include <asm/mach/map.h>
 #include <asm/mach/flash.h>
 #include <asm/irq.h>
-#include <asm/gpio.h>
 #include "generic.h"
diff --git a/arch/arm/mach-sa1100/gpio.c b/arch/arm/mach-sa1100/gpio.c
deleted file mode 100644
index 0d3829a8c2c1..000000000000
--- a/arch/arm/mach-sa1100/gpio.c
+++ /dev/null
@@ -1,65 +0,0 @@
-/*
- * linux/arch/arm/mach-sa1100/gpio.c
- *
- * Generic SA-1100 GPIO handling
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/init.h>
-#include <linux/module.h>
-#include <asm/gpio.h>
-#include <mach/hardware.h>
-#include "generic.h"
-static int sa1100_gpio_get(struct gpio_chip *chip, unsigned offset)
-{
-        return GPLR & GPIO_GPIO(offset);
-}
-static void sa1100_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
-{
-        if (value)
-                GPSR = GPIO_GPIO(offset);
-        else
-                GPCR = GPIO_GPIO(offset);
-}
-static int sa1100_direction_input(struct gpio_chip *chip, unsigned offset)
-{
-        unsigned long flags;
-        local_irq_save(flags);
-        GPDR &= ~GPIO_GPIO(offset);
-        local_irq_restore(flags);
-        return 0;
-}
-static int sa1100_direction_output(struct gpio_chip *chip, unsigned offset, int value)
-{
-        unsigned long flags;
-        local_irq_save(flags);
-        sa1100_gpio_set(chip, offset, value);
-        GPDR |= GPIO_GPIO(offset);
-        local_irq_restore(flags);
-        return 0;
-}
-static struct gpio_chip sa1100_gpio_chip = {
-        .label                  = "gpio",
-        .direction_input        = sa1100_direction_input,
-        .direction_output       = sa1100_direction_output,
-        .set                    = sa1100_gpio_set,
-        .get                    = sa1100_gpio_get,
-        .base                   = 0,
-        .ngpio                  = GPIO_MAX + 1,
-};
-void __init sa1100_init_gpio(void)
-{
-        gpiochip_add(&sa1100_gpio_chip);
-}
diff --git a/arch/arm/mach-sa1100/include/mach/debug-macro.S b/arch/arm/mach-sa1100/include/mach/debug-macro.S
index 0cd0fc9635b6..530772d937ad 100644
--- a/arch/arm/mach-sa1100/include/mach/debug-macro.S
+++ b/arch/arm/mach-sa1100/include/mach/debug-macro.S
@@ -12,7 +12,7 @@
 */
 #include <mach/hardware.h>
-                .macro  addruart, rp, rv
+                .macro  addruart, rp, rv, tmp
                mrc     p15, 0, \rp, c1, c0
                tst     \rp, #1                 @ MMU enabled?
                moveq   \rp, #0x80000000        @ physical base address
diff --git a/arch/arm/mach-sa1100/include/mach/gpio.h b/arch/arm/mach-sa1100/include/mach/gpio.h
index 7befc104e9a9..703631887c94 100644
--- a/arch/arm/mach-sa1100/include/mach/gpio.h
+++ b/arch/arm/mach-sa1100/include/mach/gpio.h
@@ -28,6 +28,8 @@
 #include <asm/irq.h>
 #include <asm-generic/gpio.h>
+#define __ARM_GPIOLIB_COMPLEX
 static inline int gpio_get_value(unsigned gpio)
 {
        if (__builtin_constant_p(gpio) && (gpio <= GPIO_MAX))
@@ -51,7 +53,5 @@ static inline void gpio_set_value(unsigned gpio, int value)
 #define gpio_to_irq(gpio)       ((gpio < 11) ? (IRQ_GPIO0 + gpio) : \
                                        (IRQ_GPIO11 - 11 + gpio))
-#define irq_to_gpio(irq)        ((irq < IRQ_GPIO11_27) ? (irq - IRQ_GPIO0) : \
-                                        (irq - IRQ_GPIO11 + 11))
 #endif
diff --git a/arch/arm/mach-shark/include/mach/debug-macro.S b/arch/arm/mach-shark/include/mach/debug-macro.S
index a473f55dc71f..20eb2bf2a42b 100644
--- a/arch/arm/mach-shark/include/mach/debug-macro.S
+++ b/arch/arm/mach-shark/include/mach/debug-macro.S
@@ -11,7 +11,7 @@
 *
 */
-                .macro  addruart, rp, rv
+                .macro  addruart, rp, rv, tmp
                mov     \rp, #0xe0000000
                orr     \rp, \rp, #0x000003f8
                mov     \rv, \rp
diff --git a/arch/arm/mach-shmobile/include/mach/gpio.h b/arch/arm/mach-shmobile/include/mach/gpio.h
index 2b1bb9e43dda..7bf0890e16ba 100644
--- a/arch/arm/mach-shmobile/include/mach/gpio.h
+++ b/arch/arm/mach-shmobile/include/mach/gpio.h
@@ -18,31 +18,15 @@
 #ifdef CONFIG_GPIOLIB
-static inline int gpio_get_value(unsigned gpio)
-{
-        return __gpio_get_value(gpio);
-}
-static inline void gpio_set_value(unsigned gpio, int value)
-{
-        __gpio_set_value(gpio, value);
-}
-static inline int gpio_cansleep(unsigned gpio)
-{
-        return __gpio_cansleep(gpio);
-}
-static inline int gpio_to_irq(unsigned gpio)
-{
-        return __gpio_to_irq(gpio);
-}
 static inline int irq_to_gpio(unsigned int irq)
 {
        return -ENOSYS;
 }
+#else
+#define __ARM_GPIOLIB_COMPLEX
 #endif /* CONFIG_GPIOLIB */
 #endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-spear3xx/include/mach/memory.h b/arch/arm/mach-spear3xx/include/mach/memory.h
deleted file mode 100644
index 51735221ea19..000000000000
--- a/arch/arm/mach-spear3xx/include/mach/memory.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * arch/arm/mach-spear3xx/include/mach/memory.h
- *
- * Memory map for SPEAr3xx machine family
- *
- * Copyright (C) 2009 ST Microelectronics
- * Viresh Kumar<viresh.kumar@st.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-#ifndef __MACH_MEMORY_H
-#define __MACH_MEMORY_H
-#include <plat/memory.h>
-#endif /* __MACH_MEMORY_H */
diff --git a/arch/arm/mach-spear6xx/include/mach/memory.h b/arch/arm/mach-spear6xx/include/mach/memory.h
deleted file mode 100644
index 781f088fc228..000000000000
--- a/arch/arm/mach-spear6xx/include/mach/memory.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * arch/arm/mach-spear6xx/include/mach/memory.h
- *
- * Memory map for SPEAr6xx machine family
- *
- * Copyright (C) 2009 ST Microelectronics
- * Rajeev Kumar<rajeev-dlh.kumar@st.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-#ifndef __MACH_MEMORY_H
-#define __MACH_MEMORY_H
-#include <plat/memory.h>
-#endif  /* __MACH_MEMORY_H */
diff --git a/arch/arm/mach-tegra/board-harmony-pcie.c b/arch/arm/mach-tegra/board-harmony-pcie.c
index 9c27b95b8d86..6db7d699ef1c 100644
--- a/arch/arm/mach-tegra/board-harmony-pcie.c
+++ b/arch/arm/mach-tegra/board-harmony-pcie.c
@@ -24,12 +24,10 @@
 #include <mach/pinmux.h>
 #include "board.h"
+#include "board-harmony.h"
 #ifdef CONFIG_TEGRA_PCI
-/* GPIO 3 of the PMIC */
-#define EN_VDD_1V05_GPIO        (TEGRA_NR_GPIOS + 2)
 static int __init harmony_pcie_init(void)
 {
        struct regulator *regulator = NULL;
@@ -38,11 +36,11 @@ static int __init harmony_pcie_init(void)
        if (!machine_is_harmony())
                return 0;
-        err = gpio_request(EN_VDD_1V05_GPIO, "EN_VDD_1V05");
+        err = gpio_request(TEGRA_GPIO_EN_VDD_1V05_GPIO, "EN_VDD_1V05");
        if (err)
                return err;
-        gpio_direction_output(EN_VDD_1V05_GPIO, 1);
+        gpio_direction_output(TEGRA_GPIO_EN_VDD_1V05_GPIO, 1);
        regulator = regulator_get(NULL, "pex_clk");
        if (IS_ERR_OR_NULL(regulator))
@@ -68,7 +66,7 @@ err_pcie:
        regulator_disable(regulator);
        regulator_put(regulator);
 err_reg:
-        gpio_free(EN_VDD_1V05_GPIO);
+        gpio_free(TEGRA_GPIO_EN_VDD_1V05_GPIO);
        return err;
 }
diff --git a/arch/arm/mach-tegra/board-harmony.h b/arch/arm/mach-tegra/board-harmony.h
index d85142edaf6b..139d96c93843 100644
--- a/arch/arm/mach-tegra/board-harmony.h
+++ b/arch/arm/mach-tegra/board-harmony.h
@@ -17,6 +17,8 @@
 #ifndef _MACH_TEGRA_BOARD_HARMONY_H
 #define _MACH_TEGRA_BOARD_HARMONY_H
+#include <mach/gpio-tegra.h>
 #define HARMONY_GPIO_TPS6586X(_x_)      (TEGRA_NR_GPIOS + (_x_))
 #define HARMONY_GPIO_WM8903(_x_)        (HARMONY_GPIO_TPS6586X(4) + (_x_))
@@ -31,6 +33,7 @@
 #define TEGRA_GPIO_HP_DET               TEGRA_GPIO_PW2
 #define TEGRA_GPIO_INT_MIC_EN           TEGRA_GPIO_PX0
 #define TEGRA_GPIO_EXT_MIC_EN           TEGRA_GPIO_PX1
+#define TEGRA_GPIO_EN_VDD_1V05_GPIO     HARMONY_GPIO_TPS6586X(2)
 void harmony_pinmux_init(void);
 int harmony_regulator_init(void);
diff --git a/arch/arm/mach-tegra/board-paz00.h b/arch/arm/mach-tegra/board-paz00.h
index d4ff39ddaeb3..42ce8639b90c 100644
--- a/arch/arm/mach-tegra/board-paz00.h
+++ b/arch/arm/mach-tegra/board-paz00.h
@@ -17,6 +17,8 @@
 #ifndef _MACH_TEGRA_BOARD_PAZ00_H
 #define _MACH_TEGRA_BOARD_PAZ00_H
+#include <mach/gpio-tegra.h>
 #define TEGRA_GPIO_SD1_CD               TEGRA_GPIO_PV5
 #define TEGRA_GPIO_SD1_WP               TEGRA_GPIO_PH1
 #define TEGRA_GPIO_SD1_POWER            TEGRA_GPIO_PT3
diff --git a/arch/arm/mach-tegra/board-seaboard.h b/arch/arm/mach-tegra/board-seaboard.h
index d8415e1a8434..15b6c57361be 100644
--- a/arch/arm/mach-tegra/board-seaboard.h
+++ b/arch/arm/mach-tegra/board-seaboard.h
@@ -17,6 +17,8 @@
 #ifndef _MACH_TEGRA_BOARD_SEABOARD_H
 #define _MACH_TEGRA_BOARD_SEABOARD_H
+#include <mach/gpio-tegra.h>
 #define TEGRA_GPIO_SD2_CD               TEGRA_GPIO_PI5
 #define TEGRA_GPIO_SD2_WP               TEGRA_GPIO_PH1
 #define TEGRA_GPIO_SD2_POWER            TEGRA_GPIO_PI6
diff --git a/arch/arm/mach-tegra/board-trimslice-pinmux.c b/arch/arm/mach-tegra/board-trimslice-pinmux.c
index 47c596cdbf32..bcb1916e68b9 100644
--- a/arch/arm/mach-tegra/board-trimslice-pinmux.c
+++ b/arch/arm/mach-tegra/board-trimslice-pinmux.c
@@ -13,12 +13,11 @@
 * GNU General Public License for more details.
 *
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <mach/pinmux.h>
-#include <mach/gpio.h>
 #include "gpio-names.h"
 #include "board-trimslice.h"
diff --git a/arch/arm/mach-tegra/board-trimslice.h b/arch/arm/mach-tegra/board-trimslice.h
index 7a7dee86b4da..50f128d87779 100644
--- a/arch/arm/mach-tegra/board-trimslice.h
+++ b/arch/arm/mach-tegra/board-trimslice.h
@@ -17,6 +17,8 @@
 #ifndef _MACH_TEGRA_BOARD_TRIMSLICE_H
 #define _MACH_TEGRA_BOARD_TRIMSLICE_H
+#include <mach/gpio-tegra.h>
 #define TRIMSLICE_GPIO_SD4_CD   TEGRA_GPIO_PP1  /* mmc4 cd */
 #define TRIMSLICE_GPIO_SD4_WP   TEGRA_GPIO_PP2  /* mmc4 wp */
diff --git a/arch/arm/mach-tegra/include/mach/debug-macro.S b/arch/arm/mach-tegra/include/mach/debug-macro.S
index e0ebe65c1657..619abc63aee8 100644
--- a/arch/arm/mach-tegra/include/mach/debug-macro.S
+++ b/arch/arm/mach-tegra/include/mach/debug-macro.S
@@ -21,7 +21,7 @@
 #include <mach/io.h>
 #include <mach/iomap.h>
-        .macro  addruart, rp, rv
+        .macro  addruart, rp, rv, tmp
        ldr     \rp, =IO_APB_PHYS       @ physical
        ldr     \rv, =IO_APB_VIRT        @ virtual
        orr     \rp, \rp, #(TEGRA_DEBUG_UART_BASE & 0xFF)
diff --git a/arch/arm/mach-tegra/include/mach/memory.h b/arch/arm/mach-tegra/include/mach/gpio-tegra.h
index 537db3aa81a7..87d37fdf5084 100644
--- a/arch/arm/mach-tegra/include/mach/memory.h
+++ b/arch/arm/mach-tegra/include/mach/gpio-tegra.h
@@ -1,10 +1,9 @@
 /*
- * arch/arm/mach-tegra/include/mach/memory.h
+ * arch/arm/mach-tegra/include/mach/gpio.h
 *
 * Copyright (C) 2010 Google, Inc.
 *
 * Author:
- *      Colin Cross <ccross@google.com>
 *      Erik Gilling <konkers@google.com>
 *
 * This software is licensed under the terms of the GNU General Public
@@ -18,11 +17,23 @@
 *
 */
-#ifndef __MACH_TEGRA_MEMORY_H
+#ifndef __MACH_TEGRA_GPIO_TEGRA_H
-#define __MACH_TEGRA_MEMORY_H
+#define __MACH_TEGRA_GPIO_TEGRA_H
-/* physical offset of RAM */
+#include <linux/types.h>
-#define PLAT_PHYS_OFFSET                UL(0)
+#include <mach/irqs.h>
-#endif
+#define TEGRA_NR_GPIOS          INT_GPIO_NR
+#define TEGRA_GPIO_TO_IRQ(gpio) (INT_GPIO_BASE + (gpio))
+struct tegra_gpio_table {
+        int     gpio;   /* GPIO number */
+        bool    enable; /* Enable for GPIO at init? */
+};
+void tegra_gpio_config(struct tegra_gpio_table *table, int num);
+void tegra_gpio_enable(int gpio);
+void tegra_gpio_disable(int gpio);
+#endif
diff --git a/arch/arm/mach-tegra/include/mach/gpio.h b/arch/arm/mach-tegra/include/mach/gpio.h
index 196f114dc241..e69de29bb2d1 100644
--- a/arch/arm/mach-tegra/include/mach/gpio.h
+++ b/arch/arm/mach-tegra/include/mach/gpio.h
@@ -1,60 +0,0 @@
-/*
- * arch/arm/mach-tegra/include/mach/gpio.h
- *
- * Copyright (C) 2010 Google, Inc.
- *
- * Author:
- *      Erik Gilling <konkers@google.com>
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-#ifndef __MACH_TEGRA_GPIO_H
-#define __MACH_TEGRA_GPIO_H
-#include <linux/init.h>
-#include <mach/irqs.h>
-#define TEGRA_NR_GPIOS          INT_GPIO_NR
-#include <asm-generic/gpio.h>
-#define gpio_get_value          __gpio_get_value
-#define gpio_set_value          __gpio_set_value
-#define gpio_cansleep           __gpio_cansleep
-#define TEGRA_GPIO_TO_IRQ(gpio) (INT_GPIO_BASE + (gpio))
-#define TEGRA_IRQ_TO_GPIO(irq) ((irq) - INT_GPIO_BASE)
-static inline int gpio_to_irq(unsigned int gpio)
-{
-        if (gpio < TEGRA_NR_GPIOS)
-                return INT_GPIO_BASE + gpio;
-        return -EINVAL;
-}
-static inline int irq_to_gpio(unsigned int irq)
-{
-        if ((irq >= INT_GPIO_BASE) && (irq < INT_GPIO_BASE + INT_GPIO_NR))
-                return irq - INT_GPIO_BASE;
-        return -EINVAL;
-}
-struct tegra_gpio_table {
-        int     gpio;   /* GPIO number */
-        bool    enable; /* Enable for GPIO at init? */
-};
-void tegra_gpio_config(struct tegra_gpio_table *table, int num);
-void tegra_gpio_enable(int gpio);
-void tegra_gpio_disable(int gpio);
-#endif
diff --git a/arch/arm/mach-tegra/usb_phy.c b/arch/arm/mach-tegra/usb_phy.c
index 88081bb3ec52..37576a721aeb 100644
--- a/arch/arm/mach-tegra/usb_phy.c
+++ b/arch/arm/mach-tegra/usb_phy.c
@@ -28,6 +28,7 @@
 #include <linux/usb/otg.h>
 #include <linux/usb/ulpi.h>
 #include <asm/mach-types.h>
+#include <mach/gpio-tegra.h>
 #include <mach/usb_phy.h>
 #include <mach/iomap.h>
diff --git a/arch/arm/mach-u300/Kconfig b/arch/arm/mach-u300/Kconfig
index 966a5a06a58c..39e077e2f243 100644
--- a/arch/arm/mach-u300/Kconfig
+++ b/arch/arm/mach-u300/Kconfig
@@ -6,6 +6,7 @@ comment "ST-Ericsson Mobile Platform Products"
 config MACH_U300
        bool "U300"
+        select GPIO_U300
 comment "ST-Ericsson U300/U330/U335/U365 Feature Selections"
diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c
index 724037e2de3d..2f1d758133a7 100644
--- a/arch/arm/mach-u300/core.c
+++ b/arch/arm/mach-u300/core.c
@@ -38,6 +38,7 @@
 #include <mach/hardware.h>
 #include <mach/syscon.h>
 #include <mach/dma_channels.h>
+#include <mach/gpio-u300.h>
 #include "clock.h"
 #include "mmc.h"
@@ -223,7 +224,7 @@ static struct resource gpio_resources[] = {
                .end   = IRQ_U300_GPIO_PORT2,
                .flags = IORESOURCE_IRQ,
        },
-#ifdef U300_COH901571_3
+#if defined(CONFIG_MACH_U300_BS365) || defined(CONFIG_MACH_U300_BS335)
        {
                .name  = "gpio3",
                .start = IRQ_U300_GPIO_PORT3,
@@ -236,6 +237,7 @@ static struct resource gpio_resources[] = {
                .end   = IRQ_U300_GPIO_PORT4,
                .flags = IORESOURCE_IRQ,
        },
+#endif
 #ifdef CONFIG_MACH_U300_BS335
        {
                .name  = "gpio5",
@@ -250,7 +252,6 @@ static struct resource gpio_resources[] = {
                .flags = IORESOURCE_IRQ,
        },
 #endif /* CONFIG_MACH_U300_BS335 */
-#endif /* U300_COH901571_3 */
 };
 static struct resource keypad_resources[] = {
@@ -1495,11 +1496,35 @@ static struct platform_device i2c1_device = {
        .resource = i2c1_resources,
 };
+/*
+ * The different variants have a few different versions of the
+ * GPIO block, with different number of ports.
+ */
+static struct u300_gpio_platform u300_gpio_plat = {
+#if defined(CONFIG_MACH_U300_BS2X) || defined(CONFIG_MACH_U300_BS330)
+        .variant = U300_GPIO_COH901335,
+        .ports = 3,
+#endif
+#ifdef CONFIG_MACH_U300_BS335
+        .variant = U300_GPIO_COH901571_3_BS335,
+        .ports = 7,
+#endif
+#ifdef CONFIG_MACH_U300_BS365
+        .variant = U300_GPIO_COH901571_3_BS365,
+        .ports = 5,
+#endif
+        .gpio_base = 0,
+        .gpio_irq_base = IRQ_U300_GPIO_BASE,
+};
 static struct platform_device gpio_device = {
        .name = "u300-gpio",
        .id = -1,
        .num_resources = ARRAY_SIZE(gpio_resources),
        .resource = gpio_resources,
+        .dev = {
+                .platform_data = &u300_gpio_plat,
+        },
 };
 static struct platform_device keypad_device = {
@@ -1596,7 +1621,7 @@ void __init u300_init_irq(void)
        BUG_ON(IS_ERR(clk));
        clk_enable(clk);
-        for (i = 0; i < NR_IRQS; i++)
+        for (i = 0; i < U300_VIC_IRQS_END; i++)
                set_bit(i, (unsigned long *) &mask[0]);
        vic_init((void __iomem *) U300_INTCON0_VBASE, 0, mask[0], mask[0]);
        vic_init((void __iomem *) U300_INTCON1_VBASE, 32, mask[1], mask[1]);
diff --git a/arch/arm/mach-u300/include/mach/debug-macro.S b/arch/arm/mach-u300/include/mach/debug-macro.S
index df715707bead..8ae8e4ab34b0 100644
--- a/arch/arm/mach-u300/include/mach/debug-macro.S
+++ b/arch/arm/mach-u300/include/mach/debug-macro.S
@@ -10,7 +10,7 @@
 */
 #include <mach/hardware.h>
-        .macro  addruart, rp, rv
+        .macro  addruart, rp, rv, tmp
        /* If we move the address using MMU, use this. */
        ldr     \rp,      = U300_SLOW_PER_PHYS_BASE @ MMU off, physical address
        ldr     \rv,      = U300_SLOW_PER_VIRT_BASE @ MMU on, virtual address
diff --git a/arch/arm/mach-u300/include/mach/gpio-u300.h b/arch/arm/mach-u300/include/mach/gpio-u300.h
new file mode 100644
index 000000000000..0c2b2021951a
--- /dev/null
+++ b/arch/arm/mach-u300/include/mach/gpio-u300.h
@@ -0,0 +1,150 @@
+/*
+ * Copyright (C) 2007-2011 ST-Ericsson AB
+ * License terms: GNU General Public License (GPL) version 2
+ * GPIO block resgister definitions and inline macros for
+ * U300 GPIO COH 901 335 or COH 901 571/3
+ * Author: Linus Walleij <linus.walleij@stericsson.com>
+ */
+#ifndef __MACH_U300_GPIO_U300_H
+#define __MACH_U300_GPIO_U300_H
+/*
+ * Individual pin assignments for the B26/S26. Notice that the
+ * actual usage of these pins depends on the PAD MUX settings, that
+ * is why the same number can potentially appear several times.
+ * In the reference design each pin is only used for one purpose.
+ * These were determined by inspecting the B26/S26 schematic:
+ * 2/1911-ROA 128 1603
+ */
+#ifdef CONFIG_MACH_U300_BS2X
+#define U300_GPIO_PIN_UART_RX           0
+#define U300_GPIO_PIN_UART_TX           1
+#define U300_GPIO_PIN_GPIO02            2  /* Unrouted */
+#define U300_GPIO_PIN_GPIO03            3  /* Unrouted */
+#define U300_GPIO_PIN_CAM_SLEEP         4
+#define U300_GPIO_PIN_CAM_REG_EN        5
+#define U300_GPIO_PIN_GPIO06            6  /* Unrouted */
+#define U300_GPIO_PIN_GPIO07            7  /* Unrouted */
+#define U300_GPIO_PIN_GPIO08            8  /* Service point SP2321 */
+#define U300_GPIO_PIN_GPIO09            9  /* Service point SP2322 */
+#define U300_GPIO_PIN_PHFSENSE          10 /* Headphone jack sensing */
+#define U300_GPIO_PIN_MMC_CLKRET        11 /* Clock return from MMC/SD card */
+#define U300_GPIO_PIN_MMC_CD            12 /* MMC Card insertion detection */
+#define U300_GPIO_PIN_FLIPSENSE         13 /* Mechanical flip sensing */
+#define U300_GPIO_PIN_GPIO14            14 /* DSP JTAG Port RTCK */
+#define U300_GPIO_PIN_GPIO15            15 /* Unrouted */
+#define U300_GPIO_PIN_GPIO16            16 /* Unrouted */
+#define U300_GPIO_PIN_GPIO17            17 /* Unrouted */
+#define U300_GPIO_PIN_GPIO18            18 /* Unrouted */
+#define U300_GPIO_PIN_GPIO19            19 /* Unrouted */
+#define U300_GPIO_PIN_GPIO20            20 /* Unrouted */
+#define U300_GPIO_PIN_GPIO21            21 /* Unrouted */
+#define U300_GPIO_PIN_GPIO22            22 /* Unrouted */
+#define U300_GPIO_PIN_GPIO23            23 /* Unrouted */
+#endif
+/*
+ * Individual pin assignments for the B330/S330 and B365/S365.
+ * Notice that the actual usage of these pins depends on the
+ * PAD MUX settings, that is why the same number can potentially
+ * appear several times. In the reference design each pin is only
+ * used for one purpose. These were determined by inspecting the
+ * S365 schematic.
+ */
+#if defined(CONFIG_MACH_U300_BS330) || defined(CONFIG_MACH_U300_BS365) || \
+    defined(CONFIG_MACH_U300_BS335)
+#define U300_GPIO_PIN_UART_RX           0
+#define U300_GPIO_PIN_UART_TX           1
+#define U300_GPIO_PIN_UART_CTS          2
+#define U300_GPIO_PIN_UART_RTS          3
+#define U300_GPIO_PIN_CAM_MAIN_STANDBY  4 /* Camera MAIN standby */
+#define U300_GPIO_PIN_GPIO05            5 /* Unrouted */
+#define U300_GPIO_PIN_MS_CD             6 /* Memory Stick Card insertion */
+#define U300_GPIO_PIN_GPIO07            7 /* Test point TP2430 */
+#define U300_GPIO_PIN_GPIO08            8 /* Test point TP2437 */
+#define U300_GPIO_PIN_GPIO09            9 /* Test point TP2431 */
+#define U300_GPIO_PIN_GPIO10            10 /* Test point TP2432 */
+#define U300_GPIO_PIN_MMC_CLKRET        11 /* Clock return from MMC/SD card */
+#define U300_GPIO_PIN_MMC_CD            12 /* MMC Card insertion detection */
+#define U300_GPIO_PIN_CAM_SUB_STANDBY   13 /* Camera SUB standby */
+#define U300_GPIO_PIN_GPIO14            14 /* Test point TP2436 */
+#define U300_GPIO_PIN_GPIO15            15 /* Unrouted */
+#define U300_GPIO_PIN_GPIO16            16 /* Test point TP2438 */
+#define U300_GPIO_PIN_PHFSENSE          17 /* Headphone jack sensing */
+#define U300_GPIO_PIN_GPIO18            18 /* Test point TP2439 */
+#define U300_GPIO_PIN_GPIO19            19 /* Routed somewhere */
+#define U300_GPIO_PIN_GPIO20            20 /* Unrouted */
+#define U300_GPIO_PIN_GPIO21            21 /* Unrouted */
+#define U300_GPIO_PIN_GPIO22            22 /* Unrouted */
+#define U300_GPIO_PIN_GPIO23            23 /* Unrouted */
+#define U300_GPIO_PIN_GPIO24            24 /* Unrouted */
+#define U300_GPIO_PIN_GPIO25            25 /* Unrouted */
+#define U300_GPIO_PIN_GPIO26            26 /* Unrouted */
+#define U300_GPIO_PIN_GPIO27            27 /* Unrouted */
+#define U300_GPIO_PIN_GPIO28            28 /* Unrouted */
+#define U300_GPIO_PIN_GPIO29            29 /* Unrouted */
+#define U300_GPIO_PIN_GPIO30            30 /* Unrouted */
+#define U300_GPIO_PIN_GPIO31            31 /* Unrouted */
+#define U300_GPIO_PIN_GPIO32            32 /* Unrouted */
+#define U300_GPIO_PIN_GPIO33            33 /* Unrouted */
+#define U300_GPIO_PIN_GPIO34            34 /* Unrouted */
+#define U300_GPIO_PIN_GPIO35            35 /* Unrouted */
+#define U300_GPIO_PIN_GPIO36            36 /* Unrouted */
+#define U300_GPIO_PIN_GPIO37            37 /* Unrouted */
+#define U300_GPIO_PIN_GPIO38            38 /* Unrouted */
+#define U300_GPIO_PIN_GPIO39            39 /* Unrouted */
+#ifdef CONFIG_MACH_U300_BS335
+#define U300_GPIO_PIN_GPIO40            40 /* Unrouted */
+#define U300_GPIO_PIN_GPIO41            41 /* Unrouted */
+#define U300_GPIO_PIN_GPIO42            42 /* Unrouted */
+#define U300_GPIO_PIN_GPIO43            43 /* Unrouted */
+#define U300_GPIO_PIN_GPIO44            44 /* Unrouted */
+#define U300_GPIO_PIN_GPIO45            45 /* Unrouted */
+#define U300_GPIO_PIN_GPIO46            46 /* Unrouted */
+#define U300_GPIO_PIN_GPIO47            47 /* Unrouted */
+#define U300_GPIO_PIN_GPIO48            48 /* Unrouted */
+#define U300_GPIO_PIN_GPIO49            49 /* Unrouted */
+#define U300_GPIO_PIN_GPIO50            50 /* Unrouted */
+#define U300_GPIO_PIN_GPIO51            51 /* Unrouted */
+#define U300_GPIO_PIN_GPIO52            52 /* Unrouted */
+#define U300_GPIO_PIN_GPIO53            53 /* Unrouted */
+#define U300_GPIO_PIN_GPIO54            54 /* Unrouted */
+#define U300_GPIO_PIN_GPIO55            55 /* Unrouted */
+#endif
+#endif
+/**
+ * enum u300_gpio_variant - the type of U300 GPIO employed
+ */
+enum u300_gpio_variant {
+        U300_GPIO_COH901335,
+        U300_GPIO_COH901571_3_BS335,
+        U300_GPIO_COH901571_3_BS365,
+};
+/**
+ * struct u300_gpio_platform - U300 GPIO platform data
+ * @variant: IP block variant
+ * @ports: number of GPIO block ports
+ * @gpio_base: first GPIO number for this block (use a free range)
+ * @gpio_irq_base: first GPIO IRQ number for this block (use a free range)
+ */
+struct u300_gpio_platform {
+        enum u300_gpio_variant variant;
+        u8 ports;
+        int gpio_base;
+        int gpio_irq_base;
+};
+#endif /* __MACH_U300_GPIO_U300_H */
diff --git a/arch/arm/mach-u300/include/mach/gpio.h b/arch/arm/mach-u300/include/mach/gpio.h
index d5a71abcbaea..e69de29bb2d1 100644
--- a/arch/arm/mach-u300/include/mach/gpio.h
+++ b/arch/arm/mach-u300/include/mach/gpio.h
@@ -1,294 +0,0 @@
-/*
- *
- * arch/arm/mach-u300/include/mach/gpio.h
- *
- *
- * Copyright (C) 2007-2009 ST-Ericsson AB
- * License terms: GNU General Public License (GPL) version 2
- * GPIO block resgister definitions and inline macros for
- * U300 GPIO COH 901 335 or COH 901 571/3
- * Author: Linus Walleij <linus.walleij@stericsson.com>
- */
-#ifndef __MACH_U300_GPIO_H
-#define __MACH_U300_GPIO_H
-#include <linux/kernel.h>
-#include <linux/io.h>
-#include <mach/hardware.h>
-#include <asm/irq.h>
-/* Switch type depending on platform/chip variant */
-#if defined(CONFIG_MACH_U300_BS2X) || defined(CONFIG_MACH_U300_BS330)
-#define U300_COH901335
-#endif
-#if defined(CONFIG_MACH_U300_BS365) || defined(CONFIG_MACH_U300_BS335)
-#define U300_COH901571_3
-#endif
-/* Get base address for regs here */
-#include "u300-regs.h"
-/* IRQ numbers */
-#include "irqs.h"
-/*
- * This is the GPIO block definitions. GPIO (General Purpose I/O) can be
- * used for anything, and often is. The event/enable etc figures are for
- * the lowermost pin (pin 0 on each port), shift this left to match your
- * pin if you're gonna use these values.
- */
-#ifdef U300_COH901335
-#define U300_GPIO_PORTX_SPACING                         (0x1C)
-/* Port X Pin Data Register 32bit, this is both input and output (R/W) */
-#define U300_GPIO_PXPDIR                                (0x00)
-#define U300_GPIO_PXPDOR                                (0x00)
-/* Port X Pin Config Register 32bit (R/W) */
-#define U300_GPIO_PXPCR                                 (0x04)
-#define U300_GPIO_PXPCR_ALL_PINS_MODE_MASK              (0x0000FFFFUL)
-#define U300_GPIO_PXPCR_PIN_MODE_MASK                   (0x00000003UL)
-#define U300_GPIO_PXPCR_PIN_MODE_SHIFT                  (0x00000002UL)
-#define U300_GPIO_PXPCR_PIN_MODE_INPUT                  (0x00000000UL)
-#define U300_GPIO_PXPCR_PIN_MODE_OUTPUT_PUSH_PULL       (0x00000001UL)
-#define U300_GPIO_PXPCR_PIN_MODE_OUTPUT_OPEN_DRAIN      (0x00000002UL)
-#define U300_GPIO_PXPCR_PIN_MODE_OUTPUT_OPEN_SOURCE     (0x00000003UL)
-/* Port X Interrupt Event Register 32bit (R/W) */
-#define U300_GPIO_PXIEV                                 (0x08)
-#define U300_GPIO_PXIEV_ALL_IRQ_EVENT_MASK              (0x000000FFUL)
-#define U300_GPIO_PXIEV_IRQ_EVENT                       (0x00000001UL)
-/* Port X Interrupt Enable Register 32bit (R/W) */
-#define U300_GPIO_PXIEN                                 (0x0C)
-#define U300_GPIO_PXIEN_ALL_IRQ_ENABLE_MASK             (0x000000FFUL)
-#define U300_GPIO_PXIEN_IRQ_ENABLE                      (0x00000001UL)
-/* Port X Interrupt Force Register 32bit (R/W) */
-#define U300_GPIO_PXIFR                                 (0x10)
-#define U300_GPIO_PXIFR_ALL_IRQ_FORCE_MASK              (0x000000FFUL)
-#define U300_GPIO_PXIFR_IRQ_FORCE                       (0x00000001UL)
-/* Port X Interrupt Config Register 32bit (R/W) */
-#define U300_GPIO_PXICR                                 (0x14)
-#define U300_GPIO_PXICR_ALL_IRQ_CONFIG_MASK             (0x000000FFUL)
-#define U300_GPIO_PXICR_IRQ_CONFIG_MASK                 (0x00000001UL)
-#define U300_GPIO_PXICR_IRQ_CONFIG_FALLING_EDGE         (0x00000000UL)
-#define U300_GPIO_PXICR_IRQ_CONFIG_RISING_EDGE          (0x00000001UL)
-/* Port X Pull-up Enable Register 32bit (R/W) */
-#define U300_GPIO_PXPER                                 (0x18)
-#define U300_GPIO_PXPER_ALL_PULL_UP_DISABLE_MASK        (0x000000FFUL)
-#define U300_GPIO_PXPER_PULL_UP_DISABLE                 (0x00000001UL)
-/* Control Register 32bit (R/W) */
-#define U300_GPIO_CR                                    (0x54)
-#define U300_GPIO_CR_BLOCK_CLOCK_ENABLE                 (0x00000001UL)
-/* three ports of 8 bits each = GPIO pins 0..23 */
-#define U300_GPIO_NUM_PORTS 3
-#define U300_GPIO_PINS_PER_PORT 8
-#define U300_GPIO_MAX   (U300_GPIO_PINS_PER_PORT * U300_GPIO_NUM_PORTS - 1)
-#endif
-#ifdef U300_COH901571_3
-/*
- * Control Register 32bit (R/W)
- * bit 15-9 (mask 0x0000FE00) contains the number of cores. 8*cores
- * gives the number of GPIO pins.
- * bit 8-2  (mask 0x000001FC) contains the core version ID.
- */
-#define U300_GPIO_CR                                    (0x00)
-#define U300_GPIO_CR_SYNC_SEL_ENABLE                    (0x00000002UL)
-#define U300_GPIO_CR_BLOCK_CLKRQ_ENABLE                 (0x00000001UL)
-#define U300_GPIO_PORTX_SPACING                         (0x30)
-/* Port X Pin Data INPUT Register 32bit (R/W) */
-#define U300_GPIO_PXPDIR                                (0x04)
-/* Port X Pin Data OUTPUT Register 32bit (R/W) */
-#define U300_GPIO_PXPDOR                                (0x08)
-/* Port X Pin Config Register 32bit (R/W) */
-#define U300_GPIO_PXPCR                                 (0x0C)
-#define U300_GPIO_PXPCR_ALL_PINS_MODE_MASK              (0x0000FFFFUL)
-#define U300_GPIO_PXPCR_PIN_MODE_MASK                   (0x00000003UL)
-#define U300_GPIO_PXPCR_PIN_MODE_SHIFT                  (0x00000002UL)
-#define U300_GPIO_PXPCR_PIN_MODE_INPUT                  (0x00000000UL)
-#define U300_GPIO_PXPCR_PIN_MODE_OUTPUT_PUSH_PULL       (0x00000001UL)
-#define U300_GPIO_PXPCR_PIN_MODE_OUTPUT_OPEN_DRAIN      (0x00000002UL)
-#define U300_GPIO_PXPCR_PIN_MODE_OUTPUT_OPEN_SOURCE     (0x00000003UL)
-/* Port X Pull-up Enable Register 32bit (R/W) */
-#define U300_GPIO_PXPER                                 (0x10)
-#define U300_GPIO_PXPER_ALL_PULL_UP_DISABLE_MASK        (0x000000FFUL)
-#define U300_GPIO_PXPER_PULL_UP_DISABLE                 (0x00000001UL)
-/* Port X Interrupt Event Register 32bit (R/W) */
-#define U300_GPIO_PXIEV                                 (0x14)
-#define U300_GPIO_PXIEV_ALL_IRQ_EVENT_MASK              (0x000000FFUL)
-#define U300_GPIO_PXIEV_IRQ_EVENT                       (0x00000001UL)
-/* Port X Interrupt Enable Register 32bit (R/W) */
-#define U300_GPIO_PXIEN                                 (0x18)
-#define U300_GPIO_PXIEN_ALL_IRQ_ENABLE_MASK             (0x000000FFUL)
-#define U300_GPIO_PXIEN_IRQ_ENABLE                      (0x00000001UL)
-/* Port X Interrupt Force Register 32bit (R/W) */
-#define U300_GPIO_PXIFR                                 (0x1C)
-#define U300_GPIO_PXIFR_ALL_IRQ_FORCE_MASK              (0x000000FFUL)
-#define U300_GPIO_PXIFR_IRQ_FORCE                       (0x00000001UL)
-/* Port X Interrupt Config Register 32bit (R/W) */
-#define U300_GPIO_PXICR                                 (0x20)
-#define U300_GPIO_PXICR_ALL_IRQ_CONFIG_MASK             (0x000000FFUL)
-#define U300_GPIO_PXICR_IRQ_CONFIG_MASK                 (0x00000001UL)
-#define U300_GPIO_PXICR_IRQ_CONFIG_FALLING_EDGE         (0x00000000UL)
-#define U300_GPIO_PXICR_IRQ_CONFIG_RISING_EDGE          (0x00000001UL)
-#ifdef CONFIG_MACH_U300_BS335
-/* seven ports of 8 bits each = GPIO pins 0..55 */
-#define U300_GPIO_NUM_PORTS 7
-#else
-/* five ports of 8 bits each = GPIO pins 0..39 */
-#define U300_GPIO_NUM_PORTS 5
-#endif
-#define U300_GPIO_PINS_PER_PORT 8
-#define U300_GPIO_MAX (U300_GPIO_PINS_PER_PORT * U300_GPIO_NUM_PORTS - 1)
-#endif
-/*
- * Individual pin assignments for the B26/S26. Notice that the
- * actual usage of these pins depends on the PAD MUX settings, that
- * is why the same number can potentially appear several times.
- * In the reference design each pin is only used for one purpose.
- * These were determined by inspecting the B26/S26 schematic:
- * 2/1911-ROA 128 1603
- */
-#ifdef CONFIG_MACH_U300_BS2X
-#define U300_GPIO_PIN_UART_RX           0
-#define U300_GPIO_PIN_UART_TX           1
-#define U300_GPIO_PIN_GPIO02            2  /* Unrouted */
-#define U300_GPIO_PIN_GPIO03            3  /* Unrouted */
-#define U300_GPIO_PIN_CAM_SLEEP         4
-#define U300_GPIO_PIN_CAM_REG_EN        5
-#define U300_GPIO_PIN_GPIO06            6  /* Unrouted */
-#define U300_GPIO_PIN_GPIO07            7  /* Unrouted */
-#define U300_GPIO_PIN_GPIO08            8  /* Service point SP2321 */
-#define U300_GPIO_PIN_GPIO09            9  /* Service point SP2322 */
-#define U300_GPIO_PIN_PHFSENSE          10 /* Headphone jack sensing */
-#define U300_GPIO_PIN_MMC_CLKRET        11 /* Clock return from MMC/SD card */
-#define U300_GPIO_PIN_MMC_CD            12 /* MMC Card insertion detection */
-#define U300_GPIO_PIN_FLIPSENSE         13 /* Mechanical flip sensing */
-#define U300_GPIO_PIN_GPIO14            14 /* DSP JTAG Port RTCK */
-#define U300_GPIO_PIN_GPIO15            15 /* Unrouted */
-#define U300_GPIO_PIN_GPIO16            16 /* Unrouted */
-#define U300_GPIO_PIN_GPIO17            17 /* Unrouted */
-#define U300_GPIO_PIN_GPIO18            18 /* Unrouted */
-#define U300_GPIO_PIN_GPIO19            19 /* Unrouted */
-#define U300_GPIO_PIN_GPIO20            20 /* Unrouted */
-#define U300_GPIO_PIN_GPIO21            21 /* Unrouted */
-#define U300_GPIO_PIN_GPIO22            22 /* Unrouted */
-#define U300_GPIO_PIN_GPIO23            23 /* Unrouted */
-#endif
-/*
- * Individual pin assignments for the B330/S330 and B365/S365.
- * Notice that the actual usage of these pins depends on the
- * PAD MUX settings, that is why the same number can potentially
- * appear several times. In the reference design each pin is only
- * used for one purpose. These were determined by inspecting the
- * S365 schematic.
- */
-#if defined(CONFIG_MACH_U300_BS330) || defined(CONFIG_MACH_U300_BS365) || \
-    defined(CONFIG_MACH_U300_BS335)
-#define U300_GPIO_PIN_UART_RX           0
-#define U300_GPIO_PIN_UART_TX           1
-#define U300_GPIO_PIN_UART_CTS          2
-#define U300_GPIO_PIN_UART_RTS          3
-#define U300_GPIO_PIN_CAM_MAIN_STANDBY  4 /* Camera MAIN standby */
-#define U300_GPIO_PIN_GPIO05            5 /* Unrouted */
-#define U300_GPIO_PIN_MS_CD             6 /* Memory Stick Card insertion */
-#define U300_GPIO_PIN_GPIO07            7 /* Test point TP2430 */
-#define U300_GPIO_PIN_GPIO08            8 /* Test point TP2437 */
-#define U300_GPIO_PIN_GPIO09            9 /* Test point TP2431 */
-#define U300_GPIO_PIN_GPIO10            10 /* Test point TP2432 */
-#define U300_GPIO_PIN_MMC_CLKRET        11 /* Clock return from MMC/SD card */
-#define U300_GPIO_PIN_MMC_CD            12 /* MMC Card insertion detection */
-#define U300_GPIO_PIN_CAM_SUB_STANDBY   13 /* Camera SUB standby */
-#define U300_GPIO_PIN_GPIO14            14 /* Test point TP2436 */
-#define U300_GPIO_PIN_GPIO15            15 /* Unrouted */
-#define U300_GPIO_PIN_GPIO16            16 /* Test point TP2438 */
-#define U300_GPIO_PIN_PHFSENSE          17 /* Headphone jack sensing */
-#define U300_GPIO_PIN_GPIO18            18 /* Test point TP2439 */
-#define U300_GPIO_PIN_GPIO19            19 /* Routed somewhere */
-#define U300_GPIO_PIN_GPIO20            20 /* Unrouted */
-#define U300_GPIO_PIN_GPIO21            21 /* Unrouted */
-#define U300_GPIO_PIN_GPIO22            22 /* Unrouted */
-#define U300_GPIO_PIN_GPIO23            23 /* Unrouted */
-#define U300_GPIO_PIN_GPIO24            24 /* Unrouted */
-#define U300_GPIO_PIN_GPIO25            25 /* Unrouted */
-#define U300_GPIO_PIN_GPIO26            26 /* Unrouted */
-#define U300_GPIO_PIN_GPIO27            27 /* Unrouted */
-#define U300_GPIO_PIN_GPIO28            28 /* Unrouted */
-#define U300_GPIO_PIN_GPIO29            29 /* Unrouted */
-#define U300_GPIO_PIN_GPIO30            30 /* Unrouted */
-#define U300_GPIO_PIN_GPIO31            31 /* Unrouted */
-#define U300_GPIO_PIN_GPIO32            32 /* Unrouted */
-#define U300_GPIO_PIN_GPIO33            33 /* Unrouted */
-#define U300_GPIO_PIN_GPIO34            34 /* Unrouted */
-#define U300_GPIO_PIN_GPIO35            35 /* Unrouted */
-#define U300_GPIO_PIN_GPIO36            36 /* Unrouted */
-#define U300_GPIO_PIN_GPIO37            37 /* Unrouted */
-#define U300_GPIO_PIN_GPIO38            38 /* Unrouted */
-#define U300_GPIO_PIN_GPIO39            39 /* Unrouted */
-#ifdef CONFIG_MACH_U300_BS335
-#define U300_GPIO_PIN_GPIO40            40 /* Unrouted */
-#define U300_GPIO_PIN_GPIO41            41 /* Unrouted */
-#define U300_GPIO_PIN_GPIO42            42 /* Unrouted */
-#define U300_GPIO_PIN_GPIO43            43 /* Unrouted */
-#define U300_GPIO_PIN_GPIO44            44 /* Unrouted */
-#define U300_GPIO_PIN_GPIO45            45 /* Unrouted */
-#define U300_GPIO_PIN_GPIO46            46 /* Unrouted */
-#define U300_GPIO_PIN_GPIO47            47 /* Unrouted */
-#define U300_GPIO_PIN_GPIO48            48 /* Unrouted */
-#define U300_GPIO_PIN_GPIO49            49 /* Unrouted */
-#define U300_GPIO_PIN_GPIO50            50 /* Unrouted */
-#define U300_GPIO_PIN_GPIO51            51 /* Unrouted */
-#define U300_GPIO_PIN_GPIO52            52 /* Unrouted */
-#define U300_GPIO_PIN_GPIO53            53 /* Unrouted */
-#define U300_GPIO_PIN_GPIO54            54 /* Unrouted */
-#define U300_GPIO_PIN_GPIO55            55 /* Unrouted */
-#endif
-#endif
-/* translates a pin number to a port number */
-#define PIN_TO_PORT(val) (val >> 3)
-/* These can be found in arch/arm/mach-u300/gpio.c */
-extern int gpio_is_valid(int number);
-extern int gpio_request(unsigned gpio, const char *label);
-extern void gpio_free(unsigned gpio);
-extern int gpio_direction_input(unsigned gpio);
-extern int gpio_direction_output(unsigned gpio, int value);
-extern int gpio_register_callback(unsigned gpio,
-                                  int (*func)(void *arg),
-                                  void *);
-extern int gpio_unregister_callback(unsigned gpio);
-extern void enable_irq_on_gpio_pin(unsigned gpio, int edge);
-extern void disable_irq_on_gpio_pin(unsigned gpio);
-extern void gpio_pullup(unsigned gpio, int value);
-extern int gpio_get_value(unsigned gpio);
-extern void gpio_set_value(unsigned gpio, int value);
-#define gpio_get_value_cansleep gpio_get_value
-#define gpio_set_value_cansleep gpio_set_value
-/* wrappers to sleep-enable the previous two functions */
-static inline unsigned gpio_to_irq(unsigned gpio)
-{
-        return PIN_TO_PORT(gpio) + IRQ_U300_GPIO_PORT0;
-}
-static inline unsigned irq_to_gpio(unsigned irq)
-{
-        /*
-         * FIXME: This is no 1-1 mapping at all, it points to the
-         * whole block of 8 pins.
-         */
-        return (irq - IRQ_U300_GPIO_PORT0) << 3;
-}
-#endif
diff --git a/arch/arm/mach-u300/include/mach/irqs.h b/arch/arm/mach-u300/include/mach/irqs.h
index 09b1b28fa8fd..d270fea32926 100644
--- a/arch/arm/mach-u300/include/mach/irqs.h
+++ b/arch/arm/mach-u300/include/mach/irqs.h
@@ -72,7 +72,7 @@
 /* DB3150 and DB3200 have only 45 IRQs */
 #if defined(CONFIG_MACH_U300_BS2X) || defined(CONFIG_MACH_U300_BS330)
-#define U300_NR_IRQS                    45
+#define U300_VIC_IRQS_END               45
 #endif
 /* The DB3350-specific interrupt lines */
@@ -88,7 +88,7 @@
 #define IRQ_U300_GPIO_PORT4             53
 #define IRQ_U300_GPIO_PORT5             54
 #define IRQ_U300_GPIO_PORT6             55
-#define U300_NR_IRQS                    56
+#define U300_VIC_IRQS_END               56
 #endif
 /* The DB3210-specific interrupt lines */
@@ -106,16 +106,25 @@
 #define IRQ_U300_NFIF                   45
 #define IRQ_U300_NFIF2                  46
 #define IRQ_U300_SYSCON_PLL_LOCK        47
-#define U300_NR_IRQS                    48
+#define U300_VIC_IRQS_END               48
 #endif
-#ifdef CONFIG_AB3550_CORE
+/* Maximum 8*7 GPIO lines */
-#define IRQ_AB3550_BASE                 (U300_NR_IRQS)
+#ifdef CONFIG_GPIO_U300
-#define IRQ_AB3550_END                  (IRQ_AB3550_BASE + 37)
+#define IRQ_U300_GPIO_BASE              (U300_VIC_IRQS_END)
+#define IRQ_U300_GPIO_END               (IRQ_U300_GPIO_BASE + 56)
+#else
+#define IRQ_U300_GPIO_END               (U300_VIC_IRQS_END)
+#endif
-#define NR_IRQS                         (IRQ_AB3550_END + 1)
+/* Optional AB3550 mixsig chip */
+#ifdef CONFIG_AB3550_CORE
+#define IRQ_AB3550_BASE                 (IRQ_U300_GPIO_END)
+#define IRQ_AB3550_END                  (IRQ_AB3550_BASE + 38)
 #else
-#define NR_IRQS U300_NR_IRQS
+#define IRQ_AB3550_END                  (IRQ_U300_GPIO_END)
 #endif
+#define NR_IRQS                         (IRQ_AB3550_END)
 #endif
diff --git a/arch/arm/mach-u300/mmc.c b/arch/arm/mach-u300/mmc.c
index 677ccef5cd32..d9a5c92db74a 100644
--- a/arch/arm/mach-u300/mmc.c
+++ b/arch/arm/mach-u300/mmc.c
@@ -13,12 +13,12 @@
 #include <linux/device.h>
 #include <linux/amba/bus.h>
 #include <linux/mmc/host.h>
-#include <linux/gpio.h>
 #include <linux/dmaengine.h>
 #include <linux/amba/mmci.h>
 #include <linux/slab.h>
 #include <mach/coh901318.h>
 #include <mach/dma_channels.h>
+#include <mach/gpio-u300.h>
 #include "mmc.h"
 #include "padmux.h"
diff --git a/arch/arm/mach-ux500/board-mop500-pins.c b/arch/arm/mach-ux500/board-mop500-pins.c
index 4108c7bf324e..74bfcff2bdf3 100644
--- a/arch/arm/mach-ux500/board-mop500-pins.c
+++ b/arch/arm/mach-ux500/board-mop500-pins.c
@@ -6,10 +6,10 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
-#include <linux/gpio.h>
 #include <asm/mach-types.h>
 #include <plat/pincfg.h>
+#include <plat/gpio-nomadik.h>
 #include <mach/hardware.h>
 #include "pins-db8500.h"
diff --git a/arch/arm/mach-ux500/board-mop500-u8500uib.c b/arch/arm/mach-ux500/board-mop500-u8500uib.c
index 8ce46c0fdfd5..feb5744d98b7 100644
--- a/arch/arm/mach-ux500/board-mop500-u8500uib.c
+++ b/arch/arm/mach-ux500/board-mop500-u8500uib.c
@@ -4,7 +4,7 @@
 * Board data for the U8500 UIB, also known as the New UIB
 * License terms: GNU General Public License (GPL), version 2
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/i2c.h>
@@ -13,7 +13,6 @@
 #include <linux/mfd/tc3589x.h>
 #include <linux/input/matrix_keypad.h>
-#include <mach/gpio.h>
 #include <mach/irqs.h>
 #include "board-mop500.h"
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index 4810968b672c..bdd7b80dd7ad 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -37,6 +37,7 @@
 #include <plat/i2c.h>
 #include <plat/ste_dma40.h>
 #include <plat/pincfg.h>
+#include <plat/gpio-nomadik.h>
 #include <mach/hardware.h>
 #include <mach/setup.h>
diff --git a/arch/arm/mach-ux500/board-u5500-sdi.c b/arch/arm/mach-ux500/board-u5500-sdi.c
index 739fb4c5b160..63c3f8058ffc 100644
--- a/arch/arm/mach-ux500/board-u5500-sdi.c
+++ b/arch/arm/mach-ux500/board-u5500-sdi.c
@@ -7,9 +7,9 @@
 #include <linux/amba/mmci.h>
 #include <linux/mmc/host.h>
-#include <linux/gpio.h>
 #include <plat/pincfg.h>
+#include <plat/gpio-nomadik.h>
 #include <mach/db5500-regs.h>
 #include <plat/ste_dma40.h>
diff --git a/arch/arm/mach-ux500/board-u5500.c b/arch/arm/mach-ux500/board-u5500.c
index 166d47a5f4f3..e014aa749b03 100644
--- a/arch/arm/mach-ux500/board-u5500.c
+++ b/arch/arm/mach-ux500/board-u5500.c
@@ -8,7 +8,6 @@
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/amba/bus.h>
-#include <linux/gpio.h>
 #include <linux/irq.h>
 #include <linux/i2c.h>
@@ -17,6 +16,7 @@
 #include <plat/pincfg.h>
 #include <plat/i2c.h>
+#include <plat/gpio-nomadik.h>
 #include <mach/hardware.h>
 #include <mach/devices.h>
diff --git a/arch/arm/mach-ux500/cpu-db5500.c b/arch/arm/mach-ux500/cpu-db5500.c
index 22705d246fc7..9de1af008094 100644
--- a/arch/arm/mach-ux500/cpu-db5500.c
+++ b/arch/arm/mach-ux500/cpu-db5500.c
@@ -13,7 +13,7 @@
 #include <asm/mach/map.h>
 #include <asm/pmu.h>
-#include <plat/gpio.h>
+#include <plat/gpio-nomadik.h>
 #include <mach/hardware.h>
 #include <mach/devices.h>
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c
index 4598b06c8c55..13e8890a8b8a 100644
--- a/arch/arm/mach-ux500/cpu-db8500.c
+++ b/arch/arm/mach-ux500/cpu-db8500.c
@@ -14,12 +14,12 @@
 #include <linux/amba/bus.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
-#include <linux/gpio.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
 #include <asm/mach/map.h>
 #include <asm/pmu.h>
+#include <plat/gpio-nomadik.h>
 #include <mach/hardware.h>
 #include <mach/setup.h>
 #include <mach/devices.h>
diff --git a/arch/arm/mach-ux500/devices-common.c b/arch/arm/mach-ux500/devices-common.c
index 13a4ce046ae5..c563e5418d80 100644
--- a/arch/arm/mach-ux500/devices-common.c
+++ b/arch/arm/mach-ux500/devices-common.c
@@ -13,7 +13,7 @@
 #include <linux/platform_device.h>
 #include <linux/amba/bus.h>
-#include <plat/gpio.h>
+#include <plat/gpio-nomadik.h>
 #include <mach/hardware.h>
diff --git a/arch/arm/mach-ux500/include/mach/debug-macro.S b/arch/arm/mach-ux500/include/mach/debug-macro.S
index 700fb05ee815..8d74d927d4e2 100644
--- a/arch/arm/mach-ux500/include/mach/debug-macro.S
+++ b/arch/arm/mach-ux500/include/mach/debug-macro.S
@@ -35,7 +35,7 @@
 #define UX500_UART(n)   __UX500_UART(n)
 #define UART_BASE       UX500_UART(CONFIG_UX500_DEBUG_UART)
-        .macro  addruart, rp, rv
+        .macro  addruart, rp, rv, tmp
        ldr     \rp, =UART_BASE                         @ no, physical address
        ldr     \rv, =IO_ADDRESS(UART_BASE)             @ yes, virtual address
        .endm
diff --git a/arch/arm/mach-ux500/include/mach/gpio.h b/arch/arm/mach-ux500/include/mach/gpio.h
index 3c4cd31ad9f7..7389df911b1a 100644
--- a/arch/arm/mach-ux500/include/mach/gpio.h
+++ b/arch/arm/mach-ux500/include/mach/gpio.h
@@ -7,6 +7,4 @@
 */
 #define ARCH_NR_GPIOS   350
-#include <plat/gpio.h>
 #endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-ux500/include/mach/memory.h b/arch/arm/mach-ux500/include/mach/memory.h
deleted file mode 100644
index 2ef697a67006..000000000000
--- a/arch/arm/mach-ux500/include/mach/memory.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/*
- * Copyright (C) 2009 ST-Ericsson
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
-/*
- * Physical DRAM offset.
- */
-#define PLAT_PHYS_OFFSET        UL(0x00000000)
-#define BUS_OFFSET      UL(0x00000000)
-#endif
diff --git a/arch/arm/mach-versatile/include/mach/debug-macro.S b/arch/arm/mach-versatile/include/mach/debug-macro.S
index eb2cf7dc5c44..d0fbd7f1cb00 100644
--- a/arch/arm/mach-versatile/include/mach/debug-macro.S
+++ b/arch/arm/mach-versatile/include/mach/debug-macro.S
@@ -11,7 +11,7 @@
 *
 */
-                .macro  addruart, rp, rv
+                .macro  addruart, rp, rv, tmp
                mov     \rp,      #0x001F0000
                orr     \rp, \rp, #0x00001000
                orr     \rv, \rp, #0xf1000000   @ virtual base
diff --git a/arch/arm/mach-versatile/include/mach/gpio.h b/arch/arm/mach-versatile/include/mach/gpio.h
index 94ff27678a46..40a8c178f10d 100644
--- a/arch/arm/mach-versatile/include/mach/gpio.h
+++ b/arch/arm/mach-versatile/include/mach/gpio.h
@@ -1,6 +1 @@
-#include <asm-generic/gpio.h>
+/* empty */
-#define gpio_get_value  __gpio_get_value
-#define gpio_set_value  __gpio_set_value
-#define gpio_cansleep   __gpio_cansleep
-#define gpio_to_irq     __gpio_to_irq
diff --git a/arch/arm/mach-versatile/include/mach/memory.h b/arch/arm/mach-versatile/include/mach/memory.h
deleted file mode 100644
index dacc9d8e4e6a..000000000000
--- a/arch/arm/mach-versatile/include/mach/memory.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- *  arch/arm/mach-versatile/include/mach/memory.h
- *
- *  Copyright (C) 2003 ARM Limited
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
-/*
- * Physical DRAM offset.
- */
-#define PLAT_PHYS_OFFSET        UL(0x00000000)
-#endif
diff --git a/arch/arm/mach-vexpress/include/mach/debug-macro.S b/arch/arm/mach-vexpress/include/mach/debug-macro.S
index 050d65e02a42..fd9e6c7ea49f 100644
--- a/arch/arm/mach-vexpress/include/mach/debug-macro.S
+++ b/arch/arm/mach-vexpress/include/mach/debug-macro.S
@@ -12,7 +12,7 @@
 #define DEBUG_LL_UART_OFFSET    0x00009000
-                .macro  addruart,rp,rv
+                .macro  addruart,rp,rv,tmp
                mov     \rp, #DEBUG_LL_UART_OFFSET
                orr     \rv, \rp, #0xf8000000   @ virtual base
                orr     \rp, \rp, #0x10000000   @ physical base
diff --git a/arch/arm/mach-vexpress/include/mach/memory.h b/arch/arm/mach-vexpress/include/mach/memory.h
deleted file mode 100644
index 5b7fcd439d87..000000000000
--- a/arch/arm/mach-vexpress/include/mach/memory.h
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- *  arch/arm/mach-vexpress/include/mach/memory.h
- *
- *  Copyright (C) 2003 ARM Limited
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
-#define PLAT_PHYS_OFFSET                UL(0x60000000)
-#endif
diff --git a/arch/arm/mach-vt8500/include/mach/debug-macro.S b/arch/arm/mach-vt8500/include/mach/debug-macro.S
index f1191626ad51..ca292f29d4a3 100644
--- a/arch/arm/mach-vt8500/include/mach/debug-macro.S
+++ b/arch/arm/mach-vt8500/include/mach/debug-macro.S
@@ -11,7 +11,7 @@
 *
 */
-        .macro  addruart, rp, rv
+        .macro  addruart, rp, rv, tmp
        mov     \rp,      #0x00200000
        orr     \rv, \rp, #0xf8000000
        orr     \rp, \rp, #0xd8000000
diff --git a/arch/arm/mach-vt8500/include/mach/gpio.h b/arch/arm/mach-vt8500/include/mach/gpio.h
index 94ff27678a46..40a8c178f10d 100644
--- a/arch/arm/mach-vt8500/include/mach/gpio.h
+++ b/arch/arm/mach-vt8500/include/mach/gpio.h
@@ -1,6 +1 @@
-#include <asm-generic/gpio.h>
+/* empty */
-#define gpio_get_value  __gpio_get_value
-#define gpio_set_value  __gpio_set_value
-#define gpio_cansleep   __gpio_cansleep
-#define gpio_to_irq     __gpio_to_irq
diff --git a/arch/arm/mach-vt8500/include/mach/memory.h b/arch/arm/mach-vt8500/include/mach/memory.h
deleted file mode 100644
index 175f914eff93..000000000000
--- a/arch/arm/mach-vt8500/include/mach/memory.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- *  arch/arm/mach-vt8500/include/mach/memory.h
- *
- *  Copyright (C) 2003 ARM Limited
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
-/*
- * Physical DRAM offset.
- */
-#define PHYS_OFFSET     UL(0x00000000)
-#endif
diff --git a/arch/arm/mach-w90x900/include/mach/gpio.h b/arch/arm/mach-w90x900/include/mach/gpio.h
index 034da3e390c9..5385a4203277 100644
--- a/arch/arm/mach-w90x900/include/mach/gpio.h
+++ b/arch/arm/mach-w90x900/include/mach/gpio.h
@@ -15,16 +15,12 @@
 #include <mach/hardware.h>
 #include <asm/irq.h>
-#include <asm-generic/gpio.h>
-#define gpio_get_value  __gpio_get_value
-#define gpio_set_value  __gpio_set_value
-#define gpio_cansleep   __gpio_cansleep
 static inline int gpio_to_irq(unsigned gpio)
 {
        return gpio;
 }
+#define gpio_to_irq gpio_to_irq
 static inline int irq_to_gpio(unsigned irq)
 {
diff --git a/arch/arm/mach-w90x900/include/mach/memory.h b/arch/arm/mach-w90x900/include/mach/memory.h
deleted file mode 100644
index f02905ba7746..000000000000
--- a/arch/arm/mach-w90x900/include/mach/memory.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * arch/arm/mach-w90x900/include/mach/memory.h
- *
- * Copyright (c) 2008 Nuvoton technology corporation
- * All rights reserved.
- *
- * Wan ZongShun <mcuos.com@gmail.com>
- *
- * Based on arch/arm/mach-s3c2410/include/mach/memory.h
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- */
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
-#define PLAT_PHYS_OFFSET        UL(0x00000000)
-#endif
diff --git a/arch/arm/mach-zynq/include/mach/debug-macro.S b/arch/arm/mach-zynq/include/mach/debug-macro.S
index 9f664d5eb81d..3ab0be1f6191 100644
--- a/arch/arm/mach-zynq/include/mach/debug-macro.S
+++ b/arch/arm/mach-zynq/include/mach/debug-macro.S
@@ -17,7 +17,7 @@
 #include <mach/zynq_soc.h>
 #include <mach/uart.h>
-                .macro  addruart, rp, rv
+                .macro  addruart, rp, rv, tmp
                ldr     \rp, =LL_UART_PADDR     @ physical
                ldr     \rv, =LL_UART_VADDR     @ virtual
                .endm
diff --git a/arch/arm/mach-zynq/include/mach/memory.h b/arch/arm/mach-zynq/include/mach/memory.h
deleted file mode 100644
index 35a92634dcc1..000000000000
--- a/arch/arm/mach-zynq/include/mach/memory.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/* arch/arm/mach-zynq/include/mach/memory.h
- *
- *  Copyright (C) 2011 Xilinx
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-#ifndef __MACH_MEMORY_H__
-#define __MACH_MEMORY_H__
-#include <asm/sizes.h>
-#define PLAT_PHYS_OFFSET        UL(0x0)
-#endif
diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/plat-mxc/include/mach/debug-macro.S
index e4dde91f0231..a3045937fc2f 100644
--- a/arch/arm/plat-mxc/include/mach/debug-macro.S
+++ b/arch/arm/plat-mxc/include/mach/debug-macro.S
@@ -54,7 +54,7 @@
 #define UART_VADDR      IMX_IO_ADDRESS(UART_PADDR)
-                .macro  addruart, rp, rv
+                .macro  addruart, rp, rv, tmp
                ldr     \rp, =UART_PADDR        @ physical
                ldr     \rv, =UART_VADDR        @ virtual
                .endm
diff --git a/arch/arm/plat-mxc/include/mach/gpio.h b/arch/arm/plat-mxc/include/mach/gpio.h
index 44af0064ba1a..40a8c178f10d 100644
--- a/arch/arm/plat-mxc/include/mach/gpio.h
+++ b/arch/arm/plat-mxc/include/mach/gpio.h
@@ -1,32 +1 @@
-/*
+/* empty */
- * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved.
- * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
- */
-#ifndef __ASM_ARCH_MXC_GPIO_H__
-#define __ASM_ARCH_MXC_GPIO_H__
-#include <linux/spinlock.h>
-#include <mach/hardware.h>
-#include <asm-generic/gpio.h>
-/* use gpiolib dispatchers */
-#define gpio_get_value          __gpio_get_value
-#define gpio_set_value          __gpio_set_value
-#define gpio_cansleep           __gpio_cansleep
-#define gpio_to_irq             __gpio_to_irq
-#endif
diff --git a/arch/arm/plat-mxc/include/mach/iomux-v3.h b/arch/arm/plat-mxc/include/mach/iomux-v3.h
index 35e0df224caa..2fa3b5430102 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-v3.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-v3.h
@@ -90,11 +90,11 @@ typedef u64 iomux_v3_cfg_t;
 #define PAD_CTL_HYS                     (1 << 8)
 #define PAD_CTL_PKE                     (1 << 7)
-#define PAD_CTL_PUE                     (1 << 6)
+#define PAD_CTL_PUE                     (1 << 6 | PAD_CTL_PKE)
-#define PAD_CTL_PUS_100K_DOWN           (0 << 4)
+#define PAD_CTL_PUS_100K_DOWN           (0 << 4 | PAD_CTL_PUE)
-#define PAD_CTL_PUS_47K_UP              (1 << 4)
+#define PAD_CTL_PUS_47K_UP              (1 << 4 | PAD_CTL_PUE)
-#define PAD_CTL_PUS_100K_UP             (2 << 4)
+#define PAD_CTL_PUS_100K_UP             (2 << 4 | PAD_CTL_PUE)
-#define PAD_CTL_PUS_22K_UP              (3 << 4)
+#define PAD_CTL_PUS_22K_UP              (3 << 4 | PAD_CTL_PUE)
 #define PAD_CTL_ODE                     (1 << 3)
diff --git a/arch/arm/plat-mxc/include/mach/memory.h b/arch/arm/plat-mxc/include/mach/memory.h
deleted file mode 100644
index 3ec84b902243..000000000000
--- a/arch/arm/plat-mxc/include/mach/memory.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
- */
-/*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_MXC_MEMORY_H__
-#define __ASM_ARCH_MXC_MEMORY_H__
-#define MX1_PHYS_OFFSET         UL(0x08000000)
-#define MX21_PHYS_OFFSET        UL(0xc0000000)
-#define MX25_PHYS_OFFSET        UL(0x80000000)
-#define MX27_PHYS_OFFSET        UL(0xa0000000)
-#define MX3x_PHYS_OFFSET        UL(0x80000000)
-#define MX50_PHYS_OFFSET        UL(0x70000000)
-#define MX51_PHYS_OFFSET        UL(0x90000000)
-#define MX53_PHYS_OFFSET        UL(0x70000000)
-#if !defined(CONFIG_RUNTIME_PHYS_OFFSET)
-# if defined CONFIG_ARCH_MX1
-#  define PLAT_PHYS_OFFSET              MX1_PHYS_OFFSET
-# elif defined CONFIG_MACH_MX21
-#  define PLAT_PHYS_OFFSET              MX21_PHYS_OFFSET
-# elif defined CONFIG_ARCH_MX25
-#  define PLAT_PHYS_OFFSET              MX25_PHYS_OFFSET
-# elif defined CONFIG_MACH_MX27
-#  define PLAT_PHYS_OFFSET              MX27_PHYS_OFFSET
-# elif defined CONFIG_ARCH_MX3
-#  define PLAT_PHYS_OFFSET              MX3x_PHYS_OFFSET
-# elif defined CONFIG_ARCH_MX50
-#  define PLAT_PHYS_OFFSET              MX50_PHYS_OFFSET
-# elif defined CONFIG_ARCH_MX51
-#  define PLAT_PHYS_OFFSET              MX51_PHYS_OFFSET
-# elif defined CONFIG_ARCH_MX53
-#  define PLAT_PHYS_OFFSET              MX53_PHYS_OFFSET
-# endif
-#endif
-#endif /* __ASM_ARCH_MXC_MEMORY_H__ */
diff --git a/arch/arm/plat-nomadik/include/plat/gpio.h b/arch/arm/plat-nomadik/include/plat/gpio-nomadik.h
index d5d7e651269c..3ba4d8f8073b 100644
--- a/arch/arm/plat-nomadik/include/plat/gpio.h
+++ b/arch/arm/plat-nomadik/include/plat/gpio-nomadik.h
@@ -9,20 +9,9 @@
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
-#ifndef __ASM_PLAT_GPIO_H
-#define __ASM_PLAT_GPIO_H
-#include <asm-generic/gpio.h>
+#ifndef __PLAT_NOMADIK_GPIO
+#define __PLAT_NOMADIK_GPIO
-/*
- * These currently cause a function call to happen, they may be optimized
- * if needed by adding cpu-specific defines to identify blocks
- * (see mach-pxa/include/mach/gpio.h as an example using GPLR etc)
- */
-#define gpio_get_value  __gpio_get_value
-#define gpio_set_value  __gpio_set_value
-#define gpio_cansleep   __gpio_cansleep
-#define gpio_to_irq     __gpio_to_irq
 /*
 * "nmk_gpio" and "NMK_GPIO" stand for "Nomadik GPIO", leaving
@@ -93,4 +82,4 @@ struct nmk_gpio_platform_data {
        bool supports_sleepmode;
 };
-#endif /* __ASM_PLAT_GPIO_H */
+#endif /* __PLAT_NOMADIK_GPIO */
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index bb8f4a6b3e37..95732af7b208 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -14,6 +14,7 @@ config ARCH_OMAP1
        select CLKDEV_LOOKUP
        select CLKSRC_MMIO
        select GENERIC_IRQ_CHIP
+        select NEED_MACH_MEMORY_H
        help
          "Systems based on omap7xx, omap15xx or omap16xx"
diff --git a/arch/arm/plat-omap/debug-devices.c b/arch/arm/plat-omap/debug-devices.c
index 923c9621096b..caa1f7b6cc21 100644
--- a/arch/arm/plat-omap/debug-devices.c
+++ b/arch/arm/plat-omap/debug-devices.c
@@ -8,7 +8,7 @@
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
+#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
@@ -18,7 +18,6 @@
 #include <mach/hardware.h>
 #include <plat/board.h>
-#include <mach/gpio.h>
 /* Many OMAP development platforms reuse the same "debug board"; these
diff --git a/arch/arm/plat-omap/debug-leds.c b/arch/arm/plat-omap/debug-leds.c
index fc05b1022602..61a1ec2a6af4 100644
--- a/arch/arm/plat-omap/debug-leds.c
+++ b/arch/arm/plat-omap/debug-leds.c
@@ -7,7 +7,7 @@
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
+#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/leds.h>
@@ -19,7 +19,6 @@
 #include <asm/mach-types.h>
 #include <plat/fpga.h>
-#include <mach/gpio.h>
 /* Many OMAP development platforms reuse the same "debug board"; these
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
index bd9a06b3ee89..acd132c29647 100644
--- a/arch/arm/plat-omap/devices.c
+++ b/arch/arm/plat-omap/devices.c
@@ -8,7 +8,7 @@
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */
+#include <linux/gpio.h>
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
@@ -24,7 +24,6 @@
 #include <plat/tc.h>
 #include <plat/board.h>
 #include <plat/mmc.h>
-#include <mach/gpio.h>
 #include <plat/menelaus.h>
 #include <plat/omap44xx.h>
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index 91e8de3db085..9e86ee0aed0a 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -222,26 +222,6 @@ extern void omap_gpio_restore_context(void);
 #include <linux/errno.h>
 #include <asm-generic/gpio.h>
-static inline int gpio_get_value(unsigned gpio)
-{
-        return __gpio_get_value(gpio);
-}
-static inline void gpio_set_value(unsigned gpio, int value)
-{
-        __gpio_set_value(gpio, value);
-}
-static inline int gpio_cansleep(unsigned gpio)
-{
-        return __gpio_cansleep(gpio);
-}
-static inline int gpio_to_irq(unsigned gpio)
-{
-        return __gpio_to_irq(gpio);
-}
 static inline int irq_to_gpio(unsigned irq)
 {
        int tmp;
diff --git a/arch/arm/plat-omap/include/plat/memory.h b/arch/arm/plat-omap/include/plat/memory.h
deleted file mode 100644
index 7f9df6f1e113..000000000000
--- a/arch/arm/plat-omap/include/plat/memory.h
+++ /dev/null
@@ -1,89 +0,0 @@
-/*
- * arch/arm/plat-omap/include/mach/memory.h
- *
- * Memory map for OMAP-1510 and 1610
- *
- * Copyright (C) 2000 RidgeRun, Inc.
- * Author: Greg Lonnon <glonnon@ridgerun.com>
- *
- * This file was derived from arch/arm/mach-intergrator/include/mach/memory.h
- * Copyright (C) 1999 ARM Limited
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
-/*
- * Physical DRAM offset.
- */
-#if defined(CONFIG_ARCH_OMAP1)
-#define PLAT_PHYS_OFFSET                UL(0x10000000)
-#else
-#define PLAT_PHYS_OFFSET                UL(0x80000000)
-#endif
-/*
- * Bus address is physical address, except for OMAP-1510 Local Bus.
- * OMAP-1510 bus address is translated into a Local Bus address if the
- * OMAP bus type is lbus. We do the address translation based on the
- * device overriding the defaults used in the dma-mapping API.
- * Note that the is_lbus_device() test is not very efficient on 1510
- * because of the strncmp().
- */
-#ifdef CONFIG_ARCH_OMAP15XX
-/*
- * OMAP-1510 Local Bus address offset
- */
-#define OMAP1510_LB_OFFSET      UL(0x30000000)
-#define virt_to_lbus(x)         ((x) - PAGE_OFFSET + OMAP1510_LB_OFFSET)
-#define lbus_to_virt(x)         ((x) - OMAP1510_LB_OFFSET + PAGE_OFFSET)
-#define is_lbus_device(dev)     (cpu_is_omap15xx() && dev && (strncmp(dev_name(dev), "ohci", 4) == 0))
-#define __arch_pfn_to_dma(dev, pfn)     \
-        ({ dma_addr_t __dma = __pfn_to_phys(pfn); \
-           if (is_lbus_device(dev)) \
-                __dma = __dma - PHYS_OFFSET + OMAP1510_LB_OFFSET; \
-           __dma; })
-#define __arch_dma_to_pfn(dev, addr)    \
-        ({ dma_addr_t __dma = addr;                             \
-           if (is_lbus_device(dev))                             \
-                __dma += PHYS_OFFSET - OMAP1510_LB_OFFSET;      \
-           __phys_to_pfn(__dma);                                \
-        })
-#define __arch_dma_to_virt(dev, addr)   ({ (void *) (is_lbus_device(dev) ? \
-                                                lbus_to_virt(addr) : \
-                                                __phys_to_virt(addr)); })
-#define __arch_virt_to_dma(dev, addr)   ({ unsigned long __addr = (unsigned long)(addr); \
-                                           (dma_addr_t) (is_lbus_device(dev) ? \
-                                                virt_to_lbus(__addr) : \
-                                                __virt_to_phys(__addr)); })
-#endif  /* CONFIG_ARCH_OMAP15XX */
-#endif
diff --git a/arch/arm/plat-omap/include/plat/serial.h b/arch/arm/plat-omap/include/plat/serial.h
index de3b10c18127..1ab9fd6abe6d 100644
--- a/arch/arm/plat-omap/include/plat/serial.h
+++ b/arch/arm/plat-omap/include/plat/serial.h
@@ -16,8 +16,8 @@
 #include <linux/init.h>
 /*
- * Memory entry used for the DEBUG_LL UART configuration. See also
+ * Memory entry used for the DEBUG_LL UART configuration, relative to
- * uncompress.h and debug-macro.S.
+ * start of RAM. See also uncompress.h and debug-macro.S.
 *
 * Note that using a memory location for storing the UART configuration
 * has at least two limitations:
@@ -27,7 +27,7 @@
 * 2. We assume printascii is called at least once before paging_init,
 *    and addruart has a chance to read OMAP_UART_INFO
 */
-#define OMAP_UART_INFO          (PLAT_PHYS_OFFSET + 0x3ffc)
+#define OMAP_UART_INFO_OFS      0x3ffc
 /* OMAP1 serial ports */
 #define OMAP1_UART1_BASE        0xfffb0000
diff --git a/arch/arm/plat-omap/include/plat/uncompress.h b/arch/arm/plat-omap/include/plat/uncompress.h
index a067484cc4a2..2f472e989ec6 100644
--- a/arch/arm/plat-omap/include/plat/uncompress.h
+++ b/arch/arm/plat-omap/include/plat/uncompress.h
@@ -36,7 +36,13 @@ int uart_shift;
 */
 static void set_omap_uart_info(unsigned char port)
 {
-        *(volatile u32 *)OMAP_UART_INFO = port;
+        /*
+         * Get address of some.bss variable and round it down
+         * a la CONFIG_AUTO_ZRELADDR.
+         */
+        u32 ram_start = (u32)&uart_shift & 0xf8000000;
+        u32 *uart_info = (u32 *)(ram_start + OMAP_UART_INFO_OFS);
+        *uart_info = port;
 }
 static void putc(int c)
diff --git a/arch/arm/plat-orion/include/plat/gpio.h b/arch/arm/plat-orion/include/plat/gpio.h
index 3075b9fdde83..3abf30428bee 100644
--- a/arch/arm/plat-orion/include/plat/gpio.h
+++ b/arch/arm/plat-orion/include/plat/gpio.h
@@ -12,15 +12,7 @@
 #define __PLAT_GPIO_H
 #include <linux/init.h>
-#include <asm-generic/gpio.h>
+#include <linux/types.h>
-/*
- * GENERIC_GPIO primitives.
- */
-#define gpio_get_value  __gpio_get_value
-#define gpio_set_value  __gpio_set_value
-#define gpio_cansleep   __gpio_cansleep
-#define gpio_to_irq     __gpio_to_irq
 /*
 * Orion-specific GPIO API extensions.
diff --git a/arch/arm/plat-pxa/Makefile b/arch/arm/plat-pxa/Makefile
index 3aca5ba0f876..f302d048392d 100644
--- a/arch/arm/plat-pxa/Makefile
+++ b/arch/arm/plat-pxa/Makefile
@@ -4,7 +4,6 @@
 obj-y   := dma.o
-obj-$(CONFIG_GENERIC_GPIO)      += gpio.o
 obj-$(CONFIG_PXA3xx)            += mfp.o
 obj-$(CONFIG_PXA95x)            += mfp.o
 obj-$(CONFIG_ARCH_MMP)          += mfp.o
diff --git a/arch/arm/plat-pxa/gpio.c b/arch/arm/plat-pxa/gpio.c
deleted file mode 100644
index a11dc3670505..000000000000
--- a/arch/arm/plat-pxa/gpio.c
+++ /dev/null
@@ -1,338 +0,0 @@
-/*
- *  linux/arch/arm/plat-pxa/gpio.c
- *
- *  Generic PXA GPIO handling
- *
- *  Author:     Nicolas Pitre
- *  Created:    Jun 15, 2001
- *  Copyright:  MontaVista Software Inc.
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License version 2 as
- *  published by the Free Software Foundation.
- */
-#include <linux/init.h>
-#include <linux/irq.h>
-#include <linux/io.h>
-#include <linux/syscore_ops.h>
-#include <linux/slab.h>
-#include <mach/gpio.h>
-int pxa_last_gpio;
-struct pxa_gpio_chip {
-        struct gpio_chip chip;
-        void __iomem    *regbase;
-        char label[10];
-        unsigned long   irq_mask;
-        unsigned long   irq_edge_rise;
-        unsigned long   irq_edge_fall;
-#ifdef CONFIG_PM
-        unsigned long   saved_gplr;
-        unsigned long   saved_gpdr;
-        unsigned long   saved_grer;
-        unsigned long   saved_gfer;
-#endif
-};
-static DEFINE_SPINLOCK(gpio_lock);
-static struct pxa_gpio_chip *pxa_gpio_chips;
-#define for_each_gpio_chip(i, c)                        \
-        for (i = 0, c = &pxa_gpio_chips[0]; i <= pxa_last_gpio; i += 32, c++)
-static inline void __iomem *gpio_chip_base(struct gpio_chip *c)
-{
-        return container_of(c, struct pxa_gpio_chip, chip)->regbase;
-}
-static inline struct pxa_gpio_chip *gpio_to_pxachip(unsigned gpio)
-{
-        return &pxa_gpio_chips[gpio_to_bank(gpio)];
-}
-static int pxa_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
-{
-        void __iomem *base = gpio_chip_base(chip);
-        uint32_t value, mask = 1 << offset;
-        unsigned long flags;
-        spin_lock_irqsave(&gpio_lock, flags);
-        value = __raw_readl(base + GPDR_OFFSET);
-        if (__gpio_is_inverted(chip->base + offset))
-                value |= mask;
-        else
-                value &= ~mask;
-        __raw_writel(value, base + GPDR_OFFSET);
-        spin_unlock_irqrestore(&gpio_lock, flags);
-        return 0;
-}
-static int pxa_gpio_direction_output(struct gpio_chip *chip,
-                                     unsigned offset, int value)
-{
-        void __iomem *base = gpio_chip_base(chip);
-        uint32_t tmp, mask = 1 << offset;
-        unsigned long flags;
-        __raw_writel(mask, base + (value ? GPSR_OFFSET : GPCR_OFFSET));
-        spin_lock_irqsave(&gpio_lock, flags);
-        tmp = __raw_readl(base + GPDR_OFFSET);
-        if (__gpio_is_inverted(chip->base + offset))
-                tmp &= ~mask;
-        else
-                tmp |= mask;
-        __raw_writel(tmp, base + GPDR_OFFSET);
-        spin_unlock_irqrestore(&gpio_lock, flags);
-        return 0;
-}
-static int pxa_gpio_get(struct gpio_chip *chip, unsigned offset)
-{
-        return __raw_readl(gpio_chip_base(chip) + GPLR_OFFSET) & (1 << offset);
-}
-static void pxa_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
-{
-        __raw_writel(1 << offset, gpio_chip_base(chip) +
-                                (value ? GPSR_OFFSET : GPCR_OFFSET));
-}
-static int __init pxa_init_gpio_chip(int gpio_end)
-{
-        int i, gpio, nbanks = gpio_to_bank(gpio_end) + 1;
-        struct pxa_gpio_chip *chips;
-        chips = kzalloc(nbanks * sizeof(struct pxa_gpio_chip), GFP_KERNEL);
-        if (chips == NULL) {
-                pr_err("%s: failed to allocate GPIO chips\n", __func__);
-                return -ENOMEM;
-        }
-        for (i = 0, gpio = 0; i < nbanks; i++, gpio += 32) {
-                struct gpio_chip *c = &chips[i].chip;
-                sprintf(chips[i].label, "gpio-%d", i);
-                chips[i].regbase = (void __iomem *)GPIO_BANK(i);
-                c->base  = gpio;
-                c->label = chips[i].label;
-                c->direction_input  = pxa_gpio_direction_input;
-                c->direction_output = pxa_gpio_direction_output;
-                c->get = pxa_gpio_get;
-                c->set = pxa_gpio_set;
-                /* number of GPIOs on last bank may be less than 32 */
-                c->ngpio = (gpio + 31 > gpio_end) ? (gpio_end - gpio + 1) : 32;
-                gpiochip_add(c);
-        }
-        pxa_gpio_chips = chips;
-        return 0;
-}
-/* Update only those GRERx and GFERx edge detection register bits if those
- * bits are set in c->irq_mask
- */
-static inline void update_edge_detect(struct pxa_gpio_chip *c)
-{
-        uint32_t grer, gfer;
-        grer = __raw_readl(c->regbase + GRER_OFFSET) & ~c->irq_mask;
-        gfer = __raw_readl(c->regbase + GFER_OFFSET) & ~c->irq_mask;
-        grer |= c->irq_edge_rise & c->irq_mask;
-        gfer |= c->irq_edge_fall & c->irq_mask;
-        __raw_writel(grer, c->regbase + GRER_OFFSET);
-        __raw_writel(gfer, c->regbase + GFER_OFFSET);
-}
-static int pxa_gpio_irq_type(struct irq_data *d, unsigned int type)
-{
-        struct pxa_gpio_chip *c;
-        int gpio = irq_to_gpio(d->irq);
-        unsigned long gpdr, mask = GPIO_bit(gpio);
-        c = gpio_to_pxachip(gpio);
-        if (type == IRQ_TYPE_PROBE) {
-                /* Don't mess with enabled GPIOs using preconfigured edges or
-                 * GPIOs set to alternate function or to output during probe
-                 */
-                if ((c->irq_edge_rise | c->irq_edge_fall) & GPIO_bit(gpio))
-                        return 0;
-                if (__gpio_is_occupied(gpio))
-                        return 0;
-                type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING;
-        }
-        gpdr = __raw_readl(c->regbase + GPDR_OFFSET);
-        if (__gpio_is_inverted(gpio))
-                __raw_writel(gpdr | mask,  c->regbase + GPDR_OFFSET);
-        else
-                __raw_writel(gpdr & ~mask, c->regbase + GPDR_OFFSET);
-        if (type & IRQ_TYPE_EDGE_RISING)
-                c->irq_edge_rise |= mask;
-        else
-                c->irq_edge_rise &= ~mask;
-        if (type & IRQ_TYPE_EDGE_FALLING)
-                c->irq_edge_fall |= mask;
-        else
-                c->irq_edge_fall &= ~mask;
-        update_edge_detect(c);
-        pr_debug("%s: IRQ%d (GPIO%d) - edge%s%s\n", __func__, d->irq, gpio,
-                ((type & IRQ_TYPE_EDGE_RISING)  ? " rising"  : ""),
-                ((type & IRQ_TYPE_EDGE_FALLING) ? " falling" : ""));
-        return 0;
-}
-static void pxa_gpio_demux_handler(unsigned int irq, struct irq_desc *desc)
-{
-        struct pxa_gpio_chip *c;
-        int loop, gpio, gpio_base, n;
-        unsigned long gedr;
-        do {
-                loop = 0;
-                for_each_gpio_chip(gpio, c) {
-                        gpio_base = c->chip.base;
-                        gedr = __raw_readl(c->regbase + GEDR_OFFSET);
-                        gedr = gedr & c->irq_mask;
-                        __raw_writel(gedr, c->regbase + GEDR_OFFSET);
-                        n = find_first_bit(&gedr, BITS_PER_LONG);
-                        while (n < BITS_PER_LONG) {
-                                loop = 1;
-                                generic_handle_irq(gpio_to_irq(gpio_base + n));
-                                n = find_next_bit(&gedr, BITS_PER_LONG, n + 1);
-                        }
-                }
-        } while (loop);
-}
-static void pxa_ack_muxed_gpio(struct irq_data *d)
-{
-        int gpio = irq_to_gpio(d->irq);
-        struct pxa_gpio_chip *c = gpio_to_pxachip(gpio);
-        __raw_writel(GPIO_bit(gpio), c->regbase + GEDR_OFFSET);
-}
-static void pxa_mask_muxed_gpio(struct irq_data *d)
-{
-        int gpio = irq_to_gpio(d->irq);
-        struct pxa_gpio_chip *c = gpio_to_pxachip(gpio);
-        uint32_t grer, gfer;
-        c->irq_mask &= ~GPIO_bit(gpio);
-        grer = __raw_readl(c->regbase + GRER_OFFSET) & ~GPIO_bit(gpio);
-        gfer = __raw_readl(c->regbase + GFER_OFFSET) & ~GPIO_bit(gpio);
-        __raw_writel(grer, c->regbase + GRER_OFFSET);
-        __raw_writel(gfer, c->regbase + GFER_OFFSET);
-}
-static void pxa_unmask_muxed_gpio(struct irq_data *d)
-{
-        int gpio = irq_to_gpio(d->irq);
-        struct pxa_gpio_chip *c = gpio_to_pxachip(gpio);
-        c->irq_mask |= GPIO_bit(gpio);
-        update_edge_detect(c);
-}
-static struct irq_chip pxa_muxed_gpio_chip = {
-        .name           = "GPIO",
-        .irq_ack        = pxa_ack_muxed_gpio,
-        .irq_mask       = pxa_mask_muxed_gpio,
-        .irq_unmask     = pxa_unmask_muxed_gpio,
-        .irq_set_type   = pxa_gpio_irq_type,
-};
-void __init pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn)
-{
-        struct pxa_gpio_chip *c;
-        int gpio, irq;
-        pxa_last_gpio = end;
-        /* Initialize GPIO chips */
-        pxa_init_gpio_chip(end);
-        /* clear all GPIO edge detects */
-        for_each_gpio_chip(gpio, c) {
-                __raw_writel(0, c->regbase + GFER_OFFSET);
-                __raw_writel(0, c->regbase + GRER_OFFSET);
-                __raw_writel(~0,c->regbase + GEDR_OFFSET);
-        }
-        for (irq  = gpio_to_irq(start); irq <= gpio_to_irq(end); irq++) {
-                irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip,
-                                         handle_edge_irq);
-                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
-        }
-        /* Install handler for GPIO>=2 edge detect interrupts */
-        irq_set_chained_handler(mux_irq, pxa_gpio_demux_handler);
-        pxa_muxed_gpio_chip.irq_set_wake = fn;
-}
-#ifdef CONFIG_PM
-static int pxa_gpio_suspend(void)
-{
-        struct pxa_gpio_chip *c;
-        int gpio;
-        for_each_gpio_chip(gpio, c) {
-                c->saved_gplr = __raw_readl(c->regbase + GPLR_OFFSET);
-                c->saved_gpdr = __raw_readl(c->regbase + GPDR_OFFSET);
-                c->saved_grer = __raw_readl(c->regbase + GRER_OFFSET);
-                c->saved_gfer = __raw_readl(c->regbase + GFER_OFFSET);
-                /* Clear GPIO transition detect bits */
-                __raw_writel(0xffffffff, c->regbase + GEDR_OFFSET);
-        }
-        return 0;
-}
-static void pxa_gpio_resume(void)
-{
-        struct pxa_gpio_chip *c;
-        int gpio;
-        for_each_gpio_chip(gpio, c) {
-                /* restore level with set/clear */
-                __raw_writel( c->saved_gplr, c->regbase + GPSR_OFFSET);
-                __raw_writel(~c->saved_gplr, c->regbase + GPCR_OFFSET);
-                __raw_writel(c->saved_grer, c->regbase + GRER_OFFSET);
-                __raw_writel(c->saved_gfer, c->regbase + GFER_OFFSET);
-                __raw_writel(c->saved_gpdr, c->regbase + GPDR_OFFSET);
-        }
-}
-#else
-#define pxa_gpio_suspend        NULL
-#define pxa_gpio_resume         NULL
-#endif
-struct syscore_ops pxa_gpio_syscore_ops = {
-        .suspend        = pxa_gpio_suspend,
-        .resume         = pxa_gpio_resume,
-};
diff --git a/arch/arm/plat-pxa/include/plat/gpio-pxa.h b/arch/arm/plat-pxa/include/plat/gpio-pxa.h
new file mode 100644
index 000000000000..b6390beff323
--- /dev/null
+++ b/arch/arm/plat-pxa/include/plat/gpio-pxa.h
@@ -0,0 +1,44 @@
+#ifndef __PLAT_PXA_GPIO_H
+#define __PLAT_PXA_GPIO_H
+struct irq_data;
+/*
+ * We handle the GPIOs by banks, each bank covers up to 32 GPIOs with
+ * one set of registers. The register offsets are organized below:
+ *
+ *           GPLR    GPDR    GPSR    GPCR    GRER    GFER    GEDR
+ * BANK 0 - 0x0000  0x000C  0x0018  0x0024  0x0030  0x003C  0x0048
+ * BANK 1 - 0x0004  0x0010  0x001C  0x0028  0x0034  0x0040  0x004C
+ * BANK 2 - 0x0008  0x0014  0x0020  0x002C  0x0038  0x0044  0x0050
+ *
+ * BANK 3 - 0x0100  0x010C  0x0118  0x0124  0x0130  0x013C  0x0148
+ * BANK 4 - 0x0104  0x0110  0x011C  0x0128  0x0134  0x0140  0x014C
+ * BANK 5 - 0x0108  0x0114  0x0120  0x012C  0x0138  0x0144  0x0150
+ *
+ * NOTE:
+ *   BANK 3 is only available on PXA27x and later processors.
+ *   BANK 4 and 5 are only available on PXA935
+ */
+#define GPIO_BANK(n)    (GPIO_REGS_VIRT + BANK_OFF(n))
+#define GPLR_OFFSET     0x00
+#define GPDR_OFFSET     0x0C
+#define GPSR_OFFSET     0x18
+#define GPCR_OFFSET     0x24
+#define GRER_OFFSET     0x30
+#define GFER_OFFSET     0x3C
+#define GEDR_OFFSET     0x48
+/* NOTE: some PXAs have fewer on-chip GPIOs (like PXA255, with 85).
+ * Those cases currently cause holes in the GPIO number space, the
+ * actual number of the last GPIO is recorded by 'pxa_last_gpio'.
+ */
+extern int pxa_last_gpio;
+typedef int (*set_wake_t)(struct irq_data *d, unsigned int on);
+extern void pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn);
+#endif /* __PLAT_PXA_GPIO_H */
diff --git a/arch/arm/plat-pxa/include/plat/gpio.h b/arch/arm/plat-pxa/include/plat/gpio.h
index 1ddd2b97a729..258f77210b02 100644
--- a/arch/arm/plat-pxa/include/plat/gpio.h
+++ b/arch/arm/plat-pxa/include/plat/gpio.h
@@ -1,35 +1,10 @@
 #ifndef __PLAT_GPIO_H
 #define __PLAT_GPIO_H
-struct irq_data;
+#define __ARM_GPIOLIB_COMPLEX
-/*
+/* The individual machine provides register offsets and NR_BUILTIN_GPIO */
- * We handle the GPIOs by banks, each bank covers up to 32 GPIOs with
+#include <mach/gpio-pxa.h>
- * one set of registers. The register offsets are organized below:
- *
- *           GPLR    GPDR    GPSR    GPCR    GRER    GFER    GEDR
- * BANK 0 - 0x0000  0x000C  0x0018  0x0024  0x0030  0x003C  0x0048
- * BANK 1 - 0x0004  0x0010  0x001C  0x0028  0x0034  0x0040  0x004C
- * BANK 2 - 0x0008  0x0014  0x0020  0x002C  0x0038  0x0044  0x0050
- *
- * BANK 3 - 0x0100  0x010C  0x0118  0x0124  0x0130  0x013C  0x0148
- * BANK 4 - 0x0104  0x0110  0x011C  0x0128  0x0134  0x0140  0x014C
- * BANK 5 - 0x0108  0x0114  0x0120  0x012C  0x0138  0x0144  0x0150
- *
- * NOTE:
- *   BANK 3 is only available on PXA27x and later processors.
- *   BANK 4 and 5 are only available on PXA935
- */
-#define GPIO_BANK(n)    (GPIO_REGS_VIRT + BANK_OFF(n))
-#define GPLR_OFFSET     0x00
-#define GPDR_OFFSET     0x0C
-#define GPSR_OFFSET     0x18
-#define GPCR_OFFSET     0x24
-#define GRER_OFFSET     0x30
-#define GFER_OFFSET     0x3C
-#define GEDR_OFFSET     0x48
 static inline int gpio_get_value(unsigned gpio)
 {
@@ -52,13 +27,4 @@ static inline void gpio_set_value(unsigned gpio, int value)
 #define gpio_cansleep           __gpio_cansleep
-/* NOTE: some PXAs have fewer on-chip GPIOs (like PXA255, with 85).
- * Those cases currently cause holes in the GPIO number space, the
- * actual number of the last GPIO is recorded by 'pxa_last_gpio'.
- */
-extern int pxa_last_gpio;
-typedef int (*set_wake_t)(struct irq_data *d, unsigned int on);
-extern void pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn);
 #endif /* __PLAT_GPIO_H */
diff --git a/arch/arm/plat-pxa/include/plat/mfp.h b/arch/arm/plat-pxa/include/plat/mfp.h
index 89e68e07b0a8..5c79c29f2833 100644
--- a/arch/arm/plat-pxa/include/plat/mfp.h
+++ b/arch/arm/plat-pxa/include/plat/mfp.h
@@ -456,7 +456,7 @@ struct mfp_addr_map {
 #define MFP_ADDR_END    { MFP_PIN_INVALID, 0 }
-void __init mfp_init_base(unsigned long mfpr_base);
+void __init mfp_init_base(void __iomem *mfpr_base);
 void __init mfp_init_addr(struct mfp_addr_map *map);
 /*
diff --git a/arch/arm/plat-pxa/mfp.c b/arch/arm/plat-pxa/mfp.c
index be12eadcce20..2c4dbb1f4236 100644
--- a/arch/arm/plat-pxa/mfp.c
+++ b/arch/arm/plat-pxa/mfp.c
@@ -229,7 +229,7 @@ void mfp_write(int mfp, unsigned long val)
        spin_unlock_irqrestore(&mfp_spin_lock, flags);
 }
-void __init mfp_init_base(unsigned long mfpr_base)
+void __init mfp_init_base(void __iomem *mfpr_base)
 {
        int i;
@@ -237,7 +237,7 @@ void __init mfp_init_base(unsigned long mfpr_base)
        for (i = 0; i < ARRAY_SIZE(mfp_table); i++)
                mfp_table[i].config = -1;
-        mfpr_mmio_base = (void __iomem *)mfpr_base;
+        mfpr_mmio_base = mfpr_base;
 }
 void __init mfp_init_addr(struct mfp_addr_map *map)
diff --git a/arch/arm/plat-spear/include/plat/debug-macro.S b/arch/arm/plat-spear/include/plat/debug-macro.S
index 8501bbf2c092..02b160a1ec9b 100644
--- a/arch/arm/plat-spear/include/plat/debug-macro.S
+++ b/arch/arm/plat-spear/include/plat/debug-macro.S
@@ -14,7 +14,7 @@
 #include <linux/amba/serial.h>
 #include <mach/hardware.h>
-                .macro  addruart, rp, rv
+                .macro  addruart, rp, rv, tmp
                mov     \rp, #SPEAR_DBG_UART_BASE               @ Physical base
                mov     \rv, #VA_SPEAR_DBG_UART_BASE            @ Virtual base
                .endm
diff --git a/arch/arm/plat-spear/include/plat/gpio.h b/arch/arm/plat-spear/include/plat/gpio.h
index b857c91257dd..40a8c178f10d 100644
--- a/arch/arm/plat-spear/include/plat/gpio.h
+++ b/arch/arm/plat-spear/include/plat/gpio.h
@@ -1,24 +1 @@
-/*
+/* empty */
- * arch/arm/plat-spear/include/plat/gpio.h
- *
- * GPIO macros for SPEAr platform
- *
- * Copyright (C) 2009 ST Microelectronics
- * Viresh Kumar<viresh.kumar@st.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-#ifndef __PLAT_GPIO_H
-#define __PLAT_GPIO_H
-#include <asm-generic/gpio.h>
-#define gpio_get_value  __gpio_get_value
-#define gpio_set_value  __gpio_set_value
-#define gpio_cansleep   __gpio_cansleep
-#define gpio_to_irq     __gpio_to_irq
-#endif /* __PLAT_GPIO_H */
diff --git a/arch/arm/plat-spear/include/plat/memory.h b/arch/arm/plat-spear/include/plat/memory.h
deleted file mode 100644
index 7e3599e1104e..000000000000
--- a/arch/arm/plat-spear/include/plat/memory.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * arch/arm/plat-spear/include/plat/memory.h
- *
- * Memory map for SPEAr platform
- *
- * Copyright (C) 2009 ST Microelectronics
- * Viresh Kumar<viresh.kumar@st.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-#ifndef __PLAT_MEMORY_H
-#define __PLAT_MEMORY_H
-/* Physical DRAM offset */
-#define PLAT_PHYS_OFFSET                UL(0x00000000)
-#endif /* __PLAT_MEMORY_H */
diff --git a/arch/arm/plat-tcc/include/mach/debug-macro.S b/arch/arm/plat-tcc/include/mach/debug-macro.S
index 7662f736e42b..cf17d04ec30d 100644
--- a/arch/arm/plat-tcc/include/mach/debug-macro.S
+++ b/arch/arm/plat-tcc/include/mach/debug-macro.S
@@ -9,7 +9,7 @@
 *
 */
-                .macro  addruart, rp, rv
+                .macro  addruart, rp, rv, tmp
                moveq   \rp, #0x90000000        @ physical base address
                movne   \rv, #0xF1000000        @ virtual base
                orr     \rp, \rp, #0x00007000   @ UART0
diff --git a/arch/arm/plat-tcc/include/mach/memory.h b/arch/arm/plat-tcc/include/mach/memory.h
deleted file mode 100644
index 28a6e0cd13b3..000000000000
--- a/arch/arm/plat-tcc/include/mach/memory.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/*
- * Copyright (C) 1999 ARM Limited
- * Copyright (C) 2000 RidgeRun, Inc.
- * Copyright (C) 2008-2009 Telechips
- * Copyright (C) 2010 Hans J. Koch <hjk@linutronix.de>
- *
- * Licensed under the terms of the GPL v2.
- */
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
-/*
- * Physical DRAM offset.
- */
-#define PLAT_PHYS_OFFSET                UL(0x20000000)
-#endif