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-rw-r--r--arch/arm/boot/dts/Makefile3
-rw-r--r--arch/arm/boot/dts/armada-xp-synology-ds414.dts330
2 files changed, 332 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index cfcf400a3a6c..88346b317d76 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -510,7 +510,8 @@ dtb-$(CONFIG_MACH_ARMADA_XP) += \
510 armada-xp-lenovo-ix4-300d.dtb \ 510 armada-xp-lenovo-ix4-300d.dtb \
511 armada-xp-matrix.dtb \ 511 armada-xp-matrix.dtb \
512 armada-xp-netgear-rn2120.dtb \ 512 armada-xp-netgear-rn2120.dtb \
513 armada-xp-openblocks-ax3-4.dtb 513 armada-xp-openblocks-ax3-4.dtb \
514 armada-xp-synology-ds414.dtb
514dtb-$(CONFIG_MACH_DOVE) += dove-cm-a510.dtb \ 515dtb-$(CONFIG_MACH_DOVE) += dove-cm-a510.dtb \
515 dove-cubox.dtb \ 516 dove-cubox.dtb \
516 dove-cubox-es.dtb \ 517 dove-cubox-es.dtb \
diff --git a/arch/arm/boot/dts/armada-xp-synology-ds414.dts b/arch/arm/boot/dts/armada-xp-synology-ds414.dts
new file mode 100644
index 000000000000..ba5e94d27c21
--- /dev/null
+++ b/arch/arm/boot/dts/armada-xp-synology-ds414.dts
@@ -0,0 +1,330 @@
1/*
2 * Device Tree file for Synology DS414
3 *
4 * Copyright (C) 2014, Arnaud EBALARD <arno@natisbad.org>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 *
11 * Note: this Device Tree assumes that the bootloader has remapped the
12 * internal registers to 0xf1000000 (instead of the old 0xd0000000).
13 * The 0xf1000000 is the default used by the recent, DT-capable, U-Boot
14 * bootloaders provided by Marvell. It is used in recent versions of
15 * DSM software provided by Synology. Nonetheless, some earlier boards
16 * were delivered with an older version of u-boot that left internal
17 * registers mapped at 0xd0000000. If you have such a device you will
18 * not be able to directly boot a kernel based on this Device Tree. In
19 * that case, the preferred solution is to update your bootloader (e.g.
20 * by upgrading to latest version of DSM, or building a new one and
21 * installing it from u-boot prompt) or adjust the Devive Tree
22 * (s/0xf1000000/0xd0000000/ in 'ranges' below).
23 */
24
25/dts-v1/;
26
27#include <dt-bindings/input/input.h>
28#include <dt-bindings/gpio/gpio.h>
29#include "armada-xp-mv78230.dtsi"
30
31/ {
32 model = "Synology DS414";
33 compatible = "synology,ds414", "marvell,armadaxp-mv78230",
34 "marvell,armadaxp", "marvell,armada-370-xp";
35
36 chosen {
37 bootargs = "console=ttyS0,115200 earlyprintk";
38 stdout-path = &uart0;
39 };
40
41 memory {
42 device_type = "memory";
43 reg = <0 0x00000000 0 0x40000000>; /* 1GB */
44 };
45
46 soc {
47 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
48 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>;
49
50 pcie-controller {
51 status = "okay";
52
53 /*
54 * Connected to Marvell 88SX7042 SATA-II controller
55 * handling the four disks.
56 */
57 pcie@1,0 {
58 /* Port 0, Lane 0 */
59 status = "okay";
60 };
61
62 /*
63 * Connected to EtronTech EJ168A XHCI controller
64 * providing the two rear USB 3.0 ports.
65 */
66 pcie@5,0 {
67 /* Port 1, Lane 0 */
68 status = "okay";
69 };
70 };
71
72 internal-regs {
73
74 /* RTC is provided by Seiko S-35390A below */
75 rtc@10300 {
76 status = "disabled";
77 };
78
79 spi0: spi@10600 {
80 status = "okay";
81
82 spi-flash@0 {
83 #address-cells = <1>;
84 #size-cells = <1>;
85 compatible = "micron,n25q064";
86 reg = <0>; /* Chip select 0 */
87 spi-max-frequency = <20000000>;
88
89 /*
90 * Warning!
91 *
92 * Synology u-boot uses its compiled-in environment
93 * and it seems Synology did not care to change u-boot
94 * default configuration in order to allow saving a
95 * modified environment at a sensible location. So,
96 * if you do a 'saveenv' under u-boot, your modified
97 * environment will be saved at 1MB after the start
98 * of the flash, i.e. in the middle of the uImage.
99 * For that reason, it is strongly advised not to
100 * change the default environment, unless you know
101 * what you are doing.
102 */
103 partition@00000000 { /* u-boot */
104 label = "RedBoot";
105 reg = <0x00000000 0x000d0000>; /* 832KB */
106 };
107
108 partition@000c0000 { /* uImage */
109 label = "zImage";
110 reg = <0x000d0000 0x002d0000>; /* 2880KB */
111 };
112
113 partition@003a0000 { /* uInitramfs */
114 label = "rd.gz";
115 reg = <0x003a0000 0x00430000>; /* 4250KB */
116 };
117
118 partition@007d0000 { /* MAC address and serial number */
119 label = "vendor";
120 reg = <0x007d0000 0x00010000>; /* 64KB */
121 };
122
123 partition@007e0000 {
124 label = "RedBoot config";
125 reg = <0x007e0000 0x00010000>; /* 64KB */
126 };
127
128 partition@007f0000 {
129 label = "FIS directory";
130 reg = <0x007f0000 0x00010000>; /* 64KB */
131 };
132 };
133 };
134
135 i2c@11000 {
136 clock-frequency = <400000>;
137 status = "okay";
138
139 s35390a: s35390a@30 {
140 compatible = "sii,s35390a";
141 reg = <0x30>;
142 };
143 };
144
145 /* Connected to a header on device's PCB. This
146 * provides the main console for the device.
147 *
148 * Warning: the device may not boot with a 3.3V
149 * USB-serial converter connected when the power
150 * button is pressed. The converter needs to be
151 * connected a few seconds after pressing the
152 * power button. This is possibly due to UART0_TXD
153 * pin being sampled at reset (bit 0 of SAR).
154 */
155 serial@12000 {
156 status = "okay";
157 };
158
159 /* Connected to a Microchip PIC16F883 for power control */
160 serial@12100 {
161 status = "okay";
162 };
163
164 poweroff@12100 {
165 compatible = "synology,power-off";
166 reg = <0x12100 0x100>;
167 clocks = <&coreclk 0>;
168 };
169
170 /* Front USB 2.0 port */
171 usb@50000 {
172 status = "okay";
173 };
174
175 mdio {
176 phy0: ethernet-phy@0 { /* Marvell 88E1512 */
177 reg = <0>;
178 };
179
180 phy1: ethernet-phy@1 { /* Marvell 88E1512 */
181 reg = <1>;
182 };
183 };
184
185 ethernet@70000 {
186 status = "okay";
187 pinctrl-0 = <&pmx_ge0_rgmii>;
188 pinctrl-names = "default";
189 phy = <&phy1>;
190 phy-mode = "rgmii-id";
191 };
192
193 ethernet@74000 {
194 pinctrl-0 = <&pmx_ge1_rgmii>;
195 pinctrl-names = "default";
196 status = "okay";
197 phy = <&phy0>;
198 phy-mode = "rgmii-id";
199 };
200 };
201 };
202
203 regulators {
204 compatible = "simple-bus";
205 #address-cells = <1>;
206 #size-cells = <0>;
207 pinctrl-0 = <&sata1_pwr_pin &sata2_pwr_pin
208 &sata3_pwr_pin &sata4_pwr_pin>;
209 pinctrl-names = "default";
210
211 sata1_regulator: sata1-regulator {
212 compatible = "regulator-fixed";
213 reg = <1>;
214 regulator-name = "SATA1 Power";
215 regulator-min-microvolt = <5000000>;
216 regulator-max-microvolt = <5000000>;
217 startup-delay-us = <2000000>;
218 enable-active-high;
219 regulator-always-on;
220 regulator-boot-on;
221 gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>;
222 };
223
224 sata2_regulator: sata2-regulator {
225 compatible = "regulator-fixed";
226 reg = <2>;
227 regulator-name = "SATA2 Power";
228 regulator-min-microvolt = <5000000>;
229 regulator-max-microvolt = <5000000>;
230 startup-delay-us = <4000000>;
231 enable-active-high;
232 regulator-always-on;
233 regulator-boot-on;
234 gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
235 };
236
237 sata3_regulator: sata3-regulator {
238 compatible = "regulator-fixed";
239 reg = <3>;
240 regulator-name = "SATA3 Power";
241 regulator-min-microvolt = <5000000>;
242 regulator-max-microvolt = <5000000>;
243 startup-delay-us = <6000000>;
244 enable-active-high;
245 regulator-always-on;
246 regulator-boot-on;
247 gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;
248 };
249
250 sata4_regulator: sata4-regulator {
251 compatible = "regulator-fixed";
252 reg = <4>;
253 regulator-name = "SATA4 Power";
254 regulator-min-microvolt = <5000000>;
255 regulator-max-microvolt = <5000000>;
256 startup-delay-us = <8000000>;
257 enable-active-high;
258 regulator-always-on;
259 regulator-boot-on;
260 gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
261 };
262 };
263};
264
265&pinctrl {
266 sata1_pwr_pin: sata1-pwr-pin {
267 marvell,pins = "mpp42";
268 marvell,function = "gpio";
269 };
270
271 sata2_pwr_pin: sata2-pwr-pin {
272 marvell,pins = "mpp44";
273 marvell,function = "gpio";
274 };
275
276 sata3_pwr_pin: sata3-pwr-pin {
277 marvell,pins = "mpp45";
278 marvell,function = "gpio";
279 };
280
281 sata4_pwr_pin: sata4-pwr-pin {
282 marvell,pins = "mpp46";
283 marvell,function = "gpio";
284 };
285
286 sata1_pres_pin: sata1-pres-pin {
287 marvell,pins = "mpp34";
288 marvell,function = "gpio";
289 };
290
291 sata2_pres_pin: sata2-pres-pin {
292 marvell,pins = "mpp35";
293 marvell,function = "gpio";
294 };
295
296 sata3_pres_pin: sata3-pres-pin {
297 marvell,pins = "mpp40";
298 marvell,function = "gpio";
299 };
300
301 sata4_pres_pin: sata4-pres-pin {
302 marvell,pins = "mpp41";
303 marvell,function = "gpio";
304 };
305
306 syno_id_bit0_pin: syno-id-bit0-pin {
307 marvell,pins = "mpp26";
308 marvell,function = "gpio";
309 };
310
311 pmx_syno_id_bit1: syno-id-bit1-pin {
312 marvell,pins = "mpp28";
313 marvell,function = "gpio";
314 };
315
316 pmx_syno_id_bit2: syno-id-bit2-pin {
317 marvell,pins = "mpp29";
318 marvell,function = "gpio";
319 };
320
321 pmx_fan1_alarm: fan1-alarm-pin {
322 marvell,pins = "mpp33";
323 marvell,function = "gpio";
324 };
325
326 fan2_alarm_pin: fan2-alarm-pin {
327 marvell,pins = "mpp32";
328 marvell,function = "gpio";
329 };
330};
generated by cgit v1.2.2 (git 2.25.0) at 2025-09-05 16:35:26 -0400