diff options
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-shmobile/Makefile | 6 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/headsmp.S | 49 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/include/mach/common.h | 9 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/platsmp-scu.c | 81 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/platsmp.c | 18 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/smp-emev2.c | 19 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/smp-r8a7779.c | 64 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/smp-sh73a0.c | 67 |
8 files changed, 202 insertions, 111 deletions
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile index 969c3a9dde5b..b95b500e3b5a 100644 --- a/arch/arm/mach-shmobile/Makefile +++ b/arch/arm/mach-shmobile/Makefile | |||
@@ -17,9 +17,9 @@ obj-$(CONFIG_ARCH_EMEV2) += setup-emev2.o clock-emev2.o | |||
17 | 17 | ||
18 | # SMP objects | 18 | # SMP objects |
19 | smp-y := platsmp.o headsmp.o | 19 | smp-y := platsmp.o headsmp.o |
20 | smp-$(CONFIG_ARCH_SH73A0) += smp-sh73a0.o headsmp-scu.o | 20 | smp-$(CONFIG_ARCH_SH73A0) += smp-sh73a0.o headsmp-scu.o platsmp-scu.o |
21 | smp-$(CONFIG_ARCH_R8A7779) += smp-r8a7779.o headsmp-scu.o | 21 | smp-$(CONFIG_ARCH_R8A7779) += smp-r8a7779.o headsmp-scu.o platsmp-scu.o |
22 | smp-$(CONFIG_ARCH_EMEV2) += smp-emev2.o headsmp-scu.o | 22 | smp-$(CONFIG_ARCH_EMEV2) += smp-emev2.o headsmp-scu.o platsmp-scu.o |
23 | 23 | ||
24 | # IRQ objects | 24 | # IRQ objects |
25 | obj-$(CONFIG_ARCH_SH7372) += entry-intc.o | 25 | obj-$(CONFIG_ARCH_SH7372) += entry-intc.o |
diff --git a/arch/arm/mach-shmobile/headsmp.S b/arch/arm/mach-shmobile/headsmp.S index a9d212498987..55017f507e96 100644 --- a/arch/arm/mach-shmobile/headsmp.S +++ b/arch/arm/mach-shmobile/headsmp.S | |||
@@ -36,3 +36,52 @@ shmobile_boot_fn: | |||
36 | .globl shmobile_boot_arg | 36 | .globl shmobile_boot_arg |
37 | shmobile_boot_arg: | 37 | shmobile_boot_arg: |
38 | 2: .space 4 | 38 | 2: .space 4 |
39 | |||
40 | /* | ||
41 | * Per-CPU SMP boot function/argument selection code based on MPIDR | ||
42 | */ | ||
43 | |||
44 | ENTRY(shmobile_smp_boot) | ||
45 | @ r0 = MPIDR_HWID_BITMASK | ||
46 | mrc p15, 0, r1, c0, c0, 5 @ r1 = MPIDR | ||
47 | and r0, r1, r0 @ r0 = cpu_logical_map() value | ||
48 | mov r1, #0 @ r1 = CPU index | ||
49 | adr r5, 1f @ array of per-cpu mpidr values | ||
50 | adr r6, 2f @ array of per-cpu functions | ||
51 | adr r7, 3f @ array of per-cpu arguments | ||
52 | |||
53 | shmobile_smp_boot_find_mpidr: | ||
54 | ldr r8, [r5, r1, lsl #2] | ||
55 | cmp r8, r0 | ||
56 | bne shmobile_smp_boot_next | ||
57 | |||
58 | ldr r9, [r6, r1, lsl #2] | ||
59 | cmp r9, #0 | ||
60 | bne shmobile_smp_boot_found | ||
61 | |||
62 | shmobile_smp_boot_next: | ||
63 | add r1, r1, #1 | ||
64 | cmp r1, #CONFIG_NR_CPUS | ||
65 | blo shmobile_smp_boot_find_mpidr | ||
66 | |||
67 | b shmobile_smp_sleep | ||
68 | |||
69 | shmobile_smp_boot_found: | ||
70 | ldr r0, [r7, r1, lsl #2] | ||
71 | mov pc, r9 | ||
72 | ENDPROC(shmobile_smp_boot) | ||
73 | |||
74 | ENTRY(shmobile_smp_sleep) | ||
75 | wfi | ||
76 | b shmobile_smp_boot | ||
77 | ENDPROC(shmobile_smp_sleep) | ||
78 | |||
79 | .globl shmobile_smp_mpidr | ||
80 | shmobile_smp_mpidr: | ||
81 | 1: .space CONFIG_NR_CPUS * 4 | ||
82 | .globl shmobile_smp_fn | ||
83 | shmobile_smp_fn: | ||
84 | 2: .space CONFIG_NR_CPUS * 4 | ||
85 | .globl shmobile_smp_arg | ||
86 | shmobile_smp_arg: | ||
87 | 3: .space CONFIG_NR_CPUS * 4 | ||
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h index 18a76f91f4cb..7b938681e756 100644 --- a/arch/arm/mach-shmobile/include/mach/common.h +++ b/arch/arm/mach-shmobile/include/mach/common.h | |||
@@ -9,7 +9,16 @@ extern void shmobile_setup_console(void); | |||
9 | extern void shmobile_boot_vector(void); | 9 | extern void shmobile_boot_vector(void); |
10 | extern unsigned long shmobile_boot_fn; | 10 | extern unsigned long shmobile_boot_fn; |
11 | extern unsigned long shmobile_boot_arg; | 11 | extern unsigned long shmobile_boot_arg; |
12 | extern void shmobile_smp_boot(void); | ||
13 | extern void shmobile_smp_sleep(void); | ||
14 | extern void shmobile_smp_hook(unsigned int cpu, unsigned long fn, | ||
15 | unsigned long arg); | ||
12 | extern void shmobile_boot_scu(void); | 16 | extern void shmobile_boot_scu(void); |
17 | extern void shmobile_smp_scu_prepare_cpus(unsigned int max_cpus); | ||
18 | extern int shmobile_smp_scu_boot_secondary(unsigned int cpu, | ||
19 | struct task_struct *idle); | ||
20 | extern void shmobile_smp_scu_cpu_die(unsigned int cpu); | ||
21 | extern int shmobile_smp_scu_cpu_kill(unsigned int cpu); | ||
13 | struct clk; | 22 | struct clk; |
14 | extern int shmobile_clk_init(void); | 23 | extern int shmobile_clk_init(void); |
15 | extern void shmobile_handle_irq_intc(struct pt_regs *); | 24 | extern void shmobile_handle_irq_intc(struct pt_regs *); |
diff --git a/arch/arm/mach-shmobile/platsmp-scu.c b/arch/arm/mach-shmobile/platsmp-scu.c new file mode 100644 index 000000000000..c96f50160be6 --- /dev/null +++ b/arch/arm/mach-shmobile/platsmp-scu.c | |||
@@ -0,0 +1,81 @@ | |||
1 | /* | ||
2 | * SMP support for SoCs with SCU covered by mach-shmobile | ||
3 | * | ||
4 | * Copyright (C) 2013 Magnus Damm | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #include <linux/delay.h> | ||
11 | #include <linux/init.h> | ||
12 | #include <linux/io.h> | ||
13 | #include <linux/smp.h> | ||
14 | #include <asm/cacheflush.h> | ||
15 | #include <asm/smp_plat.h> | ||
16 | #include <asm/smp_scu.h> | ||
17 | #include <mach/common.h> | ||
18 | |||
19 | void __init shmobile_smp_scu_prepare_cpus(unsigned int max_cpus) | ||
20 | { | ||
21 | /* install boot code shared by all CPUs */ | ||
22 | shmobile_boot_fn = virt_to_phys(shmobile_smp_boot); | ||
23 | shmobile_boot_arg = MPIDR_HWID_BITMASK; | ||
24 | |||
25 | /* enable SCU and cache coherency on booting CPU */ | ||
26 | scu_enable(shmobile_scu_base); | ||
27 | scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL); | ||
28 | } | ||
29 | |||
30 | int shmobile_smp_scu_boot_secondary(unsigned int cpu, struct task_struct *idle) | ||
31 | { | ||
32 | /* For this particular CPU register SCU boot vector */ | ||
33 | shmobile_smp_hook(cpu, virt_to_phys(shmobile_boot_scu), | ||
34 | (unsigned long)shmobile_scu_base); | ||
35 | return 0; | ||
36 | } | ||
37 | |||
38 | #ifdef CONFIG_HOTPLUG_CPU | ||
39 | void shmobile_smp_scu_cpu_die(unsigned int cpu) | ||
40 | { | ||
41 | /* For this particular CPU deregister boot vector */ | ||
42 | shmobile_smp_hook(cpu, 0, 0); | ||
43 | |||
44 | dsb(); | ||
45 | flush_cache_all(); | ||
46 | |||
47 | /* disable cache coherency */ | ||
48 | scu_power_mode(shmobile_scu_base, SCU_PM_POWEROFF); | ||
49 | |||
50 | /* jump to shared mach-shmobile sleep / reset code */ | ||
51 | shmobile_smp_sleep(); | ||
52 | } | ||
53 | |||
54 | static int shmobile_smp_scu_psr_core_disabled(int cpu) | ||
55 | { | ||
56 | unsigned long mask = SCU_PM_POWEROFF << (cpu * 8); | ||
57 | |||
58 | if ((__raw_readl(shmobile_scu_base + 8) & mask) == mask) | ||
59 | return 1; | ||
60 | |||
61 | return 0; | ||
62 | } | ||
63 | |||
64 | int shmobile_smp_scu_cpu_kill(unsigned int cpu) | ||
65 | { | ||
66 | int k; | ||
67 | |||
68 | /* this function is running on another CPU than the offline target, | ||
69 | * here we need wait for shutdown code in platform_cpu_die() to | ||
70 | * finish before asking SoC-specific code to power off the CPU core. | ||
71 | */ | ||
72 | for (k = 0; k < 1000; k++) { | ||
73 | if (shmobile_smp_scu_psr_core_disabled(cpu)) | ||
74 | return 1; | ||
75 | |||
76 | mdelay(1); | ||
77 | } | ||
78 | |||
79 | return 0; | ||
80 | } | ||
81 | #endif | ||
diff --git a/arch/arm/mach-shmobile/platsmp.c b/arch/arm/mach-shmobile/platsmp.c index 1f958d7b0bac..d4ae616bcedb 100644 --- a/arch/arm/mach-shmobile/platsmp.c +++ b/arch/arm/mach-shmobile/platsmp.c | |||
@@ -12,6 +12,9 @@ | |||
12 | */ | 12 | */ |
13 | #include <linux/init.h> | 13 | #include <linux/init.h> |
14 | #include <linux/smp.h> | 14 | #include <linux/smp.h> |
15 | #include <asm/cacheflush.h> | ||
16 | #include <asm/smp_plat.h> | ||
17 | #include <mach/common.h> | ||
15 | 18 | ||
16 | void __init shmobile_smp_init_cpus(unsigned int ncores) | 19 | void __init shmobile_smp_init_cpus(unsigned int ncores) |
17 | { | 20 | { |
@@ -26,3 +29,18 @@ void __init shmobile_smp_init_cpus(unsigned int ncores) | |||
26 | for (i = 0; i < ncores; i++) | 29 | for (i = 0; i < ncores; i++) |
27 | set_cpu_possible(i, true); | 30 | set_cpu_possible(i, true); |
28 | } | 31 | } |
32 | |||
33 | extern unsigned long shmobile_smp_fn[]; | ||
34 | extern unsigned long shmobile_smp_arg[]; | ||
35 | extern unsigned long shmobile_smp_mpidr[]; | ||
36 | |||
37 | void shmobile_smp_hook(unsigned int cpu, unsigned long fn, unsigned long arg) | ||
38 | { | ||
39 | shmobile_smp_fn[cpu] = 0; | ||
40 | flush_cache_all(); | ||
41 | |||
42 | shmobile_smp_mpidr[cpu] = cpu_logical_map(cpu); | ||
43 | shmobile_smp_fn[cpu] = fn; | ||
44 | shmobile_smp_arg[cpu] = arg; | ||
45 | flush_cache_all(); | ||
46 | } | ||
diff --git a/arch/arm/mach-shmobile/smp-emev2.c b/arch/arm/mach-shmobile/smp-emev2.c index 78e84c582453..522de5ebb55f 100644 --- a/arch/arm/mach-shmobile/smp-emev2.c +++ b/arch/arm/mach-shmobile/smp-emev2.c | |||
@@ -34,6 +34,12 @@ | |||
34 | 34 | ||
35 | static int emev2_boot_secondary(unsigned int cpu, struct task_struct *idle) | 35 | static int emev2_boot_secondary(unsigned int cpu, struct task_struct *idle) |
36 | { | 36 | { |
37 | int ret; | ||
38 | |||
39 | ret = shmobile_smp_scu_boot_secondary(cpu, idle); | ||
40 | if (ret) | ||
41 | return ret; | ||
42 | |||
37 | arch_send_wakeup_ipi_mask(cpumask_of(cpu_logical_map(cpu))); | 43 | arch_send_wakeup_ipi_mask(cpumask_of(cpu_logical_map(cpu))); |
38 | return 0; | 44 | return 0; |
39 | } | 45 | } |
@@ -42,21 +48,16 @@ static void __init emev2_smp_prepare_cpus(unsigned int max_cpus) | |||
42 | { | 48 | { |
43 | void __iomem *smu; | 49 | void __iomem *smu; |
44 | 50 | ||
45 | /* setup EMEV2 specific SCU base, enable */ | 51 | /* Tell ROM loader about our vector (in headsmp.S) */ |
46 | shmobile_scu_base = ioremap(EMEV2_SCU_BASE, PAGE_SIZE); | ||
47 | scu_enable(shmobile_scu_base); | ||
48 | |||
49 | /* Tell ROM loader about our vector (in headsmp-scu.S, headsmp.S) */ | ||
50 | smu = ioremap(EMEV2_SMU_BASE, PAGE_SIZE); | 52 | smu = ioremap(EMEV2_SMU_BASE, PAGE_SIZE); |
51 | if (smu) { | 53 | if (smu) { |
52 | iowrite32(__pa(shmobile_boot_vector), smu + SMU_GENERAL_REG0); | 54 | iowrite32(__pa(shmobile_boot_vector), smu + SMU_GENERAL_REG0); |
53 | iounmap(smu); | 55 | iounmap(smu); |
54 | } | 56 | } |
55 | shmobile_boot_fn = virt_to_phys(shmobile_boot_scu); | ||
56 | shmobile_boot_arg = (unsigned long)shmobile_scu_base; | ||
57 | 57 | ||
58 | /* enable cache coherency on booting CPU */ | 58 | /* setup EMEV2 specific SCU bits */ |
59 | scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL); | 59 | shmobile_scu_base = ioremap(EMEV2_SCU_BASE, PAGE_SIZE); |
60 | shmobile_smp_scu_prepare_cpus(max_cpus); | ||
60 | } | 61 | } |
61 | 62 | ||
62 | struct smp_operations emev2_smp_ops __initdata = { | 63 | struct smp_operations emev2_smp_ops __initdata = { |
diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c index 42170af64cc0..0f05e9fb722f 100644 --- a/arch/arm/mach-shmobile/smp-r8a7779.c +++ b/arch/arm/mach-shmobile/smp-r8a7779.c | |||
@@ -84,33 +84,34 @@ static int r8a7779_platform_cpu_kill(unsigned int cpu) | |||
84 | static int r8a7779_boot_secondary(unsigned int cpu, struct task_struct *idle) | 84 | static int r8a7779_boot_secondary(unsigned int cpu, struct task_struct *idle) |
85 | { | 85 | { |
86 | struct r8a7779_pm_ch *ch = NULL; | 86 | struct r8a7779_pm_ch *ch = NULL; |
87 | int ret = -EIO; | 87 | unsigned int lcpu = cpu_logical_map(cpu); |
88 | int ret; | ||
88 | 89 | ||
89 | cpu = cpu_logical_map(cpu); | 90 | ret = shmobile_smp_scu_boot_secondary(cpu, idle); |
91 | if (ret) | ||
92 | return ret; | ||
90 | 93 | ||
91 | if (cpu < ARRAY_SIZE(r8a7779_ch_cpu)) | 94 | if (lcpu < ARRAY_SIZE(r8a7779_ch_cpu)) |
92 | ch = r8a7779_ch_cpu[cpu]; | 95 | ch = r8a7779_ch_cpu[lcpu]; |
93 | 96 | ||
94 | if (ch) | 97 | if (ch) |
95 | ret = r8a7779_sysc_power_up(ch); | 98 | ret = r8a7779_sysc_power_up(ch); |
99 | else | ||
100 | ret = -EIO; | ||
96 | 101 | ||
97 | return ret; | 102 | return ret; |
98 | } | 103 | } |
99 | 104 | ||
100 | static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus) | 105 | static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus) |
101 | { | 106 | { |
102 | |||
103 | /* setup r8a7779 specific SCU base */ | ||
104 | shmobile_scu_base = IOMEM(R8A7779_SCU_BASE); | ||
105 | scu_enable(shmobile_scu_base); | ||
106 | |||
107 | /* Map the reset vector (in headsmp-scu.S, headsmp.S) */ | 107 | /* Map the reset vector (in headsmp-scu.S, headsmp.S) */ |
108 | __raw_writel(__pa(shmobile_boot_vector), AVECR); | 108 | __raw_writel(__pa(shmobile_boot_vector), AVECR); |
109 | shmobile_boot_fn = virt_to_phys(shmobile_boot_scu); | 109 | shmobile_boot_fn = virt_to_phys(shmobile_boot_scu); |
110 | shmobile_boot_arg = (unsigned long)shmobile_scu_base; | 110 | shmobile_boot_arg = (unsigned long)shmobile_scu_base; |
111 | 111 | ||
112 | /* enable cache coherency on booting CPU */ | 112 | /* setup r8a7779 specific SCU bits */ |
113 | scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL); | 113 | shmobile_scu_base = IOMEM(R8A7779_SCU_BASE); |
114 | shmobile_smp_scu_prepare_cpus(max_cpus); | ||
114 | 115 | ||
115 | r8a7779_pm_init(); | 116 | r8a7779_pm_init(); |
116 | 117 | ||
@@ -121,47 +122,14 @@ static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus) | |||
121 | } | 122 | } |
122 | 123 | ||
123 | #ifdef CONFIG_HOTPLUG_CPU | 124 | #ifdef CONFIG_HOTPLUG_CPU |
124 | static int r8a7779_scu_psr_core_disabled(int cpu) | ||
125 | { | ||
126 | unsigned long mask = 3 << (cpu * 8); | ||
127 | |||
128 | if ((__raw_readl(shmobile_scu_base + 8) & mask) == mask) | ||
129 | return 1; | ||
130 | |||
131 | return 0; | ||
132 | } | ||
133 | |||
134 | static int r8a7779_cpu_kill(unsigned int cpu) | 125 | static int r8a7779_cpu_kill(unsigned int cpu) |
135 | { | 126 | { |
136 | int k; | 127 | if (shmobile_smp_scu_cpu_kill(cpu)) |
137 | 128 | return r8a7779_platform_cpu_kill(cpu); | |
138 | /* this function is running on another CPU than the offline target, | ||
139 | * here we need wait for shutdown code in platform_cpu_die() to | ||
140 | * finish before asking SoC-specific code to power off the CPU core. | ||
141 | */ | ||
142 | for (k = 0; k < 1000; k++) { | ||
143 | if (r8a7779_scu_psr_core_disabled(cpu)) | ||
144 | return r8a7779_platform_cpu_kill(cpu); | ||
145 | |||
146 | mdelay(1); | ||
147 | } | ||
148 | 129 | ||
149 | return 0; | 130 | return 0; |
150 | } | 131 | } |
151 | 132 | ||
152 | static void r8a7779_cpu_die(unsigned int cpu) | ||
153 | { | ||
154 | dsb(); | ||
155 | flush_cache_all(); | ||
156 | |||
157 | /* disable cache coherency */ | ||
158 | scu_power_mode(shmobile_scu_base, SCU_PM_POWEROFF); | ||
159 | |||
160 | /* Endless loop until power off from r8a7779_cpu_kill() */ | ||
161 | while (1) | ||
162 | cpu_do_idle(); | ||
163 | } | ||
164 | |||
165 | static int r8a7779_cpu_disable(unsigned int cpu) | 133 | static int r8a7779_cpu_disable(unsigned int cpu) |
166 | { | 134 | { |
167 | /* only CPU1->3 have power domains, do not allow hotplug of CPU0 */ | 135 | /* only CPU1->3 have power domains, do not allow hotplug of CPU0 */ |
@@ -173,8 +141,8 @@ struct smp_operations r8a7779_smp_ops __initdata = { | |||
173 | .smp_prepare_cpus = r8a7779_smp_prepare_cpus, | 141 | .smp_prepare_cpus = r8a7779_smp_prepare_cpus, |
174 | .smp_boot_secondary = r8a7779_boot_secondary, | 142 | .smp_boot_secondary = r8a7779_boot_secondary, |
175 | #ifdef CONFIG_HOTPLUG_CPU | 143 | #ifdef CONFIG_HOTPLUG_CPU |
176 | .cpu_kill = r8a7779_cpu_kill, | ||
177 | .cpu_die = r8a7779_cpu_die, | ||
178 | .cpu_disable = r8a7779_cpu_disable, | 144 | .cpu_disable = r8a7779_cpu_disable, |
145 | .cpu_die = shmobile_smp_scu_cpu_die, | ||
146 | .cpu_kill = r8a7779_cpu_kill, | ||
179 | #endif | 147 | #endif |
180 | }; | 148 | }; |
diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c index d2b89f7e5daf..0baa24443793 100644 --- a/arch/arm/mach-shmobile/smp-sh73a0.c +++ b/arch/arm/mach-shmobile/smp-sh73a0.c | |||
@@ -20,14 +20,11 @@ | |||
20 | #include <linux/kernel.h> | 20 | #include <linux/kernel.h> |
21 | #include <linux/init.h> | 21 | #include <linux/init.h> |
22 | #include <linux/smp.h> | 22 | #include <linux/smp.h> |
23 | #include <linux/spinlock.h> | ||
24 | #include <linux/io.h> | 23 | #include <linux/io.h> |
25 | #include <linux/delay.h> | 24 | #include <linux/delay.h> |
26 | #include <mach/common.h> | 25 | #include <mach/common.h> |
27 | #include <asm/cacheflush.h> | ||
28 | #include <asm/smp_plat.h> | ||
29 | #include <mach/sh73a0.h> | 26 | #include <mach/sh73a0.h> |
30 | #include <asm/smp_scu.h> | 27 | #include <asm/smp_plat.h> |
31 | #include <asm/smp_twd.h> | 28 | #include <asm/smp_twd.h> |
32 | 29 | ||
33 | #define WUPCR IOMEM(0xe6151010) | 30 | #define WUPCR IOMEM(0xe6151010) |
@@ -36,8 +33,6 @@ | |||
36 | #define SBAR IOMEM(0xe6180020) | 33 | #define SBAR IOMEM(0xe6180020) |
37 | #define APARMBAREA IOMEM(0xe6f10020) | 34 | #define APARMBAREA IOMEM(0xe6f10020) |
38 | 35 | ||
39 | #define PSTR_SHUTDOWN_MODE 3 | ||
40 | |||
41 | #define SH73A0_SCU_BASE 0xf0000000 | 36 | #define SH73A0_SCU_BASE 0xf0000000 |
42 | 37 | ||
43 | #ifdef CONFIG_HAVE_ARM_TWD | 38 | #ifdef CONFIG_HAVE_ARM_TWD |
@@ -50,63 +45,33 @@ void __init sh73a0_register_twd(void) | |||
50 | 45 | ||
51 | static int sh73a0_boot_secondary(unsigned int cpu, struct task_struct *idle) | 46 | static int sh73a0_boot_secondary(unsigned int cpu, struct task_struct *idle) |
52 | { | 47 | { |
53 | cpu = cpu_logical_map(cpu); | 48 | unsigned int lcpu = cpu_logical_map(cpu); |
49 | int ret; | ||
54 | 50 | ||
55 | if (((__raw_readl(PSTR) >> (4 * cpu)) & 3) == 3) | 51 | ret = shmobile_smp_scu_boot_secondary(cpu, idle); |
56 | __raw_writel(1 << cpu, WUPCR); /* wake up */ | 52 | if (ret) |
53 | return ret; | ||
54 | |||
55 | if (((__raw_readl(PSTR) >> (4 * lcpu)) & 3) == 3) | ||
56 | __raw_writel(1 << lcpu, WUPCR); /* wake up */ | ||
57 | else | 57 | else |
58 | __raw_writel(1 << cpu, SRESCR); /* reset */ | 58 | __raw_writel(1 << lcpu, SRESCR); /* reset */ |
59 | 59 | ||
60 | return 0; | 60 | return 0; |
61 | } | 61 | } |
62 | 62 | ||
63 | static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus) | 63 | static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus) |
64 | { | 64 | { |
65 | /* setup sh73a0 specific SCU base */ | 65 | /* Map the reset vector (in headsmp.S) */ |
66 | shmobile_scu_base = IOMEM(SH73A0_SCU_BASE); | ||
67 | scu_enable(shmobile_scu_base); | ||
68 | |||
69 | /* Map the reset vector (in headsmp-scu.S, headsmp.S) */ | ||
70 | __raw_writel(0, APARMBAREA); /* 4k */ | 66 | __raw_writel(0, APARMBAREA); /* 4k */ |
71 | __raw_writel(__pa(shmobile_boot_vector), SBAR); | 67 | __raw_writel(__pa(shmobile_boot_vector), SBAR); |
72 | shmobile_boot_fn = virt_to_phys(shmobile_boot_scu); | ||
73 | shmobile_boot_arg = (unsigned long)shmobile_scu_base; | ||
74 | 68 | ||
75 | /* enable cache coherency on booting CPU */ | 69 | /* setup sh73a0 specific SCU bits */ |
76 | scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL); | 70 | shmobile_scu_base = IOMEM(SH73A0_SCU_BASE); |
71 | shmobile_smp_scu_prepare_cpus(max_cpus); | ||
77 | } | 72 | } |
78 | 73 | ||
79 | #ifdef CONFIG_HOTPLUG_CPU | 74 | #ifdef CONFIG_HOTPLUG_CPU |
80 | static int sh73a0_cpu_kill(unsigned int cpu) | ||
81 | { | ||
82 | |||
83 | int k; | ||
84 | u32 pstr; | ||
85 | |||
86 | /* | ||
87 | * wait until the power status register confirms the shutdown of the | ||
88 | * offline target | ||
89 | */ | ||
90 | for (k = 0; k < 1000; k++) { | ||
91 | pstr = (__raw_readl(PSTR) >> (4 * cpu)) & 3; | ||
92 | if (pstr == PSTR_SHUTDOWN_MODE) | ||
93 | return 1; | ||
94 | |||
95 | mdelay(1); | ||
96 | } | ||
97 | |||
98 | return 0; | ||
99 | } | ||
100 | |||
101 | static void sh73a0_cpu_die(unsigned int cpu) | ||
102 | { | ||
103 | /* Set power off mode. This takes the CPU out of the MP cluster */ | ||
104 | scu_power_mode(shmobile_scu_base, SCU_PM_POWEROFF); | ||
105 | |||
106 | /* Enter shutdown mode */ | ||
107 | cpu_do_idle(); | ||
108 | } | ||
109 | |||
110 | static int sh73a0_cpu_disable(unsigned int cpu) | 75 | static int sh73a0_cpu_disable(unsigned int cpu) |
111 | { | 76 | { |
112 | return 0; /* CPU0 and CPU1 supported */ | 77 | return 0; /* CPU0 and CPU1 supported */ |
@@ -117,8 +82,8 @@ struct smp_operations sh73a0_smp_ops __initdata = { | |||
117 | .smp_prepare_cpus = sh73a0_smp_prepare_cpus, | 82 | .smp_prepare_cpus = sh73a0_smp_prepare_cpus, |
118 | .smp_boot_secondary = sh73a0_boot_secondary, | 83 | .smp_boot_secondary = sh73a0_boot_secondary, |
119 | #ifdef CONFIG_HOTPLUG_CPU | 84 | #ifdef CONFIG_HOTPLUG_CPU |
120 | .cpu_kill = sh73a0_cpu_kill, | ||
121 | .cpu_die = sh73a0_cpu_die, | ||
122 | .cpu_disable = sh73a0_cpu_disable, | 85 | .cpu_disable = sh73a0_cpu_disable, |
86 | .cpu_die = shmobile_smp_scu_cpu_die, | ||
87 | .cpu_kill = shmobile_smp_scu_cpu_kill, | ||
123 | #endif | 88 | #endif |
124 | }; | 89 | }; |