aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/Kconfig1
-rw-r--r--arch/arm/mach-omap1/timer.c3
-rw-r--r--arch/arm/mach-omap2/clock2420_data.c39
-rw-r--r--arch/arm/mach-omap2/clock2430_data.c39
-rw-r--r--arch/arm/mach-omap2/clock3xxx_data.c26
-rw-r--r--arch/arm/mach-omap2/clock44xx_data.c34
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c8
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c10
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c6
-rw-r--r--arch/arm/mach-omap2/timer.c82
-rw-r--r--arch/arm/mach-picoxcell/Makefile1
-rw-r--r--arch/arm/mach-picoxcell/common.c3
-rw-r--r--arch/arm/mach-picoxcell/common.h2
-rw-r--r--arch/arm/mach-picoxcell/time.c121
-rw-r--r--arch/arm/plat-omap/dmtimer.c111
-rw-r--r--arch/arm/plat-omap/include/plat/dmtimer.h22
16 files changed, 122 insertions, 386 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 139212f38ad5..5dbb9562742c 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -663,6 +663,7 @@ config ARCH_PICOXCELL
663 select ARM_VIC 663 select ARM_VIC
664 select CPU_V6K 664 select CPU_V6K
665 select DW_APB_TIMER 665 select DW_APB_TIMER
666 select DW_APB_TIMER_OF
666 select GENERIC_CLOCKEVENTS 667 select GENERIC_CLOCKEVENTS
667 select GENERIC_GPIO 668 select GENERIC_GPIO
668 select HAVE_TCM 669 select HAVE_TCM
diff --git a/arch/arm/mach-omap1/timer.c b/arch/arm/mach-omap1/timer.c
index 64c65bcb2d67..aa81593db1af 100644
--- a/arch/arm/mach-omap1/timer.c
+++ b/arch/arm/mach-omap1/timer.c
@@ -140,7 +140,8 @@ static int __init omap1_dm_timer_init(void)
140 } 140 }
141 141
142 pdata->set_timer_src = omap1_dm_timer_set_src; 142 pdata->set_timer_src = omap1_dm_timer_set_src;
143 pdata->needs_manual_reset = 1; 143 pdata->timer_capability = OMAP_TIMER_ALWON |
144 OMAP_TIMER_NEEDS_RESET;
144 145
145 ret = platform_device_add_data(pdev, pdata, sizeof(*pdata)); 146 ret = platform_device_add_data(pdev, pdata, sizeof(*pdata));
146 if (ret) { 147 if (ret) {
diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c
index 7e39015357b1..002745181ad6 100644
--- a/arch/arm/mach-omap2/clock2420_data.c
+++ b/arch/arm/mach-omap2/clock2420_data.c
@@ -1897,42 +1897,9 @@ static struct omap_clk omap2420_clks[] = {
1897 CLK(NULL, "pka_ick", &pka_ick, CK_242X), 1897 CLK(NULL, "pka_ick", &pka_ick, CK_242X),
1898 CLK(NULL, "usb_fck", &usb_fck, CK_242X), 1898 CLK(NULL, "usb_fck", &usb_fck, CK_242X),
1899 CLK("musb-hdrc", "fck", &osc_ck, CK_242X), 1899 CLK("musb-hdrc", "fck", &osc_ck, CK_242X),
1900 CLK("omap_timer.1", "32k_ck", &func_32k_ck, CK_243X), 1900 CLK(NULL, "timer_32k_ck", &func_32k_ck, CK_243X),
1901 CLK("omap_timer.2", "32k_ck", &func_32k_ck, CK_243X), 1901 CLK(NULL, "timer_sys_ck", &sys_ck, CK_243X),
1902 CLK("omap_timer.3", "32k_ck", &func_32k_ck, CK_243X), 1902 CLK(NULL, "timer_ext_ck", &alt_ck, CK_243X),
1903 CLK("omap_timer.4", "32k_ck", &func_32k_ck, CK_243X),
1904 CLK("omap_timer.5", "32k_ck", &func_32k_ck, CK_243X),
1905 CLK("omap_timer.6", "32k_ck", &func_32k_ck, CK_243X),
1906 CLK("omap_timer.7", "32k_ck", &func_32k_ck, CK_243X),
1907 CLK("omap_timer.8", "32k_ck", &func_32k_ck, CK_243X),
1908 CLK("omap_timer.9", "32k_ck", &func_32k_ck, CK_243X),
1909 CLK("omap_timer.10", "32k_ck", &func_32k_ck, CK_243X),
1910 CLK("omap_timer.11", "32k_ck", &func_32k_ck, CK_243X),
1911 CLK("omap_timer.12", "32k_ck", &func_32k_ck, CK_243X),
1912 CLK("omap_timer.1", "sys_ck", &sys_ck, CK_243X),
1913 CLK("omap_timer.2", "sys_ck", &sys_ck, CK_243X),
1914 CLK("omap_timer.3", "sys_ck", &sys_ck, CK_243X),
1915 CLK("omap_timer.4", "sys_ck", &sys_ck, CK_243X),
1916 CLK("omap_timer.5", "sys_ck", &sys_ck, CK_243X),
1917 CLK("omap_timer.6", "sys_ck", &sys_ck, CK_243X),
1918 CLK("omap_timer.7", "sys_ck", &sys_ck, CK_243X),
1919 CLK("omap_timer.8", "sys_ck", &sys_ck, CK_243X),
1920 CLK("omap_timer.9", "sys_ck", &sys_ck, CK_243X),
1921 CLK("omap_timer.10", "sys_ck", &sys_ck, CK_243X),
1922 CLK("omap_timer.11", "sys_ck", &sys_ck, CK_243X),
1923 CLK("omap_timer.12", "sys_ck", &sys_ck, CK_243X),
1924 CLK("omap_timer.1", "alt_ck", &alt_ck, CK_243X),
1925 CLK("omap_timer.2", "alt_ck", &alt_ck, CK_243X),
1926 CLK("omap_timer.3", "alt_ck", &alt_ck, CK_243X),
1927 CLK("omap_timer.4", "alt_ck", &alt_ck, CK_243X),
1928 CLK("omap_timer.5", "alt_ck", &alt_ck, CK_243X),
1929 CLK("omap_timer.6", "alt_ck", &alt_ck, CK_243X),
1930 CLK("omap_timer.7", "alt_ck", &alt_ck, CK_243X),
1931 CLK("omap_timer.8", "alt_ck", &alt_ck, CK_243X),
1932 CLK("omap_timer.9", "alt_ck", &alt_ck, CK_243X),
1933 CLK("omap_timer.10", "alt_ck", &alt_ck, CK_243X),
1934 CLK("omap_timer.11", "alt_ck", &alt_ck, CK_243X),
1935 CLK("omap_timer.12", "alt_ck", &alt_ck, CK_243X),
1936}; 1903};
1937 1904
1938/* 1905/*
diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c
index 90a08c3b12ac..cacabb070e22 100644
--- a/arch/arm/mach-omap2/clock2430_data.c
+++ b/arch/arm/mach-omap2/clock2430_data.c
@@ -1990,42 +1990,9 @@ static struct omap_clk omap2430_clks[] = {
1990 CLK(NULL, "mdm_intc_ick", &mdm_intc_ick, CK_243X), 1990 CLK(NULL, "mdm_intc_ick", &mdm_intc_ick, CK_243X),
1991 CLK("omap_hsmmc.0", "mmchsdb_fck", &mmchsdb1_fck, CK_243X), 1991 CLK("omap_hsmmc.0", "mmchsdb_fck", &mmchsdb1_fck, CK_243X),
1992 CLK("omap_hsmmc.1", "mmchsdb_fck", &mmchsdb2_fck, CK_243X), 1992 CLK("omap_hsmmc.1", "mmchsdb_fck", &mmchsdb2_fck, CK_243X),
1993 CLK("omap_timer.1", "32k_ck", &func_32k_ck, CK_243X), 1993 CLK(NULL, "timer_32k_ck", &func_32k_ck, CK_243X),
1994 CLK("omap_timer.2", "32k_ck", &func_32k_ck, CK_243X), 1994 CLK(NULL, "timer_sys_ck", &sys_ck, CK_243X),
1995 CLK("omap_timer.3", "32k_ck", &func_32k_ck, CK_243X), 1995 CLK(NULL, "timer_ext_ck", &alt_ck, CK_243X),
1996 CLK("omap_timer.4", "32k_ck", &func_32k_ck, CK_243X),
1997 CLK("omap_timer.5", "32k_ck", &func_32k_ck, CK_243X),
1998 CLK("omap_timer.6", "32k_ck", &func_32k_ck, CK_243X),
1999 CLK("omap_timer.7", "32k_ck", &func_32k_ck, CK_243X),
2000 CLK("omap_timer.8", "32k_ck", &func_32k_ck, CK_243X),
2001 CLK("omap_timer.9", "32k_ck", &func_32k_ck, CK_243X),
2002 CLK("omap_timer.10", "32k_ck", &func_32k_ck, CK_243X),
2003 CLK("omap_timer.11", "32k_ck", &func_32k_ck, CK_243X),
2004 CLK("omap_timer.12", "32k_ck", &func_32k_ck, CK_243X),
2005 CLK("omap_timer.1", "sys_ck", &sys_ck, CK_243X),
2006 CLK("omap_timer.2", "sys_ck", &sys_ck, CK_243X),
2007 CLK("omap_timer.3", "sys_ck", &sys_ck, CK_243X),
2008 CLK("omap_timer.4", "sys_ck", &sys_ck, CK_243X),
2009 CLK("omap_timer.5", "sys_ck", &sys_ck, CK_243X),
2010 CLK("omap_timer.6", "sys_ck", &sys_ck, CK_243X),
2011 CLK("omap_timer.7", "sys_ck", &sys_ck, CK_243X),
2012 CLK("omap_timer.8", "sys_ck", &sys_ck, CK_243X),
2013 CLK("omap_timer.9", "sys_ck", &sys_ck, CK_243X),
2014 CLK("omap_timer.10", "sys_ck", &sys_ck, CK_243X),
2015 CLK("omap_timer.11", "sys_ck", &sys_ck, CK_243X),
2016 CLK("omap_timer.12", "sys_ck", &sys_ck, CK_243X),
2017 CLK("omap_timer.1", "alt_ck", &alt_ck, CK_243X),
2018 CLK("omap_timer.2", "alt_ck", &alt_ck, CK_243X),
2019 CLK("omap_timer.3", "alt_ck", &alt_ck, CK_243X),
2020 CLK("omap_timer.4", "alt_ck", &alt_ck, CK_243X),
2021 CLK("omap_timer.5", "alt_ck", &alt_ck, CK_243X),
2022 CLK("omap_timer.6", "alt_ck", &alt_ck, CK_243X),
2023 CLK("omap_timer.7", "alt_ck", &alt_ck, CK_243X),
2024 CLK("omap_timer.8", "alt_ck", &alt_ck, CK_243X),
2025 CLK("omap_timer.9", "alt_ck", &alt_ck, CK_243X),
2026 CLK("omap_timer.10", "alt_ck", &alt_ck, CK_243X),
2027 CLK("omap_timer.11", "alt_ck", &alt_ck, CK_243X),
2028 CLK("omap_timer.12", "alt_ck", &alt_ck, CK_243X),
2029}; 1996};
2030 1997
2031/* 1998/*
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index 049061778a85..51f7430f6d3f 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3476,30 +3476,8 @@ static struct omap_clk omap3xxx_clks[] = {
3476 CLK(NULL, "hsotgusb_fck", &hsotgusb_fck_am35xx, CK_AM35XX), 3476 CLK(NULL, "hsotgusb_fck", &hsotgusb_fck_am35xx, CK_AM35XX),
3477 CLK(NULL, "hecc_ck", &hecc_ck, CK_AM35XX), 3477 CLK(NULL, "hecc_ck", &hecc_ck, CK_AM35XX),
3478 CLK(NULL, "uart4_ick", &uart4_ick_am35xx, CK_AM35XX), 3478 CLK(NULL, "uart4_ick", &uart4_ick_am35xx, CK_AM35XX),
3479 CLK("omap_timer.1", "32k_ck", &omap_32k_fck, CK_3XXX), 3479 CLK(NULL, "timer_32k_ck", &omap_32k_fck, CK_3XXX),
3480 CLK("omap_timer.2", "32k_ck", &omap_32k_fck, CK_3XXX), 3480 CLK(NULL, "timer_sys_ck", &sys_ck, CK_3XXX),
3481 CLK("omap_timer.3", "32k_ck", &omap_32k_fck, CK_3XXX),
3482 CLK("omap_timer.4", "32k_ck", &omap_32k_fck, CK_3XXX),
3483 CLK("omap_timer.5", "32k_ck", &omap_32k_fck, CK_3XXX),
3484 CLK("omap_timer.6", "32k_ck", &omap_32k_fck, CK_3XXX),
3485 CLK("omap_timer.7", "32k_ck", &omap_32k_fck, CK_3XXX),
3486 CLK("omap_timer.8", "32k_ck", &omap_32k_fck, CK_3XXX),
3487 CLK("omap_timer.9", "32k_ck", &omap_32k_fck, CK_3XXX),
3488 CLK("omap_timer.10", "32k_ck", &omap_32k_fck, CK_3XXX),
3489 CLK("omap_timer.11", "32k_ck", &omap_32k_fck, CK_3XXX),
3490 CLK("omap_timer.12", "32k_ck", &omap_32k_fck, CK_3XXX),
3491 CLK("omap_timer.1", "sys_ck", &sys_ck, CK_3XXX),
3492 CLK("omap_timer.2", "sys_ck", &sys_ck, CK_3XXX),
3493 CLK("omap_timer.3", "sys_ck", &sys_ck, CK_3XXX),
3494 CLK("omap_timer.4", "sys_ck", &sys_ck, CK_3XXX),
3495 CLK("omap_timer.5", "sys_ck", &sys_ck, CK_3XXX),
3496 CLK("omap_timer.6", "sys_ck", &sys_ck, CK_3XXX),
3497 CLK("omap_timer.7", "sys_ck", &sys_ck, CK_3XXX),
3498 CLK("omap_timer.8", "sys_ck", &sys_ck, CK_3XXX),
3499 CLK("omap_timer.9", "sys_ck", &sys_ck, CK_3XXX),
3500 CLK("omap_timer.10", "sys_ck", &sys_ck, CK_3XXX),
3501 CLK("omap_timer.11", "sys_ck", &sys_ck, CK_3XXX),
3502 CLK("omap_timer.12", "sys_ck", &sys_ck, CK_3XXX),
3503}; 3481};
3504 3482
3505 3483
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index ba6f9a0a43e9..de53b7014b80 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -3385,28 +3385,18 @@ static struct omap_clk omap44xx_clks[] = {
3385 CLK("usbhs_omap", "usbhost_ick", &dummy_ck, CK_443X), 3385 CLK("usbhs_omap", "usbhost_ick", &dummy_ck, CK_443X),
3386 CLK("usbhs_omap", "usbtll_fck", &dummy_ck, CK_443X), 3386 CLK("usbhs_omap", "usbtll_fck", &dummy_ck, CK_443X),
3387 CLK("omap_wdt", "ick", &dummy_ck, CK_443X), 3387 CLK("omap_wdt", "ick", &dummy_ck, CK_443X),
3388 CLK("omap_timer.1", "32k_ck", &sys_32k_ck, CK_443X), 3388 CLK(NULL, "timer_32k_ck", &sys_32k_ck, CK_443X),
3389 CLK("omap_timer.2", "32k_ck", &sys_32k_ck, CK_443X), 3389 CLK("omap_timer.1", "timer_sys_ck", &sys_clkin_ck, CK_443X),
3390 CLK("omap_timer.3", "32k_ck", &sys_32k_ck, CK_443X), 3390 CLK("omap_timer.2", "timer_sys_ck", &sys_clkin_ck, CK_443X),
3391 CLK("omap_timer.4", "32k_ck", &sys_32k_ck, CK_443X), 3391 CLK("omap_timer.3", "timer_sys_ck", &sys_clkin_ck, CK_443X),
3392 CLK("omap_timer.5", "32k_ck", &sys_32k_ck, CK_443X), 3392 CLK("omap_timer.4", "timer_sys_ck", &sys_clkin_ck, CK_443X),
3393 CLK("omap_timer.6", "32k_ck", &sys_32k_ck, CK_443X), 3393 CLK("omap_timer.9", "timer_sys_ck", &sys_clkin_ck, CK_443X),
3394 CLK("omap_timer.7", "32k_ck", &sys_32k_ck, CK_443X), 3394 CLK("omap_timer.10", "timer_sys_ck", &sys_clkin_ck, CK_443X),
3395 CLK("omap_timer.8", "32k_ck", &sys_32k_ck, CK_443X), 3395 CLK("omap_timer.11", "timer_sys_ck", &sys_clkin_ck, CK_443X),
3396 CLK("omap_timer.9", "32k_ck", &sys_32k_ck, CK_443X), 3396 CLK("omap_timer.5", "timer_sys_ck", &syc_clk_div_ck, CK_443X),
3397 CLK("omap_timer.10", "32k_ck", &sys_32k_ck, CK_443X), 3397 CLK("omap_timer.6", "timer_sys_ck", &syc_clk_div_ck, CK_443X),
3398 CLK("omap_timer.11", "32k_ck", &sys_32k_ck, CK_443X), 3398 CLK("omap_timer.7", "timer_sys_ck", &syc_clk_div_ck, CK_443X),
3399 CLK("omap_timer.1", "sys_ck", &sys_clkin_ck, CK_443X), 3399 CLK("omap_timer.8", "timer_sys_ck", &syc_clk_div_ck, CK_443X),
3400 CLK("omap_timer.2", "sys_ck", &sys_clkin_ck, CK_443X),
3401 CLK("omap_timer.3", "sys_ck", &sys_clkin_ck, CK_443X),
3402 CLK("omap_timer.4", "sys_ck", &sys_clkin_ck, CK_443X),
3403 CLK("omap_timer.9", "sys_ck", &sys_clkin_ck, CK_443X),
3404 CLK("omap_timer.10", "sys_ck", &sys_clkin_ck, CK_443X),
3405 CLK("omap_timer.11", "sys_ck", &sys_clkin_ck, CK_443X),
3406 CLK("omap_timer.5", "sys_ck", &syc_clk_div_ck, CK_443X),
3407 CLK("omap_timer.6", "sys_ck", &syc_clk_div_ck, CK_443X),
3408 CLK("omap_timer.7", "sys_ck", &syc_clk_div_ck, CK_443X),
3409 CLK("omap_timer.8", "sys_ck", &syc_clk_div_ck, CK_443X),
3410}; 3400};
3411 3401
3412int __init omap4xxx_clk_init(void) 3402int __init omap4xxx_clk_init(void)
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
index 83eafd96ecaa..afad69c6ba6e 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
@@ -68,7 +68,6 @@ static struct omap_hwmod_class_sysconfig omap2xxx_timer_sysc = {
68struct omap_hwmod_class omap2xxx_timer_hwmod_class = { 68struct omap_hwmod_class omap2xxx_timer_hwmod_class = {
69 .name = "timer", 69 .name = "timer",
70 .sysc = &omap2xxx_timer_sysc, 70 .sysc = &omap2xxx_timer_sysc,
71 .rev = OMAP_TIMER_IP_VERSION_1,
72}; 71};
73 72
74/* 73/*
@@ -257,7 +256,6 @@ struct omap_hwmod omap2xxx_timer2_hwmod = {
257 .idlest_idle_bit = OMAP24XX_ST_GPT2_SHIFT, 256 .idlest_idle_bit = OMAP24XX_ST_GPT2_SHIFT,
258 }, 257 },
259 }, 258 },
260 .dev_attr = &capability_alwon_dev_attr,
261 .class = &omap2xxx_timer_hwmod_class, 259 .class = &omap2xxx_timer_hwmod_class,
262}; 260};
263 261
@@ -276,7 +274,6 @@ struct omap_hwmod omap2xxx_timer3_hwmod = {
276 .idlest_idle_bit = OMAP24XX_ST_GPT3_SHIFT, 274 .idlest_idle_bit = OMAP24XX_ST_GPT3_SHIFT,
277 }, 275 },
278 }, 276 },
279 .dev_attr = &capability_alwon_dev_attr,
280 .class = &omap2xxx_timer_hwmod_class, 277 .class = &omap2xxx_timer_hwmod_class,
281}; 278};
282 279
@@ -295,7 +292,6 @@ struct omap_hwmod omap2xxx_timer4_hwmod = {
295 .idlest_idle_bit = OMAP24XX_ST_GPT4_SHIFT, 292 .idlest_idle_bit = OMAP24XX_ST_GPT4_SHIFT,
296 }, 293 },
297 }, 294 },
298 .dev_attr = &capability_alwon_dev_attr,
299 .class = &omap2xxx_timer_hwmod_class, 295 .class = &omap2xxx_timer_hwmod_class,
300}; 296};
301 297
@@ -314,7 +310,6 @@ struct omap_hwmod omap2xxx_timer5_hwmod = {
314 .idlest_idle_bit = OMAP24XX_ST_GPT5_SHIFT, 310 .idlest_idle_bit = OMAP24XX_ST_GPT5_SHIFT,
315 }, 311 },
316 }, 312 },
317 .dev_attr = &capability_alwon_dev_attr,
318 .class = &omap2xxx_timer_hwmod_class, 313 .class = &omap2xxx_timer_hwmod_class,
319}; 314};
320 315
@@ -333,7 +328,6 @@ struct omap_hwmod omap2xxx_timer6_hwmod = {
333 .idlest_idle_bit = OMAP24XX_ST_GPT6_SHIFT, 328 .idlest_idle_bit = OMAP24XX_ST_GPT6_SHIFT,
334 }, 329 },
335 }, 330 },
336 .dev_attr = &capability_alwon_dev_attr,
337 .class = &omap2xxx_timer_hwmod_class, 331 .class = &omap2xxx_timer_hwmod_class,
338}; 332};
339 333
@@ -352,7 +346,6 @@ struct omap_hwmod omap2xxx_timer7_hwmod = {
352 .idlest_idle_bit = OMAP24XX_ST_GPT7_SHIFT, 346 .idlest_idle_bit = OMAP24XX_ST_GPT7_SHIFT,
353 }, 347 },
354 }, 348 },
355 .dev_attr = &capability_alwon_dev_attr,
356 .class = &omap2xxx_timer_hwmod_class, 349 .class = &omap2xxx_timer_hwmod_class,
357}; 350};
358 351
@@ -371,7 +364,6 @@ struct omap_hwmod omap2xxx_timer8_hwmod = {
371 .idlest_idle_bit = OMAP24XX_ST_GPT8_SHIFT, 364 .idlest_idle_bit = OMAP24XX_ST_GPT8_SHIFT,
372 }, 365 },
373 }, 366 },
374 .dev_attr = &capability_alwon_dev_attr,
375 .class = &omap2xxx_timer_hwmod_class, 367 .class = &omap2xxx_timer_hwmod_class,
376}; 368};
377 369
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 892c7c740976..cdb9637aab19 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -129,7 +129,6 @@ static struct omap_hwmod_class_sysconfig omap3xxx_timer_1ms_sysc = {
129static struct omap_hwmod_class omap3xxx_timer_1ms_hwmod_class = { 129static struct omap_hwmod_class omap3xxx_timer_1ms_hwmod_class = {
130 .name = "timer", 130 .name = "timer",
131 .sysc = &omap3xxx_timer_1ms_sysc, 131 .sysc = &omap3xxx_timer_1ms_sysc,
132 .rev = OMAP_TIMER_IP_VERSION_1,
133}; 132};
134 133
135static struct omap_hwmod_class_sysconfig omap3xxx_timer_sysc = { 134static struct omap_hwmod_class_sysconfig omap3xxx_timer_sysc = {
@@ -145,12 +144,11 @@ static struct omap_hwmod_class_sysconfig omap3xxx_timer_sysc = {
145static struct omap_hwmod_class omap3xxx_timer_hwmod_class = { 144static struct omap_hwmod_class omap3xxx_timer_hwmod_class = {
146 .name = "timer", 145 .name = "timer",
147 .sysc = &omap3xxx_timer_sysc, 146 .sysc = &omap3xxx_timer_sysc,
148 .rev = OMAP_TIMER_IP_VERSION_1,
149}; 147};
150 148
151/* secure timers dev attribute */ 149/* secure timers dev attribute */
152static struct omap_timer_capability_dev_attr capability_secure_dev_attr = { 150static struct omap_timer_capability_dev_attr capability_secure_dev_attr = {
153 .timer_capability = OMAP_TIMER_SECURE, 151 .timer_capability = OMAP_TIMER_ALWON | OMAP_TIMER_SECURE,
154}; 152};
155 153
156/* always-on timers dev attribute */ 154/* always-on timers dev attribute */
@@ -195,7 +193,6 @@ static struct omap_hwmod omap3xxx_timer2_hwmod = {
195 .idlest_idle_bit = OMAP3430_ST_GPT2_SHIFT, 193 .idlest_idle_bit = OMAP3430_ST_GPT2_SHIFT,
196 }, 194 },
197 }, 195 },
198 .dev_attr = &capability_alwon_dev_attr,
199 .class = &omap3xxx_timer_1ms_hwmod_class, 196 .class = &omap3xxx_timer_1ms_hwmod_class,
200}; 197};
201 198
@@ -213,7 +210,6 @@ static struct omap_hwmod omap3xxx_timer3_hwmod = {
213 .idlest_idle_bit = OMAP3430_ST_GPT3_SHIFT, 210 .idlest_idle_bit = OMAP3430_ST_GPT3_SHIFT,
214 }, 211 },
215 }, 212 },
216 .dev_attr = &capability_alwon_dev_attr,
217 .class = &omap3xxx_timer_hwmod_class, 213 .class = &omap3xxx_timer_hwmod_class,
218}; 214};
219 215
@@ -231,7 +227,6 @@ static struct omap_hwmod omap3xxx_timer4_hwmod = {
231 .idlest_idle_bit = OMAP3430_ST_GPT4_SHIFT, 227 .idlest_idle_bit = OMAP3430_ST_GPT4_SHIFT,
232 }, 228 },
233 }, 229 },
234 .dev_attr = &capability_alwon_dev_attr,
235 .class = &omap3xxx_timer_hwmod_class, 230 .class = &omap3xxx_timer_hwmod_class,
236}; 231};
237 232
@@ -249,7 +244,6 @@ static struct omap_hwmod omap3xxx_timer5_hwmod = {
249 .idlest_idle_bit = OMAP3430_ST_GPT5_SHIFT, 244 .idlest_idle_bit = OMAP3430_ST_GPT5_SHIFT,
250 }, 245 },
251 }, 246 },
252 .dev_attr = &capability_alwon_dev_attr,
253 .class = &omap3xxx_timer_hwmod_class, 247 .class = &omap3xxx_timer_hwmod_class,
254}; 248};
255 249
@@ -267,7 +261,6 @@ static struct omap_hwmod omap3xxx_timer6_hwmod = {
267 .idlest_idle_bit = OMAP3430_ST_GPT6_SHIFT, 261 .idlest_idle_bit = OMAP3430_ST_GPT6_SHIFT,
268 }, 262 },
269 }, 263 },
270 .dev_attr = &capability_alwon_dev_attr,
271 .class = &omap3xxx_timer_hwmod_class, 264 .class = &omap3xxx_timer_hwmod_class,
272}; 265};
273 266
@@ -285,7 +278,6 @@ static struct omap_hwmod omap3xxx_timer7_hwmod = {
285 .idlest_idle_bit = OMAP3430_ST_GPT7_SHIFT, 278 .idlest_idle_bit = OMAP3430_ST_GPT7_SHIFT,
286 }, 279 },
287 }, 280 },
288 .dev_attr = &capability_alwon_dev_attr,
289 .class = &omap3xxx_timer_hwmod_class, 281 .class = &omap3xxx_timer_hwmod_class,
290}; 282};
291 283
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 4cab6318d33e..5c2ce7e77838 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -2944,7 +2944,6 @@ static struct omap_hwmod omap44xx_timer2_hwmod = {
2944 .modulemode = MODULEMODE_SWCTRL, 2944 .modulemode = MODULEMODE_SWCTRL,
2945 }, 2945 },
2946 }, 2946 },
2947 .dev_attr = &capability_alwon_dev_attr,
2948}; 2947};
2949 2948
2950/* timer3 */ 2949/* timer3 */
@@ -2966,7 +2965,6 @@ static struct omap_hwmod omap44xx_timer3_hwmod = {
2966 .modulemode = MODULEMODE_SWCTRL, 2965 .modulemode = MODULEMODE_SWCTRL,
2967 }, 2966 },
2968 }, 2967 },
2969 .dev_attr = &capability_alwon_dev_attr,
2970}; 2968};
2971 2969
2972/* timer4 */ 2970/* timer4 */
@@ -2988,7 +2986,6 @@ static struct omap_hwmod omap44xx_timer4_hwmod = {
2988 .modulemode = MODULEMODE_SWCTRL, 2986 .modulemode = MODULEMODE_SWCTRL,
2989 }, 2987 },
2990 }, 2988 },
2991 .dev_attr = &capability_alwon_dev_attr,
2992}; 2989};
2993 2990
2994/* timer5 */ 2991/* timer5 */
@@ -3010,7 +3007,6 @@ static struct omap_hwmod omap44xx_timer5_hwmod = {
3010 .modulemode = MODULEMODE_SWCTRL, 3007 .modulemode = MODULEMODE_SWCTRL,
3011 }, 3008 },
3012 }, 3009 },
3013 .dev_attr = &capability_alwon_dev_attr,
3014}; 3010};
3015 3011
3016/* timer6 */ 3012/* timer6 */
@@ -3033,7 +3029,6 @@ static struct omap_hwmod omap44xx_timer6_hwmod = {
3033 .modulemode = MODULEMODE_SWCTRL, 3029 .modulemode = MODULEMODE_SWCTRL,
3034 }, 3030 },
3035 }, 3031 },
3036 .dev_attr = &capability_alwon_dev_attr,
3037}; 3032};
3038 3033
3039/* timer7 */ 3034/* timer7 */
@@ -3055,7 +3050,6 @@ static struct omap_hwmod omap44xx_timer7_hwmod = {
3055 .modulemode = MODULEMODE_SWCTRL, 3050 .modulemode = MODULEMODE_SWCTRL,
3056 }, 3051 },
3057 }, 3052 },
3058 .dev_attr = &capability_alwon_dev_attr,
3059}; 3053};
3060 3054
3061/* timer8 */ 3055/* timer8 */
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index ea6a0eb13f05..b5b5d92acd9d 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -69,11 +69,6 @@
69#define OMAP3_SECURE_TIMER 1 69#define OMAP3_SECURE_TIMER 1
70#endif 70#endif
71 71
72/* MAX_GPTIMER_ID: number of GPTIMERs on the chip */
73#define MAX_GPTIMER_ID 12
74
75static u32 sys_timer_reserved;
76
77/* Clockevent code */ 72/* Clockevent code */
78 73
79static struct omap_dm_timer clkev; 74static struct omap_dm_timer clkev;
@@ -180,7 +175,8 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer,
180 175
181 omap_hwmod_enable(oh); 176 omap_hwmod_enable(oh);
182 177
183 sys_timer_reserved |= (1 << (gptimer_id - 1)); 178 if (omap_dm_timer_reserve_systimer(gptimer_id))
179 return -ENODEV;
184 180
185 if (gptimer_id != 12) { 181 if (gptimer_id != 12) {
186 struct clk *src; 182 struct clk *src;
@@ -399,66 +395,6 @@ OMAP_SYS_TIMER(4)
399#endif 395#endif
400 396
401/** 397/**
402 * omap2_dm_timer_set_src - change the timer input clock source
403 * @pdev: timer platform device pointer
404 * @source: array index of parent clock source
405 */
406static int omap2_dm_timer_set_src(struct platform_device *pdev, int source)
407{
408 int ret;
409 struct dmtimer_platform_data *pdata = pdev->dev.platform_data;
410 struct clk *fclk, *parent;
411 char *parent_name = NULL;
412
413 fclk = clk_get(&pdev->dev, "fck");
414 if (IS_ERR_OR_NULL(fclk)) {
415 dev_err(&pdev->dev, "%s: %d: clk_get() FAILED\n",
416 __func__, __LINE__);
417 return -EINVAL;
418 }
419
420 switch (source) {
421 case OMAP_TIMER_SRC_SYS_CLK:
422 parent_name = "sys_ck";
423 break;
424
425 case OMAP_TIMER_SRC_32_KHZ:
426 parent_name = "32k_ck";
427 break;
428
429 case OMAP_TIMER_SRC_EXT_CLK:
430 if (pdata->timer_ip_version == OMAP_TIMER_IP_VERSION_1) {
431 parent_name = "alt_ck";
432 break;
433 }
434 dev_err(&pdev->dev, "%s: %d: invalid clk src.\n",
435 __func__, __LINE__);
436 clk_put(fclk);
437 return -EINVAL;
438 }
439
440 parent = clk_get(&pdev->dev, parent_name);
441 if (IS_ERR_OR_NULL(parent)) {
442 dev_err(&pdev->dev, "%s: %d: clk_get() %s FAILED\n",
443 __func__, __LINE__, parent_name);
444 clk_put(fclk);
445 return -EINVAL;
446 }
447
448 ret = clk_set_parent(fclk, parent);
449 if (IS_ERR_VALUE(ret)) {
450 dev_err(&pdev->dev, "%s: clk_set_parent() to %s FAILED\n",
451 __func__, parent_name);
452 ret = -EINVAL;
453 }
454
455 clk_put(parent);
456 clk_put(fclk);
457
458 return ret;
459}
460
461/**
462 * omap_timer_init - build and register timer device with an 398 * omap_timer_init - build and register timer device with an
463 * associated timer hwmod 399 * associated timer hwmod
464 * @oh: timer hwmod pointer to be used to build timer device 400 * @oh: timer hwmod pointer to be used to build timer device
@@ -478,7 +414,6 @@ static int __init omap_timer_init(struct omap_hwmod *oh, void *unused)
478 struct dmtimer_platform_data *pdata; 414 struct dmtimer_platform_data *pdata;
479 struct platform_device *pdev; 415 struct platform_device *pdev;
480 struct omap_timer_capability_dev_attr *timer_dev_attr; 416 struct omap_timer_capability_dev_attr *timer_dev_attr;
481 struct powerdomain *pwrdm;
482 417
483 pr_debug("%s: %s\n", __func__, oh->name); 418 pr_debug("%s: %s\n", __func__, oh->name);
484 419
@@ -506,18 +441,9 @@ static int __init omap_timer_init(struct omap_hwmod *oh, void *unused)
506 */ 441 */
507 sscanf(oh->name, "timer%2d", &id); 442 sscanf(oh->name, "timer%2d", &id);
508 443
509 pdata->set_timer_src = omap2_dm_timer_set_src; 444 if (timer_dev_attr)
510 pdata->timer_ip_version = oh->class->rev; 445 pdata->timer_capability = timer_dev_attr->timer_capability;
511
512 /* Mark clocksource and clockevent timers as reserved */
513 if ((sys_timer_reserved >> (id - 1)) & 0x1)
514 pdata->reserved = 1;
515 446
516 pwrdm = omap_hwmod_get_pwrdm(oh);
517 pdata->loses_context = pwrdm_can_ever_lose_context(pwrdm);
518#ifdef CONFIG_PM
519 pdata->get_context_loss_count = omap_pm_get_dev_context_loss_count;
520#endif
521 pdev = omap_device_build(name, id, oh, pdata, sizeof(*pdata), 447 pdev = omap_device_build(name, id, oh, pdata, sizeof(*pdata),
522 NULL, 0, 0); 448 NULL, 0, 0);
523 449
diff --git a/arch/arm/mach-picoxcell/Makefile b/arch/arm/mach-picoxcell/Makefile
index e5ec4a8d9bcb..8e39f80fce19 100644
--- a/arch/arm/mach-picoxcell/Makefile
+++ b/arch/arm/mach-picoxcell/Makefile
@@ -1,2 +1 @@
1obj-y := common.o obj-y := common.o
2obj-y += time.o
diff --git a/arch/arm/mach-picoxcell/common.c b/arch/arm/mach-picoxcell/common.c
index a2e8ae8b5821..8f9a0b47a7fa 100644
--- a/arch/arm/mach-picoxcell/common.c
+++ b/arch/arm/mach-picoxcell/common.c
@@ -14,6 +14,7 @@
14#include <linux/of_address.h> 14#include <linux/of_address.h>
15#include <linux/of_irq.h> 15#include <linux/of_irq.h>
16#include <linux/of_platform.h> 16#include <linux/of_platform.h>
17#include <linux/dw_apb_timer.h>
17 18
18#include <asm/mach/arch.h> 19#include <asm/mach/arch.h>
19#include <asm/hardware/vic.h> 20#include <asm/hardware/vic.h>
@@ -97,7 +98,7 @@ DT_MACHINE_START(PICOXCELL, "Picochip picoXcell")
97 .nr_irqs = NR_IRQS_LEGACY, 98 .nr_irqs = NR_IRQS_LEGACY,
98 .init_irq = picoxcell_init_irq, 99 .init_irq = picoxcell_init_irq,
99 .handle_irq = vic_handle_irq, 100 .handle_irq = vic_handle_irq,
100 .timer = &picoxcell_timer, 101 .timer = &dw_apb_timer,
101 .init_machine = picoxcell_init_machine, 102 .init_machine = picoxcell_init_machine,
102 .dt_compat = picoxcell_dt_match, 103 .dt_compat = picoxcell_dt_match,
103 .restart = picoxcell_wdt_restart, 104 .restart = picoxcell_wdt_restart,
diff --git a/arch/arm/mach-picoxcell/common.h b/arch/arm/mach-picoxcell/common.h
index 83d55ab956a4..a65cb02f84c8 100644
--- a/arch/arm/mach-picoxcell/common.h
+++ b/arch/arm/mach-picoxcell/common.h
@@ -12,6 +12,6 @@
12 12
13#include <asm/mach/time.h> 13#include <asm/mach/time.h>
14 14
15extern struct sys_timer picoxcell_timer; 15extern struct sys_timer dw_apb_timer;
16 16
17#endif /* __PICOXCELL_COMMON_H__ */ 17#endif /* __PICOXCELL_COMMON_H__ */
diff --git a/arch/arm/mach-picoxcell/time.c b/arch/arm/mach-picoxcell/time.c
deleted file mode 100644
index 2ecba6743b8e..000000000000
--- a/arch/arm/mach-picoxcell/time.c
+++ /dev/null
@@ -1,121 +0,0 @@
1/*
2 * Copyright (c) 2011 Picochip Ltd., Jamie Iles
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * All enquiries to support@picochip.com
9 */
10#include <linux/dw_apb_timer.h>
11#include <linux/of.h>
12#include <linux/of_address.h>
13#include <linux/of_irq.h>
14
15#include <asm/mach/time.h>
16#include <asm/sched_clock.h>
17
18#include "common.h"
19
20static void timer_get_base_and_rate(struct device_node *np,
21 void __iomem **base, u32 *rate)
22{
23 *base = of_iomap(np, 0);
24
25 if (!*base)
26 panic("Unable to map regs for %s", np->name);
27
28 if (of_property_read_u32(np, "clock-freq", rate))
29 panic("No clock-freq property for %s", np->name);
30}
31
32static void picoxcell_add_clockevent(struct device_node *event_timer)
33{
34 void __iomem *iobase;
35 struct dw_apb_clock_event_device *ced;
36 u32 irq, rate;
37
38 irq = irq_of_parse_and_map(event_timer, 0);
39 if (irq == NO_IRQ)
40 panic("No IRQ for clock event timer");
41
42 timer_get_base_and_rate(event_timer, &iobase, &rate);
43
44 ced = dw_apb_clockevent_init(0, event_timer->name, 300, iobase, irq,
45 rate);
46 if (!ced)
47 panic("Unable to initialise clockevent device");
48
49 dw_apb_clockevent_register(ced);
50}
51
52static void picoxcell_add_clocksource(struct device_node *source_timer)
53{
54 void __iomem *iobase;
55 struct dw_apb_clocksource *cs;
56 u32 rate;
57
58 timer_get_base_and_rate(source_timer, &iobase, &rate);
59
60 cs = dw_apb_clocksource_init(300, source_timer->name, iobase, rate);
61 if (!cs)
62 panic("Unable to initialise clocksource device");
63
64 dw_apb_clocksource_start(cs);
65 dw_apb_clocksource_register(cs);
66}
67
68static void __iomem *sched_io_base;
69
70static u32 picoxcell_read_sched_clock(void)
71{
72 return __raw_readl(sched_io_base);
73}
74
75static const struct of_device_id picoxcell_rtc_ids[] __initconst = {
76 { .compatible = "picochip,pc3x2-rtc" },
77 { /* Sentinel */ },
78};
79
80static void picoxcell_init_sched_clock(void)
81{
82 struct device_node *sched_timer;
83 u32 rate;
84
85 sched_timer = of_find_matching_node(NULL, picoxcell_rtc_ids);
86 if (!sched_timer)
87 panic("No RTC for sched clock to use");
88
89 timer_get_base_and_rate(sched_timer, &sched_io_base, &rate);
90 of_node_put(sched_timer);
91
92 setup_sched_clock(picoxcell_read_sched_clock, 32, rate);
93}
94
95static const struct of_device_id picoxcell_timer_ids[] __initconst = {
96 { .compatible = "picochip,pc3x2-timer" },
97 {},
98};
99
100static void __init picoxcell_timer_init(void)
101{
102 struct device_node *event_timer, *source_timer;
103
104 event_timer = of_find_matching_node(NULL, picoxcell_timer_ids);
105 if (!event_timer)
106 panic("No timer for clockevent");
107 picoxcell_add_clockevent(event_timer);
108
109 source_timer = of_find_matching_node(event_timer, picoxcell_timer_ids);
110 if (!source_timer)
111 panic("No timer for clocksource");
112 picoxcell_add_clocksource(source_timer);
113
114 of_node_put(source_timer);
115
116 picoxcell_init_sched_clock();
117}
118
119struct sys_timer picoxcell_timer = {
120 .init = picoxcell_timer_init,
121};
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 3b0cfeb33d05..54ed4e6e429e 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -42,9 +42,11 @@
42#include <linux/pm_runtime.h> 42#include <linux/pm_runtime.h>
43 43
44#include <plat/dmtimer.h> 44#include <plat/dmtimer.h>
45#include <plat/omap-pm.h>
45 46
46#include <mach/hardware.h> 47#include <mach/hardware.h>
47 48
49static u32 omap_reserved_systimers;
48static LIST_HEAD(omap_timer_list); 50static LIST_HEAD(omap_timer_list);
49static DEFINE_SPINLOCK(dm_timer_lock); 51static DEFINE_SPINLOCK(dm_timer_lock);
50 52
@@ -133,17 +135,22 @@ static void omap_dm_timer_reset(struct omap_dm_timer *timer)
133 135
134int omap_dm_timer_prepare(struct omap_dm_timer *timer) 136int omap_dm_timer_prepare(struct omap_dm_timer *timer)
135{ 137{
136 struct dmtimer_platform_data *pdata = timer->pdev->dev.platform_data;
137 int ret; 138 int ret;
138 139
139 timer->fclk = clk_get(&timer->pdev->dev, "fck"); 140 /*
140 if (WARN_ON_ONCE(IS_ERR_OR_NULL(timer->fclk))) { 141 * FIXME: OMAP1 devices do not use the clock framework for dmtimers so
141 timer->fclk = NULL; 142 * do not call clk_get() for these devices.
142 dev_err(&timer->pdev->dev, ": No fclk handle.\n"); 143 */
143 return -EINVAL; 144 if (!(timer->capability & OMAP_TIMER_NEEDS_RESET)) {
145 timer->fclk = clk_get(&timer->pdev->dev, "fck");
146 if (WARN_ON_ONCE(IS_ERR_OR_NULL(timer->fclk))) {
147 timer->fclk = NULL;
148 dev_err(&timer->pdev->dev, ": No fclk handle.\n");
149 return -EINVAL;
150 }
144 } 151 }
145 152
146 if (pdata->needs_manual_reset) 153 if (timer->capability & OMAP_TIMER_NEEDS_RESET)
147 omap_dm_timer_reset(timer); 154 omap_dm_timer_reset(timer);
148 155
149 ret = omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ); 156 ret = omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ);
@@ -152,6 +159,21 @@ int omap_dm_timer_prepare(struct omap_dm_timer *timer)
152 return ret; 159 return ret;
153} 160}
154 161
162static inline u32 omap_dm_timer_reserved_systimer(int id)
163{
164 return (omap_reserved_systimers & (1 << (id - 1))) ? 1 : 0;
165}
166
167int omap_dm_timer_reserve_systimer(int id)
168{
169 if (omap_dm_timer_reserved_systimer(id))
170 return -ENODEV;
171
172 omap_reserved_systimers |= (1 << (id - 1));
173
174 return 0;
175}
176
155struct omap_dm_timer *omap_dm_timer_request(void) 177struct omap_dm_timer *omap_dm_timer_request(void)
156{ 178{
157 struct omap_dm_timer *timer = NULL, *t; 179 struct omap_dm_timer *timer = NULL, *t;
@@ -325,10 +347,9 @@ int omap_dm_timer_start(struct omap_dm_timer *timer)
325 347
326 omap_dm_timer_enable(timer); 348 omap_dm_timer_enable(timer);
327 349
328 if (timer->loses_context) { 350 if (!(timer->capability & OMAP_TIMER_ALWON)) {
329 u32 ctx_loss_cnt_after = 351 if (omap_pm_get_dev_context_loss_count(&timer->pdev->dev) !=
330 timer->get_context_loss_count(&timer->pdev->dev); 352 timer->ctx_loss_count)
331 if (ctx_loss_cnt_after != timer->ctx_loss_count)
332 omap_timer_restore_context(timer); 353 omap_timer_restore_context(timer);
333 } 354 }
334 355
@@ -347,20 +368,18 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_start);
347int omap_dm_timer_stop(struct omap_dm_timer *timer) 368int omap_dm_timer_stop(struct omap_dm_timer *timer)
348{ 369{
349 unsigned long rate = 0; 370 unsigned long rate = 0;
350 struct dmtimer_platform_data *pdata;
351 371
352 if (unlikely(!timer)) 372 if (unlikely(!timer))
353 return -EINVAL; 373 return -EINVAL;
354 374
355 pdata = timer->pdev->dev.platform_data; 375 if (!(timer->capability & OMAP_TIMER_NEEDS_RESET))
356 if (!pdata->needs_manual_reset)
357 rate = clk_get_rate(timer->fclk); 376 rate = clk_get_rate(timer->fclk);
358 377
359 __omap_dm_timer_stop(timer, timer->posted, rate); 378 __omap_dm_timer_stop(timer, timer->posted, rate);
360 379
361 if (timer->loses_context && timer->get_context_loss_count) 380 if (!(timer->capability & OMAP_TIMER_ALWON))
362 timer->ctx_loss_count = 381 timer->ctx_loss_count =
363 timer->get_context_loss_count(&timer->pdev->dev); 382 omap_pm_get_dev_context_loss_count(&timer->pdev->dev);
364 383
365 /* 384 /*
366 * Since the register values are computed and written within 385 * Since the register values are computed and written within
@@ -378,6 +397,8 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_stop);
378int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source) 397int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
379{ 398{
380 int ret; 399 int ret;
400 char *parent_name = NULL;
401 struct clk *fclk, *parent;
381 struct dmtimer_platform_data *pdata; 402 struct dmtimer_platform_data *pdata;
382 403
383 if (unlikely(!timer)) 404 if (unlikely(!timer))
@@ -388,7 +409,49 @@ int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
388 if (source < 0 || source >= 3) 409 if (source < 0 || source >= 3)
389 return -EINVAL; 410 return -EINVAL;
390 411
391 ret = pdata->set_timer_src(timer->pdev, source); 412 /*
413 * FIXME: Used for OMAP1 devices only because they do not currently
414 * use the clock framework to set the parent clock. To be removed
415 * once OMAP1 migrated to using clock framework for dmtimers
416 */
417 if (pdata->set_timer_src)
418 return pdata->set_timer_src(timer->pdev, source);
419
420 fclk = clk_get(&timer->pdev->dev, "fck");
421 if (IS_ERR_OR_NULL(fclk)) {
422 pr_err("%s: fck not found\n", __func__);
423 return -EINVAL;
424 }
425
426 switch (source) {
427 case OMAP_TIMER_SRC_SYS_CLK:
428 parent_name = "timer_sys_ck";
429 break;
430
431 case OMAP_TIMER_SRC_32_KHZ:
432 parent_name = "timer_32k_ck";
433 break;
434
435 case OMAP_TIMER_SRC_EXT_CLK:
436 parent_name = "timer_ext_ck";
437 break;
438 }
439
440 parent = clk_get(&timer->pdev->dev, parent_name);
441 if (IS_ERR_OR_NULL(parent)) {
442 pr_err("%s: %s not found\n", __func__, parent_name);
443 ret = -EINVAL;
444 goto out;
445 }
446
447 ret = clk_set_parent(fclk, parent);
448 if (IS_ERR_VALUE(ret))
449 pr_err("%s: failed to set %s as parent\n", __func__,
450 parent_name);
451
452 clk_put(parent);
453out:
454 clk_put(fclk);
392 455
393 return ret; 456 return ret;
394} 457}
@@ -431,10 +494,9 @@ int omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
431 494
432 omap_dm_timer_enable(timer); 495 omap_dm_timer_enable(timer);
433 496
434 if (timer->loses_context) { 497 if (!(timer->capability & OMAP_TIMER_ALWON)) {
435 u32 ctx_loss_cnt_after = 498 if (omap_pm_get_dev_context_loss_count(&timer->pdev->dev) !=
436 timer->get_context_loss_count(&timer->pdev->dev); 499 timer->ctx_loss_count)
437 if (ctx_loss_cnt_after != timer->ctx_loss_count)
438 omap_timer_restore_context(timer); 500 omap_timer_restore_context(timer);
439 } 501 }
440 502
@@ -674,13 +736,12 @@ static int __devinit omap_dm_timer_probe(struct platform_device *pdev)
674 736
675 timer->id = pdev->id; 737 timer->id = pdev->id;
676 timer->irq = irq->start; 738 timer->irq = irq->start;
677 timer->reserved = pdata->reserved; 739 timer->reserved = omap_dm_timer_reserved_systimer(timer->id);
678 timer->pdev = pdev; 740 timer->pdev = pdev;
679 timer->loses_context = pdata->loses_context; 741 timer->capability = pdata->timer_capability;
680 timer->get_context_loss_count = pdata->get_context_loss_count;
681 742
682 /* Skip pm_runtime_enable for OMAP1 */ 743 /* Skip pm_runtime_enable for OMAP1 */
683 if (!pdata->needs_manual_reset) { 744 if (!(timer->capability & OMAP_TIMER_NEEDS_RESET)) {
684 pm_runtime_enable(&pdev->dev); 745 pm_runtime_enable(&pdev->dev);
685 pm_runtime_irq_safe(&pdev->dev); 746 pm_runtime_irq_safe(&pdev->dev);
686 } 747 }
diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h
index 5da73562e486..19e7fa577bd0 100644
--- a/arch/arm/plat-omap/include/plat/dmtimer.h
+++ b/arch/arm/plat-omap/include/plat/dmtimer.h
@@ -55,23 +55,17 @@
55#define OMAP_TIMER_TRIGGER_OVERFLOW 0x01 55#define OMAP_TIMER_TRIGGER_OVERFLOW 0x01
56#define OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE 0x02 56#define OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE 0x02
57 57
58/*
59 * IP revision identifier so that Highlander IP
60 * in OMAP4 can be distinguished.
61 */
62#define OMAP_TIMER_IP_VERSION_1 0x1
63
64/* timer capabilities used in hwmod database */ 58/* timer capabilities used in hwmod database */
65#define OMAP_TIMER_SECURE 0x80000000 59#define OMAP_TIMER_SECURE 0x80000000
66#define OMAP_TIMER_ALWON 0x40000000 60#define OMAP_TIMER_ALWON 0x40000000
67#define OMAP_TIMER_HAS_PWM 0x20000000 61#define OMAP_TIMER_HAS_PWM 0x20000000
62#define OMAP_TIMER_NEEDS_RESET 0x10000000
68 63
69struct omap_timer_capability_dev_attr { 64struct omap_timer_capability_dev_attr {
70 u32 timer_capability; 65 u32 timer_capability;
71}; 66};
72 67
73struct omap_dm_timer; 68struct omap_dm_timer;
74struct clk;
75 69
76struct timer_regs { 70struct timer_regs {
77 u32 tidr; 71 u32 tidr;
@@ -96,16 +90,12 @@ struct timer_regs {
96}; 90};
97 91
98struct dmtimer_platform_data { 92struct dmtimer_platform_data {
93 /* set_timer_src - Only used for OMAP1 devices */
99 int (*set_timer_src)(struct platform_device *pdev, int source); 94 int (*set_timer_src)(struct platform_device *pdev, int source);
100 int timer_ip_version; 95 u32 timer_capability;
101 u32 needs_manual_reset:1;
102 bool reserved;
103
104 bool loses_context;
105
106 int (*get_context_loss_count)(struct device *dev);
107}; 96};
108 97
98int omap_dm_timer_reserve_systimer(int id);
109struct omap_dm_timer *omap_dm_timer_request(void); 99struct omap_dm_timer *omap_dm_timer_request(void);
110struct omap_dm_timer *omap_dm_timer_request_specific(int timer_id); 100struct omap_dm_timer *omap_dm_timer_request_specific(int timer_id);
111int omap_dm_timer_free(struct omap_dm_timer *timer); 101int omap_dm_timer_free(struct omap_dm_timer *timer);
@@ -272,13 +262,11 @@ struct omap_dm_timer {
272 unsigned reserved:1; 262 unsigned reserved:1;
273 unsigned posted:1; 263 unsigned posted:1;
274 struct timer_regs context; 264 struct timer_regs context;
275 bool loses_context;
276 int ctx_loss_count; 265 int ctx_loss_count;
277 int revision; 266 int revision;
267 u32 capability;
278 struct platform_device *pdev; 268 struct platform_device *pdev;
279 struct list_head node; 269 struct list_head node;
280
281 int (*get_context_loss_count)(struct device *dev);
282}; 270};
283 271
284int omap_dm_timer_prepare(struct omap_dm_timer *timer); 272int omap_dm_timer_prepare(struct omap_dm_timer *timer);
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-12 21:15:36 -0400