diff options
Diffstat (limited to 'arch/arm64/mm/proc.S')
-rw-r--r-- | arch/arm64/mm/proc.S | 25 |
1 files changed, 14 insertions, 11 deletions
diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S index e085ee6ef4e2..9042aff5e9e3 100644 --- a/arch/arm64/mm/proc.S +++ b/arch/arm64/mm/proc.S | |||
@@ -28,14 +28,21 @@ | |||
28 | 28 | ||
29 | #include "proc-macros.S" | 29 | #include "proc-macros.S" |
30 | 30 | ||
31 | #ifndef CONFIG_SMP | 31 | #ifdef CONFIG_ARM64_64K_PAGES |
32 | /* PTWs cacheable, inner/outer WBWA not shareable */ | 32 | #define TCR_TG_FLAGS TCR_TG0_64K | TCR_TG1_64K |
33 | #define TCR_FLAGS TCR_IRGN_WBWA | TCR_ORGN_WBWA | 33 | #else |
34 | #define TCR_TG_FLAGS TCR_TG0_4K | TCR_TG1_4K | ||
35 | #endif | ||
36 | |||
37 | #ifdef CONFIG_SMP | ||
38 | #define TCR_SMP_FLAGS TCR_SHARED | ||
34 | #else | 39 | #else |
35 | /* PTWs cacheable, inner/outer WBWA shareable */ | 40 | #define TCR_SMP_FLAGS 0 |
36 | #define TCR_FLAGS TCR_IRGN_WBWA | TCR_ORGN_WBWA | TCR_SHARED | ||
37 | #endif | 41 | #endif |
38 | 42 | ||
43 | /* PTWs cacheable, inner/outer WBWA */ | ||
44 | #define TCR_CACHE_FLAGS TCR_IRGN_WBWA | TCR_ORGN_WBWA | ||
45 | |||
39 | #define MAIR(attr, mt) ((attr) << ((mt) * 8)) | 46 | #define MAIR(attr, mt) ((attr) << ((mt) * 8)) |
40 | 47 | ||
41 | /* | 48 | /* |
@@ -209,18 +216,14 @@ ENTRY(__cpu_setup) | |||
209 | * Set/prepare TCR and TTBR. We use 512GB (39-bit) address range for | 216 | * Set/prepare TCR and TTBR. We use 512GB (39-bit) address range for |
210 | * both user and kernel. | 217 | * both user and kernel. |
211 | */ | 218 | */ |
212 | ldr x10, =TCR_TxSZ(VA_BITS) | TCR_FLAGS | \ | 219 | ldr x10, =TCR_TxSZ(VA_BITS) | TCR_CACHE_FLAGS | TCR_SMP_FLAGS | \ |
213 | TCR_ASID16 | TCR_TBI0 | (1 << 31) | 220 | TCR_TG_FLAGS | TCR_ASID16 | TCR_TBI0 |
214 | /* | 221 | /* |
215 | * Read the PARange bits from ID_AA64MMFR0_EL1 and set the IPS bits in | 222 | * Read the PARange bits from ID_AA64MMFR0_EL1 and set the IPS bits in |
216 | * TCR_EL1. | 223 | * TCR_EL1. |
217 | */ | 224 | */ |
218 | mrs x9, ID_AA64MMFR0_EL1 | 225 | mrs x9, ID_AA64MMFR0_EL1 |
219 | bfi x10, x9, #32, #3 | 226 | bfi x10, x9, #32, #3 |
220 | #ifdef CONFIG_ARM64_64K_PAGES | ||
221 | orr x10, x10, TCR_TG0_64K | ||
222 | orr x10, x10, TCR_TG1_64K | ||
223 | #endif | ||
224 | msr tcr_el1, x10 | 227 | msr tcr_el1, x10 |
225 | ret // return to head.S | 228 | ret // return to head.S |
226 | ENDPROC(__cpu_setup) | 229 | ENDPROC(__cpu_setup) |