diff options
Diffstat (limited to 'arch/arm64/boot/dts')
-rw-r--r-- | arch/arm64/boot/dts/arm/juno-motherboard.dtsi | 31 |
1 files changed, 27 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/arm/juno-motherboard.dtsi b/arch/arm64/boot/dts/arm/juno-motherboard.dtsi index c138b95a8356..351c95bda89e 100644 --- a/arch/arm64/boot/dts/arm/juno-motherboard.dtsi +++ b/arch/arm64/boot/dts/arm/juno-motherboard.dtsi | |||
@@ -21,6 +21,20 @@ | |||
21 | clock-output-names = "juno_mb:clk25mhz"; | 21 | clock-output-names = "juno_mb:clk25mhz"; |
22 | }; | 22 | }; |
23 | 23 | ||
24 | v2m_refclk1mhz: refclk1mhz { | ||
25 | compatible = "fixed-clock"; | ||
26 | #clock-cells = <0>; | ||
27 | clock-frequency = <1000000>; | ||
28 | clock-output-names = "juno_mb:refclk1mhz"; | ||
29 | }; | ||
30 | |||
31 | v2m_refclk32khz: refclk32khz { | ||
32 | compatible = "fixed-clock"; | ||
33 | #clock-cells = <0>; | ||
34 | clock-frequency = <32768>; | ||
35 | clock-output-names = "juno_mb:refclk32khz"; | ||
36 | }; | ||
37 | |||
24 | motherboard { | 38 | motherboard { |
25 | compatible = "arm,vexpress,v2p-p1", "simple-bus"; | 39 | compatible = "arm,vexpress,v2p-p1", "simple-bus"; |
26 | #address-cells = <2>; /* SMB chipselect number and offset */ | 40 | #address-cells = <2>; /* SMB chipselect number and offset */ |
@@ -66,6 +80,15 @@ | |||
66 | #size-cells = <1>; | 80 | #size-cells = <1>; |
67 | ranges = <0 3 0 0x200000>; | 81 | ranges = <0 3 0 0x200000>; |
68 | 82 | ||
83 | v2m_sysctl: sysctl@020000 { | ||
84 | compatible = "arm,sp810", "arm,primecell"; | ||
85 | reg = <0x020000 0x1000>; | ||
86 | clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&mb_clk24mhz>; | ||
87 | clock-names = "refclk", "timclk", "apb_pclk"; | ||
88 | #clock-cells = <1>; | ||
89 | clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3"; | ||
90 | }; | ||
91 | |||
69 | mmci@050000 { | 92 | mmci@050000 { |
70 | compatible = "arm,pl180", "arm,primecell"; | 93 | compatible = "arm,pl180", "arm,primecell"; |
71 | reg = <0x050000 0x1000>; | 94 | reg = <0x050000 0x1000>; |
@@ -106,16 +129,16 @@ | |||
106 | compatible = "arm,sp804", "arm,primecell"; | 129 | compatible = "arm,sp804", "arm,primecell"; |
107 | reg = <0x110000 0x10000>; | 130 | reg = <0x110000 0x10000>; |
108 | interrupts = <9>; | 131 | interrupts = <9>; |
109 | clocks = <&mb_clk24mhz>, <&soc_smc50mhz>; | 132 | clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&mb_clk24mhz>; |
110 | clock-names = "timclken1", "apb_pclk"; | 133 | clock-names = "timclken1", "timclken2", "apb_pclk"; |
111 | }; | 134 | }; |
112 | 135 | ||
113 | v2m_timer23: timer@120000 { | 136 | v2m_timer23: timer@120000 { |
114 | compatible = "arm,sp804", "arm,primecell"; | 137 | compatible = "arm,sp804", "arm,primecell"; |
115 | reg = <0x120000 0x10000>; | 138 | reg = <0x120000 0x10000>; |
116 | interrupts = <9>; | 139 | interrupts = <9>; |
117 | clocks = <&mb_clk24mhz>, <&soc_smc50mhz>; | 140 | clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&mb_clk24mhz>; |
118 | clock-names = "timclken1", "apb_pclk"; | 141 | clock-names = "timclken1", "timclken2", "apb_pclk"; |
119 | }; | 142 | }; |
120 | 143 | ||
121 | rtc@170000 { | 144 | rtc@170000 { |