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-rw-r--r--arch/arm/plat-spear/include/plat/clkdev.h20
-rw-r--r--arch/arm/plat-spear/include/plat/clock.h126
-rw-r--r--arch/arm/plat-spear/include/plat/debug-macro.S38
-rw-r--r--arch/arm/plat-spear/include/plat/gpio.h24
-rw-r--r--arch/arm/plat-spear/include/plat/io.h22
-rw-r--r--arch/arm/plat-spear/include/plat/memory.h20
-rw-r--r--arch/arm/plat-spear/include/plat/padmux.h92
-rw-r--r--arch/arm/plat-spear/include/plat/shirq.h73
-rw-r--r--arch/arm/plat-spear/include/plat/system.h41
-rw-r--r--arch/arm/plat-spear/include/plat/timex.h19
-rw-r--r--arch/arm/plat-spear/include/plat/uncompress.h43
-rw-r--r--arch/arm/plat-spear/include/plat/vmalloc.h19
12 files changed, 537 insertions, 0 deletions
diff --git a/arch/arm/plat-spear/include/plat/clkdev.h b/arch/arm/plat-spear/include/plat/clkdev.h
new file mode 100644
index 000000000000..a2d0112fcaf7
--- /dev/null
+++ b/arch/arm/plat-spear/include/plat/clkdev.h
@@ -0,0 +1,20 @@
1/*
2 * arch/arm/plat-spear/include/plat/clkdev.h
3 *
4 * Clock Dev framework definitions for SPEAr platform
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __PLAT_CLKDEV_H
15#define __PLAT_CLKDEV_H
16
17#define __clk_get(clk) ({ 1; })
18#define __clk_put(clk) do { } while (0)
19
20#endif /* __PLAT_CLKDEV_H */
diff --git a/arch/arm/plat-spear/include/plat/clock.h b/arch/arm/plat-spear/include/plat/clock.h
new file mode 100644
index 000000000000..298bafc0a52f
--- /dev/null
+++ b/arch/arm/plat-spear/include/plat/clock.h
@@ -0,0 +1,126 @@
1/*
2 * arch/arm/plat-spear/include/plat/clock.h
3 *
4 * Clock framework definitions for SPEAr platform
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __PLAT_CLOCK_H
15#define __PLAT_CLOCK_H
16
17#include <linux/list.h>
18#include <asm/clkdev.h>
19#include <linux/types.h>
20
21/* clk structure flags */
22#define ALWAYS_ENABLED (1 << 0) /* clock always enabled */
23#define RESET_TO_ENABLE (1 << 1) /* reset register bit to enable clk */
24
25/**
26 * struct clkops - clock operations
27 * @enable: pointer to clock enable function
28 * @disable: pointer to clock disable function
29 */
30struct clkops {
31 int (*enable) (struct clk *);
32 void (*disable) (struct clk *);
33};
34
35/**
36 * struct pclk_info - parents info
37 * @pclk: pointer to parent clk
38 * @pclk_mask: value to be written for selecting this parent
39 * @scalable: Is parent scalable (1 - YES, 0 - NO)
40 */
41struct pclk_info {
42 struct clk *pclk;
43 u8 pclk_mask;
44 u8 scalable;
45};
46
47/**
48 * struct pclk_sel - parents selection configuration
49 * @pclk_info: pointer to array of parent clock info
50 * @pclk_count: number of parents
51 * @pclk_sel_reg: register for selecting a parent
52 * @pclk_sel_mask: mask for selecting parent (can be used to clear bits also)
53 */
54struct pclk_sel {
55 struct pclk_info *pclk_info;
56 u8 pclk_count;
57 unsigned int *pclk_sel_reg;
58 unsigned int pclk_sel_mask;
59};
60
61/**
62 * struct clk - clock structure
63 * @usage_count: num of users who enabled this clock
64 * @flags: flags for clock properties
65 * @rate: programmed clock rate in Hz
66 * @en_reg: clk enable/disable reg
67 * @en_reg_bit: clk enable/disable bit
68 * @ops: clk enable/disable ops - generic_clkops selected if NULL
69 * @recalc: pointer to clock rate recalculate function
70 * @pclk: current parent clk
71 * @pclk_sel: pointer to parent selection structure
72 * @pclk_sel_shift: register shift for selecting parent of this clock
73 * @children: list for childrens or this clock
74 * @sibling: node for list of clocks having same parents
75 * @private_data: clock specific private data
76 */
77struct clk {
78 unsigned int usage_count;
79 unsigned int flags;
80 unsigned long rate;
81 unsigned int *en_reg;
82 u8 en_reg_bit;
83 const struct clkops *ops;
84 void (*recalc) (struct clk *);
85
86 struct clk *pclk;
87 struct pclk_sel *pclk_sel;
88 unsigned int pclk_sel_shift;
89
90 struct list_head children;
91 struct list_head sibling;
92 void *private_data;
93};
94
95/* pll configuration structure */
96struct pll_clk_config {
97 unsigned int *mode_reg;
98 unsigned int *cfg_reg;
99};
100
101/* ahb and apb bus configuration structure */
102struct bus_clk_config {
103 unsigned int *reg;
104 unsigned int mask;
105 unsigned int shift;
106};
107
108/*
109 * Aux clk configuration structure: applicable to GPT, UART and FIRDA
110 */
111struct aux_clk_config {
112 unsigned int *synth_reg;
113};
114
115/* platform specific clock functions */
116void clk_register(struct clk_lookup *cl);
117void recalc_root_clocks(void);
118
119/* clock recalc functions */
120void follow_parent(struct clk *clk);
121void pll1_clk_recalc(struct clk *clk);
122void bus_clk_recalc(struct clk *clk);
123void gpt_clk_recalc(struct clk *clk);
124void aux_clk_recalc(struct clk *clk);
125
126#endif /* __PLAT_CLOCK_H */
diff --git a/arch/arm/plat-spear/include/plat/debug-macro.S b/arch/arm/plat-spear/include/plat/debug-macro.S
new file mode 100644
index 000000000000..1670734b7e51
--- /dev/null
+++ b/arch/arm/plat-spear/include/plat/debug-macro.S
@@ -0,0 +1,38 @@
1/*
2 * arch/arm/plat-spear/include/plat/debug-macro.S
3 *
4 * Debugging macro include header for spear platform
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#include <linux/amba/serial.h>
15#include <mach/spear.h>
16
17 .macro addruart, rx
18 mrc p15, 0, \rx, c1, c0
19 tst \rx, #1 @ MMU enabled?
20 moveq \rx, =SPEAR_DBG_UART_BASE @ Physical base
21 movne \rx, =VA_SPEAR_DBG_UART_BASE @ Virtual base
22 .endm
23
24 .macro senduart, rd, rx
25 strb \rd, [\rx, #UART01x_DR] @ ASC_TX_BUFFER
26 .endm
27
28 .macro waituart, rd, rx
291001: ldr \rd, [\rx, #UART01x_FR] @ FLAG REGISTER
30 tst \rd, #UART01x_FR_TXFF @ TX_FULL
31 bne 1001b
32 .endm
33
34 .macro busyuart, rd, rx
351002: ldr \rd, [\rx, #UART01x_FR] @ FLAG REGISTER
36 tst \rd, #UART011_FR_TXFE @ TX_EMPTY
37 beq 1002b
38 .endm
diff --git a/arch/arm/plat-spear/include/plat/gpio.h b/arch/arm/plat-spear/include/plat/gpio.h
new file mode 100644
index 000000000000..b857c91257dd
--- /dev/null
+++ b/arch/arm/plat-spear/include/plat/gpio.h
@@ -0,0 +1,24 @@
1/*
2 * arch/arm/plat-spear/include/plat/gpio.h
3 *
4 * GPIO macros for SPEAr platform
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __PLAT_GPIO_H
15#define __PLAT_GPIO_H
16
17#include <asm-generic/gpio.h>
18
19#define gpio_get_value __gpio_get_value
20#define gpio_set_value __gpio_set_value
21#define gpio_cansleep __gpio_cansleep
22#define gpio_to_irq __gpio_to_irq
23
24#endif /* __PLAT_GPIO_H */
diff --git a/arch/arm/plat-spear/include/plat/io.h b/arch/arm/plat-spear/include/plat/io.h
new file mode 100644
index 000000000000..4d4ba822b3eb
--- /dev/null
+++ b/arch/arm/plat-spear/include/plat/io.h
@@ -0,0 +1,22 @@
1/*
2 * arch/arm/plat-spear/include/plat/io.h
3 *
4 * IO definitions for SPEAr platform
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __PLAT_IO_H
15#define __PLAT_IO_H
16
17#define IO_SPACE_LIMIT 0xFFFFFFFF
18
19#define __io(a) __typesafe_io(a)
20#define __mem_pci(a) (a)
21
22#endif /* __PLAT_IO_H */
diff --git a/arch/arm/plat-spear/include/plat/memory.h b/arch/arm/plat-spear/include/plat/memory.h
new file mode 100644
index 000000000000..27a4aba77343
--- /dev/null
+++ b/arch/arm/plat-spear/include/plat/memory.h
@@ -0,0 +1,20 @@
1/*
2 * arch/arm/plat-spear/include/plat/memory.h
3 *
4 * Memory map for SPEAr platform
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __PLAT_MEMORY_H
15#define __PLAT_MEMORY_H
16
17/* Physical DRAM offset */
18#define PHYS_OFFSET UL(0x00000000)
19
20#endif /* __PLAT_MEMORY_H */
diff --git a/arch/arm/plat-spear/include/plat/padmux.h b/arch/arm/plat-spear/include/plat/padmux.h
new file mode 100644
index 000000000000..877f3adcf610
--- /dev/null
+++ b/arch/arm/plat-spear/include/plat/padmux.h
@@ -0,0 +1,92 @@
1/*
2 * arch/arm/plat-spear/include/plat/padmux.h
3 *
4 * SPEAr platform specific gpio pads muxing file
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __PLAT_PADMUX_H
15#define __PLAT_PADMUX_H
16
17#include <linux/types.h>
18
19/*
20 * struct pmx_reg: configuration structure for mode reg and mux reg
21 *
22 * offset: offset of mode reg
23 * mask: mask of mode reg
24 */
25struct pmx_reg {
26 u32 offset;
27 u32 mask;
28};
29
30/*
31 * struct pmx_dev_mode: configuration structure every group of modes of a device
32 *
33 * ids: all modes for this configuration
34 * mask: mask for supported mode
35 */
36struct pmx_dev_mode {
37 u32 ids;
38 u32 mask;
39};
40
41/*
42 * struct pmx_mode: mode definition structure
43 *
44 * name: mode name
45 * mask: mode mask
46 */
47struct pmx_mode {
48 char *name;
49 u32 id;
50 u32 mask;
51};
52
53/*
54 * struct pmx_dev: device definition structure
55 *
56 * name: device name
57 * modes: device configuration array for different modes supported
58 * mode_count: size of modes array
59 * is_active: is peripheral active/enabled
60 * enb_on_reset: if 1, mask bits to be cleared in reg otherwise to be set in reg
61 */
62struct pmx_dev {
63 char *name;
64 struct pmx_dev_mode *modes;
65 u8 mode_count;
66 bool is_active;
67 bool enb_on_reset;
68};
69
70/*
71 * struct pmx_driver: driver definition structure
72 *
73 * mode: mode to be set
74 * devs: array of pointer to pmx devices
75 * devs_count: ARRAY_SIZE of devs
76 * base: base address of soc config registers
77 * mode_reg: structure of mode config register
78 * mux_reg: structure of device mux config register
79 */
80struct pmx_driver {
81 struct pmx_mode *mode;
82 struct pmx_dev **devs;
83 u8 devs_count;
84 u32 *base;
85 struct pmx_reg mode_reg;
86 struct pmx_reg mux_reg;
87};
88
89/* pmx functions */
90int pmx_register(struct pmx_driver *driver);
91
92#endif /* __PLAT_PADMUX_H */
diff --git a/arch/arm/plat-spear/include/plat/shirq.h b/arch/arm/plat-spear/include/plat/shirq.h
new file mode 100644
index 000000000000..03ed8b585dcf
--- /dev/null
+++ b/arch/arm/plat-spear/include/plat/shirq.h
@@ -0,0 +1,73 @@
1/*
2 * arch/arm/plat-spear/include/plat/shirq.h
3 *
4 * SPEAr platform shared irq layer header file
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __PLAT_SHIRQ_H
15#define __PLAT_SHIRQ_H
16
17#include <linux/irq.h>
18#include <linux/types.h>
19
20/*
21 * struct shirq_dev_config: shared irq device configuration
22 *
23 * virq: virtual irq number of device
24 * enb_mask: enable mask of device
25 * status_mask: status mask of device
26 * clear_mask: clear mask of device
27 */
28struct shirq_dev_config {
29 u32 virq;
30 u32 enb_mask;
31 u32 status_mask;
32 u32 clear_mask;
33};
34
35/*
36 * struct shirq_regs: shared irq register configuration
37 *
38 * base: base address of shared irq register
39 * enb_reg: enable register offset
40 * reset_to_enb: val 1 indicates, we need to clear bit for enabling interrupt
41 * status_reg: status register offset
42 * status_reg_mask: status register valid mask
43 * clear_reg: clear register offset
44 * reset_to_clear: val 1 indicates, we need to clear bit for clearing interrupt
45 */
46struct shirq_regs {
47 void __iomem *base;
48 u32 enb_reg;
49 u32 reset_to_enb;
50 u32 status_reg;
51 u32 status_reg_mask;
52 u32 clear_reg;
53 u32 reset_to_clear;
54};
55
56/*
57 * struct spear_shirq: shared irq structure
58 *
59 * irq: hardware irq number
60 * dev_config: array of device config structures which are using "irq" line
61 * dev_count: size of dev_config array
62 * regs: register configuration for shared irq block
63 */
64struct spear_shirq {
65 u32 irq;
66 struct shirq_dev_config *dev_config;
67 u32 dev_count;
68 struct shirq_regs regs;
69};
70
71int spear_shirq_register(struct spear_shirq *shirq);
72
73#endif /* __PLAT_SHIRQ_H */
diff --git a/arch/arm/plat-spear/include/plat/system.h b/arch/arm/plat-spear/include/plat/system.h
new file mode 100644
index 000000000000..55a4e405d578
--- /dev/null
+++ b/arch/arm/plat-spear/include/plat/system.h
@@ -0,0 +1,41 @@
1/*
2 * arch/arm/plat-spear/include/plat/system.h
3 *
4 * SPEAr platform specific architecture functions
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __PLAT_SYSTEM_H
15#define __PLAT_SYSTEM_H
16
17#include <asm/hardware/sp810.h>
18#include <linux/io.h>
19#include <mach/spear.h>
20
21static inline void arch_idle(void)
22{
23 /*
24 * This should do all the clock switching
25 * and wait for interrupt tricks
26 */
27 cpu_do_idle();
28}
29
30static inline void arch_reset(char mode, const char *cmd)
31{
32 if (mode == 's') {
33 /* software reset, Jump into ROM at address 0 */
34 cpu_reset(0);
35 } else {
36 /* hardware reset, Use on-chip reset capability */
37 sysctl_soft_reset((void __iomem *)VA_SPEAR_SYS_CTRL_BASE);
38 }
39}
40
41#endif /* __PLAT_SYSTEM_H */
diff --git a/arch/arm/plat-spear/include/plat/timex.h b/arch/arm/plat-spear/include/plat/timex.h
new file mode 100644
index 000000000000..914d09dd50fd
--- /dev/null
+++ b/arch/arm/plat-spear/include/plat/timex.h
@@ -0,0 +1,19 @@
1/*
2 * arch/arm/plat-spear/include/plat/timex.h
3 *
4 * SPEAr platform specific timex definitions
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __PLAT_TIMEX_H
15#define __PLAT_TIMEX_H
16
17#define CLOCK_TICK_RATE 48000000
18
19#endif /* __PLAT_TIMEX_H */
diff --git a/arch/arm/plat-spear/include/plat/uncompress.h b/arch/arm/plat-spear/include/plat/uncompress.h
new file mode 100644
index 000000000000..99ba6789cc97
--- /dev/null
+++ b/arch/arm/plat-spear/include/plat/uncompress.h
@@ -0,0 +1,43 @@
1/*
2 * arch/arm/plat-spear/include/plat/uncompress.h
3 *
4 * Serial port stubs for kernel decompress status messages
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#include <linux/io.h>
15#include <linux/amba/serial.h>
16#include <mach/spear.h>
17
18#ifndef __PLAT_UNCOMPRESS_H
19#define __PLAT_UNCOMPRESS_H
20/*
21 * This does not append a newline
22 */
23static inline void putc(int c)
24{
25 void __iomem *base = (void __iomem *)SPEAR_DBG_UART_BASE;
26
27 while (readl(base + UART01x_FR) & UART01x_FR_TXFF)
28 barrier();
29
30 writel(c, base + UART01x_DR);
31}
32
33static inline void flush(void)
34{
35}
36
37/*
38 * nothing to do
39 */
40#define arch_decomp_setup()
41#define arch_decomp_wdog()
42
43#endif /* __PLAT_UNCOMPRESS_H */
diff --git a/arch/arm/plat-spear/include/plat/vmalloc.h b/arch/arm/plat-spear/include/plat/vmalloc.h
new file mode 100644
index 000000000000..09e9372aea21
--- /dev/null
+++ b/arch/arm/plat-spear/include/plat/vmalloc.h
@@ -0,0 +1,19 @@
1/*
2 * arch/arm/plat-spear/include/plat/vmalloc.h
3 *
4 * Defining Vmalloc area for SPEAr platform
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __PLAT_VMALLOC_H
15#define __PLAT_VMALLOC_H
16
17#define VMALLOC_END 0xF0000000
18
19#endif /* __PLAT_VMALLOC_H */
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-16 23:52:36 -0500