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-rw-r--r--arch/arm/plat-samsung/gpio-config.c47
-rw-r--r--arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h41
2 files changed, 87 insertions, 1 deletions
diff --git a/arch/arm/plat-samsung/gpio-config.c b/arch/arm/plat-samsung/gpio-config.c
index 8aca88d6c486..19ab89df24c1 100644
--- a/arch/arm/plat-samsung/gpio-config.c
+++ b/arch/arm/plat-samsung/gpio-config.c
@@ -1,7 +1,7 @@
1/* linux/arch/arm/plat-s3c/gpio-config.c 1/* linux/arch/arm/plat-s3c/gpio-config.c
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008-2010 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk> 5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/ 6 * http://armlinux.simtec.co.uk/
7 * 7 *
@@ -87,6 +87,19 @@ int s3c_gpio_setcfg_s3c24xx_a(struct s3c_gpio_chip *chip,
87 return 0; 87 return 0;
88} 88}
89 89
90unsigned s3c_gpio_getcfg_s3c24xx_a(struct s3c_gpio_chip *chip,
91 unsigned int off)
92{
93 u32 con;
94
95 con = __raw_readl(chip->base);
96 con >>= off;
97 con &= 1;
98 con++;
99
100 return S3C_GPIO_SFN(con);
101}
102
90int s3c_gpio_setcfg_s3c24xx(struct s3c_gpio_chip *chip, 103int s3c_gpio_setcfg_s3c24xx(struct s3c_gpio_chip *chip,
91 unsigned int off, unsigned int cfg) 104 unsigned int off, unsigned int cfg)
92{ 105{
@@ -109,6 +122,19 @@ int s3c_gpio_setcfg_s3c24xx(struct s3c_gpio_chip *chip,
109 122
110 return 0; 123 return 0;
111} 124}
125
126unsigned int s3c_gpio_getcfg_s3c24xx(struct s3c_gpio_chip *chip,
127 unsigned int off)
128{
129 u32 con;
130
131 con = __raw_readl(chip->base);
132 con >>= off * 2;
133 con &= 3;
134
135 /* this conversion works for IN and OUT as well as special mode */
136 return S3C_GPIO_SPECIAL(con);
137}
112#endif 138#endif
113 139
114#ifdef CONFIG_S3C_GPIO_CFG_S3C64XX 140#ifdef CONFIG_S3C_GPIO_CFG_S3C64XX
@@ -134,6 +160,25 @@ int s3c_gpio_setcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip,
134 160
135 return 0; 161 return 0;
136} 162}
163
164unsigned s3c_gpio_getcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip,
165 unsigned int off)
166{
167 void __iomem *reg = chip->base;
168 unsigned int shift = (off & 7) * 4;
169 u32 con;
170
171 if (off < 8 && chip->chip.ngpio > 8)
172 reg -= 4;
173
174 con = __raw_readl(reg);
175 con >>= shift;
176 con &= 0xf;
177
178 /* this conversion works for IN and OUT as well as special mode */
179 return S3C_GPIO_SPECIAL(con);
180}
181
137#endif /* CONFIG_S3C_GPIO_CFG_S3C64XX */ 182#endif /* CONFIG_S3C_GPIO_CFG_S3C64XX */
138 183
139#ifdef CONFIG_S3C_GPIO_PULL_UPDOWN 184#ifdef CONFIG_S3C_GPIO_PULL_UPDOWN
diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h b/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h
index 885e9ac642d3..a8868c429f7a 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h
@@ -53,6 +53,18 @@ extern int s3c_gpio_setcfg_s3c24xx(struct s3c_gpio_chip *chip,
53 unsigned int off, unsigned int cfg); 53 unsigned int off, unsigned int cfg);
54 54
55/** 55/**
56 * s3c_gpio_getcfg_s3c24xx - S3C24XX style GPIO configuration read.
57 * @chip: The gpio chip that is being configured.
58 * @off: The offset for the GPIO being configured.
59 *
60 * The reverse of s3c_gpio_setcfg_s3c24xx(). Will return a value whicg
61 * could be directly passed back to s3c_gpio_setcfg_s3c24xx(), from the
62 * S3C_GPIO_SPECIAL() macro.
63 */
64unsigned int s3c_gpio_getcfg_s3c24xx(struct s3c_gpio_chip *chip,
65 unsigned int off);
66
67/**
56 * s3c_gpio_setcfg_s3c24xx_a - S3C24XX style GPIO configuration (Bank A) 68 * s3c_gpio_setcfg_s3c24xx_a - S3C24XX style GPIO configuration (Bank A)
57 * @chip: The gpio chip that is being configured. 69 * @chip: The gpio chip that is being configured.
58 * @off: The offset for the GPIO being configured. 70 * @off: The offset for the GPIO being configured.
@@ -65,6 +77,21 @@ extern int s3c_gpio_setcfg_s3c24xx(struct s3c_gpio_chip *chip,
65extern int s3c_gpio_setcfg_s3c24xx_a(struct s3c_gpio_chip *chip, 77extern int s3c_gpio_setcfg_s3c24xx_a(struct s3c_gpio_chip *chip,
66 unsigned int off, unsigned int cfg); 78 unsigned int off, unsigned int cfg);
67 79
80
81/**
82 * s3c_gpio_getcfg_s3c24xx_a - S3C24XX style GPIO configuration read (Bank A)
83 * @chip: The gpio chip that is being configured.
84 * @off: The offset for the GPIO being configured.
85 *
86 * The reverse of s3c_gpio_setcfg_s3c24xx_a() turning an GPIO into a usable
87 * GPIO configuration value.
88 *
89 * @sa s3c_gpio_getcfg_s3c24xx
90 * @sa s3c_gpio_getcfg_s3c64xx_4bit
91 */
92extern unsigned s3c_gpio_getcfg_s3c24xx_a(struct s3c_gpio_chip *chip,
93 unsigned int off);
94
68/** 95/**
69 * s3c_gpio_setcfg_s3c64xx_4bit - S3C64XX 4bit single register GPIO config. 96 * s3c_gpio_setcfg_s3c64xx_4bit - S3C64XX 4bit single register GPIO config.
70 * @chip: The gpio chip that is being configured. 97 * @chip: The gpio chip that is being configured.
@@ -85,6 +112,20 @@ extern int s3c_gpio_setcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip,
85 unsigned int off, unsigned int cfg); 112 unsigned int off, unsigned int cfg);
86 113
87 114
115/**
116 * s3c_gpio_getcfg_s3c64xx_4bit - S3C64XX 4bit single register GPIO config read.
117 * @chip: The gpio chip that is being configured.
118 * @off: The offset for the GPIO being configured.
119 *
120 * The reverse of s3c_gpio_setcfg_s3c64xx_4bit(), turning a gpio configuration
121 * register setting into a value the software can use, such as could be passed
122 * to s3c_gpio_setcfg_s3c64xx_4bit().
123 *
124 * @sa s3c_gpio_getcfg_s3c24xx
125 */
126extern unsigned s3c_gpio_getcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip,
127 unsigned int off);
128
88/* Pull-{up,down} resistor controls. 129/* Pull-{up,down} resistor controls.
89 * 130 *
90 * S3C2410,S3C2440,S3C24A0 = Pull-UP, 131 * S3C2410,S3C2440,S3C24A0 = Pull-UP,