diff options
Diffstat (limited to 'arch/arm/plat-samsung/include/plat/sdhci.h')
-rw-r--r-- | arch/arm/plat-samsung/include/plat/sdhci.h | 31 |
1 files changed, 0 insertions, 31 deletions
diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h index e7b3c752e919..dcff7dd1ae8a 100644 --- a/arch/arm/plat-samsung/include/plat/sdhci.h +++ b/arch/arm/plat-samsung/include/plat/sdhci.h | |||
@@ -66,8 +66,6 @@ struct s3c_sdhci_platdata { | |||
66 | enum cd_types cd_type; | 66 | enum cd_types cd_type; |
67 | enum clk_types clk_type; | 67 | enum clk_types clk_type; |
68 | 68 | ||
69 | char **clocks; /* set of clock sources */ | ||
70 | |||
71 | int ext_cd_gpio; | 69 | int ext_cd_gpio; |
72 | bool ext_cd_gpio_invert; | 70 | bool ext_cd_gpio_invert; |
73 | int (*ext_cd_init)(void (*notify_func)(struct platform_device *, | 71 | int (*ext_cd_init)(void (*notify_func)(struct platform_device *, |
@@ -129,12 +127,9 @@ extern void exynos4_setup_sdhci3_cfg_gpio(struct platform_device *, int w); | |||
129 | /* S3C2416 SDHCI setup */ | 127 | /* S3C2416 SDHCI setup */ |
130 | 128 | ||
131 | #ifdef CONFIG_S3C2416_SETUP_SDHCI | 129 | #ifdef CONFIG_S3C2416_SETUP_SDHCI |
132 | extern char *s3c2416_hsmmc_clksrcs[4]; | ||
133 | |||
134 | static inline void s3c2416_default_sdhci0(void) | 130 | static inline void s3c2416_default_sdhci0(void) |
135 | { | 131 | { |
136 | #ifdef CONFIG_S3C_DEV_HSMMC | 132 | #ifdef CONFIG_S3C_DEV_HSMMC |
137 | s3c_hsmmc0_def_platdata.clocks = s3c2416_hsmmc_clksrcs; | ||
138 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c2416_setup_sdhci0_cfg_gpio; | 133 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c2416_setup_sdhci0_cfg_gpio; |
139 | #endif /* CONFIG_S3C_DEV_HSMMC */ | 134 | #endif /* CONFIG_S3C_DEV_HSMMC */ |
140 | } | 135 | } |
@@ -142,7 +137,6 @@ static inline void s3c2416_default_sdhci0(void) | |||
142 | static inline void s3c2416_default_sdhci1(void) | 137 | static inline void s3c2416_default_sdhci1(void) |
143 | { | 138 | { |
144 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 139 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
145 | s3c_hsmmc1_def_platdata.clocks = s3c2416_hsmmc_clksrcs; | ||
146 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c2416_setup_sdhci1_cfg_gpio; | 140 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c2416_setup_sdhci1_cfg_gpio; |
147 | #endif /* CONFIG_S3C_DEV_HSMMC1 */ | 141 | #endif /* CONFIG_S3C_DEV_HSMMC1 */ |
148 | } | 142 | } |
@@ -155,12 +149,9 @@ static inline void s3c2416_default_sdhci1(void) { } | |||
155 | /* S3C64XX SDHCI setup */ | 149 | /* S3C64XX SDHCI setup */ |
156 | 150 | ||
157 | #ifdef CONFIG_S3C64XX_SETUP_SDHCI | 151 | #ifdef CONFIG_S3C64XX_SETUP_SDHCI |
158 | extern char *s3c64xx_hsmmc_clksrcs[4]; | ||
159 | |||
160 | static inline void s3c6400_default_sdhci0(void) | 152 | static inline void s3c6400_default_sdhci0(void) |
161 | { | 153 | { |
162 | #ifdef CONFIG_S3C_DEV_HSMMC | 154 | #ifdef CONFIG_S3C_DEV_HSMMC |
163 | s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | ||
164 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; | 155 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; |
165 | #endif | 156 | #endif |
166 | } | 157 | } |
@@ -168,7 +159,6 @@ static inline void s3c6400_default_sdhci0(void) | |||
168 | static inline void s3c6400_default_sdhci1(void) | 159 | static inline void s3c6400_default_sdhci1(void) |
169 | { | 160 | { |
170 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 161 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
171 | s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | ||
172 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; | 162 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; |
173 | #endif | 163 | #endif |
174 | } | 164 | } |
@@ -176,7 +166,6 @@ static inline void s3c6400_default_sdhci1(void) | |||
176 | static inline void s3c6400_default_sdhci2(void) | 166 | static inline void s3c6400_default_sdhci2(void) |
177 | { | 167 | { |
178 | #ifdef CONFIG_S3C_DEV_HSMMC2 | 168 | #ifdef CONFIG_S3C_DEV_HSMMC2 |
179 | s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | ||
180 | s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; | 169 | s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; |
181 | #endif | 170 | #endif |
182 | } | 171 | } |
@@ -184,7 +173,6 @@ static inline void s3c6400_default_sdhci2(void) | |||
184 | static inline void s3c6410_default_sdhci0(void) | 173 | static inline void s3c6410_default_sdhci0(void) |
185 | { | 174 | { |
186 | #ifdef CONFIG_S3C_DEV_HSMMC | 175 | #ifdef CONFIG_S3C_DEV_HSMMC |
187 | s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | ||
188 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; | 176 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; |
189 | #endif | 177 | #endif |
190 | } | 178 | } |
@@ -192,7 +180,6 @@ static inline void s3c6410_default_sdhci0(void) | |||
192 | static inline void s3c6410_default_sdhci1(void) | 180 | static inline void s3c6410_default_sdhci1(void) |
193 | { | 181 | { |
194 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 182 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
195 | s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | ||
196 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; | 183 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; |
197 | #endif | 184 | #endif |
198 | } | 185 | } |
@@ -200,7 +187,6 @@ static inline void s3c6410_default_sdhci1(void) | |||
200 | static inline void s3c6410_default_sdhci2(void) | 187 | static inline void s3c6410_default_sdhci2(void) |
201 | { | 188 | { |
202 | #ifdef CONFIG_S3C_DEV_HSMMC2 | 189 | #ifdef CONFIG_S3C_DEV_HSMMC2 |
203 | s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | ||
204 | s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; | 190 | s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; |
205 | #endif | 191 | #endif |
206 | } | 192 | } |
@@ -218,12 +204,9 @@ static inline void s3c6400_default_sdhci2(void) { } | |||
218 | /* S5PC100 SDHCI setup */ | 204 | /* S5PC100 SDHCI setup */ |
219 | 205 | ||
220 | #ifdef CONFIG_S5PC100_SETUP_SDHCI | 206 | #ifdef CONFIG_S5PC100_SETUP_SDHCI |
221 | extern char *s5pc100_hsmmc_clksrcs[4]; | ||
222 | |||
223 | static inline void s5pc100_default_sdhci0(void) | 207 | static inline void s5pc100_default_sdhci0(void) |
224 | { | 208 | { |
225 | #ifdef CONFIG_S3C_DEV_HSMMC | 209 | #ifdef CONFIG_S3C_DEV_HSMMC |
226 | s3c_hsmmc0_def_platdata.clocks = s5pc100_hsmmc_clksrcs; | ||
227 | s3c_hsmmc0_def_platdata.cfg_gpio = s5pc100_setup_sdhci0_cfg_gpio; | 210 | s3c_hsmmc0_def_platdata.cfg_gpio = s5pc100_setup_sdhci0_cfg_gpio; |
228 | #endif | 211 | #endif |
229 | } | 212 | } |
@@ -231,7 +214,6 @@ static inline void s5pc100_default_sdhci0(void) | |||
231 | static inline void s5pc100_default_sdhci1(void) | 214 | static inline void s5pc100_default_sdhci1(void) |
232 | { | 215 | { |
233 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 216 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
234 | s3c_hsmmc1_def_platdata.clocks = s5pc100_hsmmc_clksrcs; | ||
235 | s3c_hsmmc1_def_platdata.cfg_gpio = s5pc100_setup_sdhci1_cfg_gpio; | 217 | s3c_hsmmc1_def_platdata.cfg_gpio = s5pc100_setup_sdhci1_cfg_gpio; |
236 | #endif | 218 | #endif |
237 | } | 219 | } |
@@ -239,7 +221,6 @@ static inline void s5pc100_default_sdhci1(void) | |||
239 | static inline void s5pc100_default_sdhci2(void) | 221 | static inline void s5pc100_default_sdhci2(void) |
240 | { | 222 | { |
241 | #ifdef CONFIG_S3C_DEV_HSMMC2 | 223 | #ifdef CONFIG_S3C_DEV_HSMMC2 |
242 | s3c_hsmmc2_def_platdata.clocks = s5pc100_hsmmc_clksrcs; | ||
243 | s3c_hsmmc2_def_platdata.cfg_gpio = s5pc100_setup_sdhci2_cfg_gpio; | 224 | s3c_hsmmc2_def_platdata.cfg_gpio = s5pc100_setup_sdhci2_cfg_gpio; |
244 | #endif | 225 | #endif |
245 | } | 226 | } |
@@ -254,12 +235,9 @@ static inline void s5pc100_default_sdhci2(void) { } | |||
254 | /* S5PV210 SDHCI setup */ | 235 | /* S5PV210 SDHCI setup */ |
255 | 236 | ||
256 | #ifdef CONFIG_S5PV210_SETUP_SDHCI | 237 | #ifdef CONFIG_S5PV210_SETUP_SDHCI |
257 | extern char *s5pv210_hsmmc_clksrcs[4]; | ||
258 | |||
259 | static inline void s5pv210_default_sdhci0(void) | 238 | static inline void s5pv210_default_sdhci0(void) |
260 | { | 239 | { |
261 | #ifdef CONFIG_S3C_DEV_HSMMC | 240 | #ifdef CONFIG_S3C_DEV_HSMMC |
262 | s3c_hsmmc0_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | ||
263 | s3c_hsmmc0_def_platdata.cfg_gpio = s5pv210_setup_sdhci0_cfg_gpio; | 241 | s3c_hsmmc0_def_platdata.cfg_gpio = s5pv210_setup_sdhci0_cfg_gpio; |
264 | #endif | 242 | #endif |
265 | } | 243 | } |
@@ -267,7 +245,6 @@ static inline void s5pv210_default_sdhci0(void) | |||
267 | static inline void s5pv210_default_sdhci1(void) | 245 | static inline void s5pv210_default_sdhci1(void) |
268 | { | 246 | { |
269 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 247 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
270 | s3c_hsmmc1_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | ||
271 | s3c_hsmmc1_def_platdata.cfg_gpio = s5pv210_setup_sdhci1_cfg_gpio; | 248 | s3c_hsmmc1_def_platdata.cfg_gpio = s5pv210_setup_sdhci1_cfg_gpio; |
272 | #endif | 249 | #endif |
273 | } | 250 | } |
@@ -275,7 +252,6 @@ static inline void s5pv210_default_sdhci1(void) | |||
275 | static inline void s5pv210_default_sdhci2(void) | 252 | static inline void s5pv210_default_sdhci2(void) |
276 | { | 253 | { |
277 | #ifdef CONFIG_S3C_DEV_HSMMC2 | 254 | #ifdef CONFIG_S3C_DEV_HSMMC2 |
278 | s3c_hsmmc2_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | ||
279 | s3c_hsmmc2_def_platdata.cfg_gpio = s5pv210_setup_sdhci2_cfg_gpio; | 255 | s3c_hsmmc2_def_platdata.cfg_gpio = s5pv210_setup_sdhci2_cfg_gpio; |
280 | #endif | 256 | #endif |
281 | } | 257 | } |
@@ -283,7 +259,6 @@ static inline void s5pv210_default_sdhci2(void) | |||
283 | static inline void s5pv210_default_sdhci3(void) | 259 | static inline void s5pv210_default_sdhci3(void) |
284 | { | 260 | { |
285 | #ifdef CONFIG_S3C_DEV_HSMMC3 | 261 | #ifdef CONFIG_S3C_DEV_HSMMC3 |
286 | s3c_hsmmc3_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | ||
287 | s3c_hsmmc3_def_platdata.cfg_gpio = s5pv210_setup_sdhci3_cfg_gpio; | 262 | s3c_hsmmc3_def_platdata.cfg_gpio = s5pv210_setup_sdhci3_cfg_gpio; |
288 | #endif | 263 | #endif |
289 | } | 264 | } |
@@ -298,12 +273,9 @@ static inline void s5pv210_default_sdhci3(void) { } | |||
298 | 273 | ||
299 | /* EXYNOS4 SDHCI setup */ | 274 | /* EXYNOS4 SDHCI setup */ |
300 | #ifdef CONFIG_EXYNOS4_SETUP_SDHCI | 275 | #ifdef CONFIG_EXYNOS4_SETUP_SDHCI |
301 | extern char *exynos4_hsmmc_clksrcs[4]; | ||
302 | |||
303 | static inline void exynos4_default_sdhci0(void) | 276 | static inline void exynos4_default_sdhci0(void) |
304 | { | 277 | { |
305 | #ifdef CONFIG_S3C_DEV_HSMMC | 278 | #ifdef CONFIG_S3C_DEV_HSMMC |
306 | s3c_hsmmc0_def_platdata.clocks = exynos4_hsmmc_clksrcs; | ||
307 | s3c_hsmmc0_def_platdata.cfg_gpio = exynos4_setup_sdhci0_cfg_gpio; | 279 | s3c_hsmmc0_def_platdata.cfg_gpio = exynos4_setup_sdhci0_cfg_gpio; |
308 | #endif | 280 | #endif |
309 | } | 281 | } |
@@ -311,7 +283,6 @@ static inline void exynos4_default_sdhci0(void) | |||
311 | static inline void exynos4_default_sdhci1(void) | 283 | static inline void exynos4_default_sdhci1(void) |
312 | { | 284 | { |
313 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 285 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
314 | s3c_hsmmc1_def_platdata.clocks = exynos4_hsmmc_clksrcs; | ||
315 | s3c_hsmmc1_def_platdata.cfg_gpio = exynos4_setup_sdhci1_cfg_gpio; | 286 | s3c_hsmmc1_def_platdata.cfg_gpio = exynos4_setup_sdhci1_cfg_gpio; |
316 | #endif | 287 | #endif |
317 | } | 288 | } |
@@ -319,7 +290,6 @@ static inline void exynos4_default_sdhci1(void) | |||
319 | static inline void exynos4_default_sdhci2(void) | 290 | static inline void exynos4_default_sdhci2(void) |
320 | { | 291 | { |
321 | #ifdef CONFIG_S3C_DEV_HSMMC2 | 292 | #ifdef CONFIG_S3C_DEV_HSMMC2 |
322 | s3c_hsmmc2_def_platdata.clocks = exynos4_hsmmc_clksrcs; | ||
323 | s3c_hsmmc2_def_platdata.cfg_gpio = exynos4_setup_sdhci2_cfg_gpio; | 293 | s3c_hsmmc2_def_platdata.cfg_gpio = exynos4_setup_sdhci2_cfg_gpio; |
324 | #endif | 294 | #endif |
325 | } | 295 | } |
@@ -327,7 +297,6 @@ static inline void exynos4_default_sdhci2(void) | |||
327 | static inline void exynos4_default_sdhci3(void) | 297 | static inline void exynos4_default_sdhci3(void) |
328 | { | 298 | { |
329 | #ifdef CONFIG_S3C_DEV_HSMMC3 | 299 | #ifdef CONFIG_S3C_DEV_HSMMC3 |
330 | s3c_hsmmc3_def_platdata.clocks = exynos4_hsmmc_clksrcs; | ||
331 | s3c_hsmmc3_def_platdata.cfg_gpio = exynos4_setup_sdhci3_cfg_gpio; | 300 | s3c_hsmmc3_def_platdata.cfg_gpio = exynos4_setup_sdhci3_cfg_gpio; |
332 | #endif | 301 | #endif |
333 | } | 302 | } |