diff options
Diffstat (limited to 'arch/arm/plat-samsung/include/plat/sdhci.h')
-rw-r--r-- | arch/arm/plat-samsung/include/plat/sdhci.h | 64 |
1 files changed, 7 insertions, 57 deletions
diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h index 058e09654fe8..e7b3c752e919 100644 --- a/arch/arm/plat-samsung/include/plat/sdhci.h +++ b/arch/arm/plat-samsung/include/plat/sdhci.h | |||
@@ -55,10 +55,6 @@ enum clk_types { | |||
55 | * cd_type == S3C_SDHCI_CD_GPIO | 55 | * cd_type == S3C_SDHCI_CD_GPIO |
56 | * @ext_cd_gpio_invert: invert values for external CD gpio line | 56 | * @ext_cd_gpio_invert: invert values for external CD gpio line |
57 | * @cfg_gpio: Configure the GPIO for a specific card bit-width | 57 | * @cfg_gpio: Configure the GPIO for a specific card bit-width |
58 | * @cfg_card: Configure the interface for a specific card and speed. This | ||
59 | * is necessary the controllers and/or GPIO blocks require the | ||
60 | * changing of driver-strength and other controls dependent on | ||
61 | * the card and speed of operation. | ||
62 | * | 58 | * |
63 | * Initialisation data specific to either the machine or the platform | 59 | * Initialisation data specific to either the machine or the platform |
64 | * for the device driver to use or call-back when configuring gpio or | 60 | * for the device driver to use or call-back when configuring gpio or |
@@ -80,12 +76,15 @@ struct s3c_sdhci_platdata { | |||
80 | int state)); | 76 | int state)); |
81 | 77 | ||
82 | void (*cfg_gpio)(struct platform_device *dev, int width); | 78 | void (*cfg_gpio)(struct platform_device *dev, int width); |
83 | void (*cfg_card)(struct platform_device *dev, | ||
84 | void __iomem *regbase, | ||
85 | struct mmc_ios *ios, | ||
86 | struct mmc_card *card); | ||
87 | }; | 79 | }; |
88 | 80 | ||
81 | /* s3c_sdhci_set_platdata() - common helper for setting SDHCI platform data | ||
82 | * @pd: The default platform data for this device. | ||
83 | * @set: Pointer to the platform data to fill in. | ||
84 | */ | ||
85 | extern void s3c_sdhci_set_platdata(struct s3c_sdhci_platdata *pd, | ||
86 | struct s3c_sdhci_platdata *set); | ||
87 | |||
89 | /** | 88 | /** |
90 | * s3c_sdhci0_set_platdata - Set platform data for S3C SDHCI device. | 89 | * s3c_sdhci0_set_platdata - Set platform data for S3C SDHCI device. |
91 | * @pd: Platform data to register to device. | 90 | * @pd: Platform data to register to device. |
@@ -132,17 +131,11 @@ extern void exynos4_setup_sdhci3_cfg_gpio(struct platform_device *, int w); | |||
132 | #ifdef CONFIG_S3C2416_SETUP_SDHCI | 131 | #ifdef CONFIG_S3C2416_SETUP_SDHCI |
133 | extern char *s3c2416_hsmmc_clksrcs[4]; | 132 | extern char *s3c2416_hsmmc_clksrcs[4]; |
134 | 133 | ||
135 | extern void s3c2416_setup_sdhci_cfg_card(struct platform_device *dev, | ||
136 | void __iomem *r, | ||
137 | struct mmc_ios *ios, | ||
138 | struct mmc_card *card); | ||
139 | |||
140 | static inline void s3c2416_default_sdhci0(void) | 134 | static inline void s3c2416_default_sdhci0(void) |
141 | { | 135 | { |
142 | #ifdef CONFIG_S3C_DEV_HSMMC | 136 | #ifdef CONFIG_S3C_DEV_HSMMC |
143 | s3c_hsmmc0_def_platdata.clocks = s3c2416_hsmmc_clksrcs; | 137 | s3c_hsmmc0_def_platdata.clocks = s3c2416_hsmmc_clksrcs; |
144 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c2416_setup_sdhci0_cfg_gpio; | 138 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c2416_setup_sdhci0_cfg_gpio; |
145 | s3c_hsmmc0_def_platdata.cfg_card = s3c2416_setup_sdhci_cfg_card; | ||
146 | #endif /* CONFIG_S3C_DEV_HSMMC */ | 139 | #endif /* CONFIG_S3C_DEV_HSMMC */ |
147 | } | 140 | } |
148 | 141 | ||
@@ -151,7 +144,6 @@ static inline void s3c2416_default_sdhci1(void) | |||
151 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 144 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
152 | s3c_hsmmc1_def_platdata.clocks = s3c2416_hsmmc_clksrcs; | 145 | s3c_hsmmc1_def_platdata.clocks = s3c2416_hsmmc_clksrcs; |
153 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c2416_setup_sdhci1_cfg_gpio; | 146 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c2416_setup_sdhci1_cfg_gpio; |
154 | s3c_hsmmc1_def_platdata.cfg_card = s3c2416_setup_sdhci_cfg_card; | ||
155 | #endif /* CONFIG_S3C_DEV_HSMMC1 */ | 147 | #endif /* CONFIG_S3C_DEV_HSMMC1 */ |
156 | } | 148 | } |
157 | 149 | ||
@@ -165,17 +157,11 @@ static inline void s3c2416_default_sdhci1(void) { } | |||
165 | #ifdef CONFIG_S3C64XX_SETUP_SDHCI | 157 | #ifdef CONFIG_S3C64XX_SETUP_SDHCI |
166 | extern char *s3c64xx_hsmmc_clksrcs[4]; | 158 | extern char *s3c64xx_hsmmc_clksrcs[4]; |
167 | 159 | ||
168 | extern void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev, | ||
169 | void __iomem *r, | ||
170 | struct mmc_ios *ios, | ||
171 | struct mmc_card *card); | ||
172 | |||
173 | static inline void s3c6400_default_sdhci0(void) | 160 | static inline void s3c6400_default_sdhci0(void) |
174 | { | 161 | { |
175 | #ifdef CONFIG_S3C_DEV_HSMMC | 162 | #ifdef CONFIG_S3C_DEV_HSMMC |
176 | s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | 163 | s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; |
177 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; | 164 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; |
178 | s3c_hsmmc0_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card; | ||
179 | #endif | 165 | #endif |
180 | } | 166 | } |
181 | 167 | ||
@@ -184,7 +170,6 @@ static inline void s3c6400_default_sdhci1(void) | |||
184 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 170 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
185 | s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | 171 | s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; |
186 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; | 172 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; |
187 | s3c_hsmmc1_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card; | ||
188 | #endif | 173 | #endif |
189 | } | 174 | } |
190 | 175 | ||
@@ -193,21 +178,14 @@ static inline void s3c6400_default_sdhci2(void) | |||
193 | #ifdef CONFIG_S3C_DEV_HSMMC2 | 178 | #ifdef CONFIG_S3C_DEV_HSMMC2 |
194 | s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | 179 | s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; |
195 | s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; | 180 | s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; |
196 | s3c_hsmmc2_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card; | ||
197 | #endif | 181 | #endif |
198 | } | 182 | } |
199 | 183 | ||
200 | extern void s3c6410_setup_sdhci_cfg_card(struct platform_device *dev, | ||
201 | void __iomem *r, | ||
202 | struct mmc_ios *ios, | ||
203 | struct mmc_card *card); | ||
204 | |||
205 | static inline void s3c6410_default_sdhci0(void) | 184 | static inline void s3c6410_default_sdhci0(void) |
206 | { | 185 | { |
207 | #ifdef CONFIG_S3C_DEV_HSMMC | 186 | #ifdef CONFIG_S3C_DEV_HSMMC |
208 | s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | 187 | s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; |
209 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; | 188 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; |
210 | s3c_hsmmc0_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card; | ||
211 | #endif | 189 | #endif |
212 | } | 190 | } |
213 | 191 | ||
@@ -216,7 +194,6 @@ static inline void s3c6410_default_sdhci1(void) | |||
216 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 194 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
217 | s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | 195 | s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; |
218 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; | 196 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; |
219 | s3c_hsmmc1_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card; | ||
220 | #endif | 197 | #endif |
221 | } | 198 | } |
222 | 199 | ||
@@ -225,7 +202,6 @@ static inline void s3c6410_default_sdhci2(void) | |||
225 | #ifdef CONFIG_S3C_DEV_HSMMC2 | 202 | #ifdef CONFIG_S3C_DEV_HSMMC2 |
226 | s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | 203 | s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; |
227 | s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; | 204 | s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; |
228 | s3c_hsmmc2_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card; | ||
229 | #endif | 205 | #endif |
230 | } | 206 | } |
231 | 207 | ||
@@ -244,17 +220,11 @@ static inline void s3c6400_default_sdhci2(void) { } | |||
244 | #ifdef CONFIG_S5PC100_SETUP_SDHCI | 220 | #ifdef CONFIG_S5PC100_SETUP_SDHCI |
245 | extern char *s5pc100_hsmmc_clksrcs[4]; | 221 | extern char *s5pc100_hsmmc_clksrcs[4]; |
246 | 222 | ||
247 | extern void s5pc100_setup_sdhci0_cfg_card(struct platform_device *dev, | ||
248 | void __iomem *r, | ||
249 | struct mmc_ios *ios, | ||
250 | struct mmc_card *card); | ||
251 | |||
252 | static inline void s5pc100_default_sdhci0(void) | 223 | static inline void s5pc100_default_sdhci0(void) |
253 | { | 224 | { |
254 | #ifdef CONFIG_S3C_DEV_HSMMC | 225 | #ifdef CONFIG_S3C_DEV_HSMMC |
255 | s3c_hsmmc0_def_platdata.clocks = s5pc100_hsmmc_clksrcs; | 226 | s3c_hsmmc0_def_platdata.clocks = s5pc100_hsmmc_clksrcs; |
256 | s3c_hsmmc0_def_platdata.cfg_gpio = s5pc100_setup_sdhci0_cfg_gpio; | 227 | s3c_hsmmc0_def_platdata.cfg_gpio = s5pc100_setup_sdhci0_cfg_gpio; |
257 | s3c_hsmmc0_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card; | ||
258 | #endif | 228 | #endif |
259 | } | 229 | } |
260 | 230 | ||
@@ -263,7 +233,6 @@ static inline void s5pc100_default_sdhci1(void) | |||
263 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 233 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
264 | s3c_hsmmc1_def_platdata.clocks = s5pc100_hsmmc_clksrcs; | 234 | s3c_hsmmc1_def_platdata.clocks = s5pc100_hsmmc_clksrcs; |
265 | s3c_hsmmc1_def_platdata.cfg_gpio = s5pc100_setup_sdhci1_cfg_gpio; | 235 | s3c_hsmmc1_def_platdata.cfg_gpio = s5pc100_setup_sdhci1_cfg_gpio; |
266 | s3c_hsmmc1_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card; | ||
267 | #endif | 236 | #endif |
268 | } | 237 | } |
269 | 238 | ||
@@ -272,7 +241,6 @@ static inline void s5pc100_default_sdhci2(void) | |||
272 | #ifdef CONFIG_S3C_DEV_HSMMC2 | 241 | #ifdef CONFIG_S3C_DEV_HSMMC2 |
273 | s3c_hsmmc2_def_platdata.clocks = s5pc100_hsmmc_clksrcs; | 242 | s3c_hsmmc2_def_platdata.clocks = s5pc100_hsmmc_clksrcs; |
274 | s3c_hsmmc2_def_platdata.cfg_gpio = s5pc100_setup_sdhci2_cfg_gpio; | 243 | s3c_hsmmc2_def_platdata.cfg_gpio = s5pc100_setup_sdhci2_cfg_gpio; |
275 | s3c_hsmmc2_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card; | ||
276 | #endif | 244 | #endif |
277 | } | 245 | } |
278 | 246 | ||
@@ -288,17 +256,11 @@ static inline void s5pc100_default_sdhci2(void) { } | |||
288 | #ifdef CONFIG_S5PV210_SETUP_SDHCI | 256 | #ifdef CONFIG_S5PV210_SETUP_SDHCI |
289 | extern char *s5pv210_hsmmc_clksrcs[4]; | 257 | extern char *s5pv210_hsmmc_clksrcs[4]; |
290 | 258 | ||
291 | extern void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev, | ||
292 | void __iomem *r, | ||
293 | struct mmc_ios *ios, | ||
294 | struct mmc_card *card); | ||
295 | |||
296 | static inline void s5pv210_default_sdhci0(void) | 259 | static inline void s5pv210_default_sdhci0(void) |
297 | { | 260 | { |
298 | #ifdef CONFIG_S3C_DEV_HSMMC | 261 | #ifdef CONFIG_S3C_DEV_HSMMC |
299 | s3c_hsmmc0_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | 262 | s3c_hsmmc0_def_platdata.clocks = s5pv210_hsmmc_clksrcs; |
300 | s3c_hsmmc0_def_platdata.cfg_gpio = s5pv210_setup_sdhci0_cfg_gpio; | 263 | s3c_hsmmc0_def_platdata.cfg_gpio = s5pv210_setup_sdhci0_cfg_gpio; |
301 | s3c_hsmmc0_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card; | ||
302 | #endif | 264 | #endif |
303 | } | 265 | } |
304 | 266 | ||
@@ -307,7 +269,6 @@ static inline void s5pv210_default_sdhci1(void) | |||
307 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 269 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
308 | s3c_hsmmc1_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | 270 | s3c_hsmmc1_def_platdata.clocks = s5pv210_hsmmc_clksrcs; |
309 | s3c_hsmmc1_def_platdata.cfg_gpio = s5pv210_setup_sdhci1_cfg_gpio; | 271 | s3c_hsmmc1_def_platdata.cfg_gpio = s5pv210_setup_sdhci1_cfg_gpio; |
310 | s3c_hsmmc1_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card; | ||
311 | #endif | 272 | #endif |
312 | } | 273 | } |
313 | 274 | ||
@@ -316,7 +277,6 @@ static inline void s5pv210_default_sdhci2(void) | |||
316 | #ifdef CONFIG_S3C_DEV_HSMMC2 | 277 | #ifdef CONFIG_S3C_DEV_HSMMC2 |
317 | s3c_hsmmc2_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | 278 | s3c_hsmmc2_def_platdata.clocks = s5pv210_hsmmc_clksrcs; |
318 | s3c_hsmmc2_def_platdata.cfg_gpio = s5pv210_setup_sdhci2_cfg_gpio; | 279 | s3c_hsmmc2_def_platdata.cfg_gpio = s5pv210_setup_sdhci2_cfg_gpio; |
319 | s3c_hsmmc2_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card; | ||
320 | #endif | 280 | #endif |
321 | } | 281 | } |
322 | 282 | ||
@@ -325,7 +285,6 @@ static inline void s5pv210_default_sdhci3(void) | |||
325 | #ifdef CONFIG_S3C_DEV_HSMMC3 | 285 | #ifdef CONFIG_S3C_DEV_HSMMC3 |
326 | s3c_hsmmc3_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | 286 | s3c_hsmmc3_def_platdata.clocks = s5pv210_hsmmc_clksrcs; |
327 | s3c_hsmmc3_def_platdata.cfg_gpio = s5pv210_setup_sdhci3_cfg_gpio; | 287 | s3c_hsmmc3_def_platdata.cfg_gpio = s5pv210_setup_sdhci3_cfg_gpio; |
328 | s3c_hsmmc3_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card; | ||
329 | #endif | 288 | #endif |
330 | } | 289 | } |
331 | 290 | ||
@@ -341,17 +300,11 @@ static inline void s5pv210_default_sdhci3(void) { } | |||
341 | #ifdef CONFIG_EXYNOS4_SETUP_SDHCI | 300 | #ifdef CONFIG_EXYNOS4_SETUP_SDHCI |
342 | extern char *exynos4_hsmmc_clksrcs[4]; | 301 | extern char *exynos4_hsmmc_clksrcs[4]; |
343 | 302 | ||
344 | extern void exynos4_setup_sdhci_cfg_card(struct platform_device *dev, | ||
345 | void __iomem *r, | ||
346 | struct mmc_ios *ios, | ||
347 | struct mmc_card *card); | ||
348 | |||
349 | static inline void exynos4_default_sdhci0(void) | 303 | static inline void exynos4_default_sdhci0(void) |
350 | { | 304 | { |
351 | #ifdef CONFIG_S3C_DEV_HSMMC | 305 | #ifdef CONFIG_S3C_DEV_HSMMC |
352 | s3c_hsmmc0_def_platdata.clocks = exynos4_hsmmc_clksrcs; | 306 | s3c_hsmmc0_def_platdata.clocks = exynos4_hsmmc_clksrcs; |
353 | s3c_hsmmc0_def_platdata.cfg_gpio = exynos4_setup_sdhci0_cfg_gpio; | 307 | s3c_hsmmc0_def_platdata.cfg_gpio = exynos4_setup_sdhci0_cfg_gpio; |
354 | s3c_hsmmc0_def_platdata.cfg_card = exynos4_setup_sdhci_cfg_card; | ||
355 | #endif | 308 | #endif |
356 | } | 309 | } |
357 | 310 | ||
@@ -360,7 +313,6 @@ static inline void exynos4_default_sdhci1(void) | |||
360 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 313 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
361 | s3c_hsmmc1_def_platdata.clocks = exynos4_hsmmc_clksrcs; | 314 | s3c_hsmmc1_def_platdata.clocks = exynos4_hsmmc_clksrcs; |
362 | s3c_hsmmc1_def_platdata.cfg_gpio = exynos4_setup_sdhci1_cfg_gpio; | 315 | s3c_hsmmc1_def_platdata.cfg_gpio = exynos4_setup_sdhci1_cfg_gpio; |
363 | s3c_hsmmc1_def_platdata.cfg_card = exynos4_setup_sdhci_cfg_card; | ||
364 | #endif | 316 | #endif |
365 | } | 317 | } |
366 | 318 | ||
@@ -369,7 +321,6 @@ static inline void exynos4_default_sdhci2(void) | |||
369 | #ifdef CONFIG_S3C_DEV_HSMMC2 | 321 | #ifdef CONFIG_S3C_DEV_HSMMC2 |
370 | s3c_hsmmc2_def_platdata.clocks = exynos4_hsmmc_clksrcs; | 322 | s3c_hsmmc2_def_platdata.clocks = exynos4_hsmmc_clksrcs; |
371 | s3c_hsmmc2_def_platdata.cfg_gpio = exynos4_setup_sdhci2_cfg_gpio; | 323 | s3c_hsmmc2_def_platdata.cfg_gpio = exynos4_setup_sdhci2_cfg_gpio; |
372 | s3c_hsmmc2_def_platdata.cfg_card = exynos4_setup_sdhci_cfg_card; | ||
373 | #endif | 324 | #endif |
374 | } | 325 | } |
375 | 326 | ||
@@ -378,7 +329,6 @@ static inline void exynos4_default_sdhci3(void) | |||
378 | #ifdef CONFIG_S3C_DEV_HSMMC3 | 329 | #ifdef CONFIG_S3C_DEV_HSMMC3 |
379 | s3c_hsmmc3_def_platdata.clocks = exynos4_hsmmc_clksrcs; | 330 | s3c_hsmmc3_def_platdata.clocks = exynos4_hsmmc_clksrcs; |
380 | s3c_hsmmc3_def_platdata.cfg_gpio = exynos4_setup_sdhci3_cfg_gpio; | 331 | s3c_hsmmc3_def_platdata.cfg_gpio = exynos4_setup_sdhci3_cfg_gpio; |
381 | s3c_hsmmc3_def_platdata.cfg_card = exynos4_setup_sdhci_cfg_card; | ||
382 | #endif | 332 | #endif |
383 | } | 333 | } |
384 | 334 | ||