diff options
Diffstat (limited to 'arch/arm/plat-samsung/include/plat/s3c64xx-spi.h')
-rw-r--r-- | arch/arm/plat-samsung/include/plat/s3c64xx-spi.h | 68 |
1 files changed, 0 insertions, 68 deletions
diff --git a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h deleted file mode 100644 index ceba18d23a5a..000000000000 --- a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h +++ /dev/null | |||
@@ -1,68 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h | ||
2 | * | ||
3 | * Copyright (C) 2009 Samsung Electronics Ltd. | ||
4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #ifndef __S3C64XX_PLAT_SPI_H | ||
12 | #define __S3C64XX_PLAT_SPI_H | ||
13 | |||
14 | struct platform_device; | ||
15 | |||
16 | /** | ||
17 | * struct s3c64xx_spi_csinfo - ChipSelect description | ||
18 | * @fb_delay: Slave specific feedback delay. | ||
19 | * Refer to FB_CLK_SEL register definition in SPI chapter. | ||
20 | * @line: Custom 'identity' of the CS line. | ||
21 | * | ||
22 | * This is per SPI-Slave Chipselect information. | ||
23 | * Allocate and initialize one in machine init code and make the | ||
24 | * spi_board_info.controller_data point to it. | ||
25 | */ | ||
26 | struct s3c64xx_spi_csinfo { | ||
27 | u8 fb_delay; | ||
28 | unsigned line; | ||
29 | }; | ||
30 | |||
31 | /** | ||
32 | * struct s3c64xx_spi_info - SPI Controller defining structure | ||
33 | * @src_clk_nr: Clock source index for the CLK_CFG[SPI_CLKSEL] field. | ||
34 | * @num_cs: Number of CS this controller emulates. | ||
35 | * @cfg_gpio: Configure pins for this SPI controller. | ||
36 | */ | ||
37 | struct s3c64xx_spi_info { | ||
38 | int src_clk_nr; | ||
39 | int num_cs; | ||
40 | int (*cfg_gpio)(void); | ||
41 | }; | ||
42 | |||
43 | /** | ||
44 | * s3c64xx_spi_set_platdata - SPI Controller configure callback by the board | ||
45 | * initialization code. | ||
46 | * @cfg_gpio: Pointer to gpio setup function. | ||
47 | * @src_clk_nr: Clock the SPI controller is to use to generate SPI clocks. | ||
48 | * @num_cs: Number of elements in the 'cs' array. | ||
49 | * | ||
50 | * Call this from machine init code for each SPI Controller that | ||
51 | * has some chips attached to it. | ||
52 | */ | ||
53 | extern void s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr, | ||
54 | int num_cs); | ||
55 | extern void s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr, | ||
56 | int num_cs); | ||
57 | extern void s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr, | ||
58 | int num_cs); | ||
59 | |||
60 | /* defined by architecture to configure gpio */ | ||
61 | extern int s3c64xx_spi0_cfg_gpio(void); | ||
62 | extern int s3c64xx_spi1_cfg_gpio(void); | ||
63 | extern int s3c64xx_spi2_cfg_gpio(void); | ||
64 | |||
65 | extern struct s3c64xx_spi_info s3c64xx_spi0_pdata; | ||
66 | extern struct s3c64xx_spi_info s3c64xx_spi1_pdata; | ||
67 | extern struct s3c64xx_spi_info s3c64xx_spi2_pdata; | ||
68 | #endif /* __S3C64XX_PLAT_SPI_H */ | ||