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Diffstat (limited to 'arch/arm/plat-s5p/include/plat/irqs.h')
-rw-r--r--arch/arm/plat-s5p/include/plat/irqs.h18
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/plat-s5p/include/plat/irqs.h b/arch/arm/plat-s5p/include/plat/irqs.h
index 3fb3a3a17465..ba9121c60a2a 100644
--- a/arch/arm/plat-s5p/include/plat/irqs.h
+++ b/arch/arm/plat-s5p/include/plat/irqs.h
@@ -94,4 +94,22 @@
94 ((irq) - S5P_EINT_BASE1) : \ 94 ((irq) - S5P_EINT_BASE1) : \
95 ((irq) + 16 - S5P_EINT_BASE2)) 95 ((irq) + 16 - S5P_EINT_BASE2))
96 96
97#define IRQ_EINT_BIT(x) EINT_OFFSET(x)
98
99/* Typically only a few gpio chips require gpio interrupt support.
100 To avoid memory waste irq descriptors are allocated only for
101 S5P_GPIOINT_GROUP_COUNT chips, each with total number of
102 S5P_GPIOINT_GROUP_SIZE pins/irqs. Each GPIOINT group can be assiged
103 to any gpio chip with the s5p_register_gpio_interrupt() function */
104#define S5P_GPIOINT_GROUP_COUNT 4
105#define S5P_GPIOINT_GROUP_SIZE 8
106#define S5P_GPIOINT_COUNT (S5P_GPIOINT_GROUP_COUNT * S5P_GPIOINT_GROUP_SIZE)
107
108/* IRQ types common for all s5p platforms */
109#define S5P_IRQ_TYPE_LEVEL_LOW (0x00)
110#define S5P_IRQ_TYPE_LEVEL_HIGH (0x01)
111#define S5P_IRQ_TYPE_EDGE_FALLING (0x02)
112#define S5P_IRQ_TYPE_EDGE_RISING (0x03)
113#define S5P_IRQ_TYPE_EDGE_BOTH (0x04)
114
97#endif /* __ASM_PLAT_S5P_IRQS_H */ 115#endif /* __ASM_PLAT_S5P_IRQS_H */