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1/* linux/arch/arm/plat-s3c24xx/devs.c
2 *
3 * Copyright (c) 2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Base S3C24XX platform device definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12*/
13
14#include <linux/kernel.h>
15#include <linux/types.h>
16#include <linux/interrupt.h>
17#include <linux/list.h>
18#include <linux/timer.h>
19#include <linux/init.h>
20#include <linux/serial_core.h>
21#include <linux/platform_device.h>
22
23#include <asm/mach/arch.h>
24#include <asm/mach/map.h>
25#include <asm/mach/irq.h>
26#include <asm/arch/fb.h>
27#include <asm/hardware.h>
28#include <asm/io.h>
29#include <asm/irq.h>
30
31#include <asm/arch/regs-serial.h>
32#include <asm/arch/udc.h>
33
34#include <asm/plat-s3c24xx/devs.h>
35#include <asm/plat-s3c24xx/cpu.h>
36
37/* Serial port registrations */
38
39static struct resource s3c2410_uart0_resource[] = {
40 [0] = {
41 .start = S3C2410_PA_UART0,
42 .end = S3C2410_PA_UART0 + 0x3fff,
43 .flags = IORESOURCE_MEM,
44 },
45 [1] = {
46 .start = IRQ_S3CUART_RX0,
47 .end = IRQ_S3CUART_ERR0,
48 .flags = IORESOURCE_IRQ,
49 }
50};
51
52static struct resource s3c2410_uart1_resource[] = {
53 [0] = {
54 .start = S3C2410_PA_UART1,
55 .end = S3C2410_PA_UART1 + 0x3fff,
56 .flags = IORESOURCE_MEM,
57 },
58 [1] = {
59 .start = IRQ_S3CUART_RX1,
60 .end = IRQ_S3CUART_ERR1,
61 .flags = IORESOURCE_IRQ,
62 }
63};
64
65static struct resource s3c2410_uart2_resource[] = {
66 [0] = {
67 .start = S3C2410_PA_UART2,
68 .end = S3C2410_PA_UART2 + 0x3fff,
69 .flags = IORESOURCE_MEM,
70 },
71 [1] = {
72 .start = IRQ_S3CUART_RX2,
73 .end = IRQ_S3CUART_ERR2,
74 .flags = IORESOURCE_IRQ,
75 }
76};
77
78struct s3c24xx_uart_resources s3c2410_uart_resources[] __initdata = {
79 [0] = {
80 .resources = s3c2410_uart0_resource,
81 .nr_resources = ARRAY_SIZE(s3c2410_uart0_resource),
82 },
83 [1] = {
84 .resources = s3c2410_uart1_resource,
85 .nr_resources = ARRAY_SIZE(s3c2410_uart1_resource),
86 },
87 [2] = {
88 .resources = s3c2410_uart2_resource,
89 .nr_resources = ARRAY_SIZE(s3c2410_uart2_resource),
90 },
91};
92
93/* yart devices */
94
95static struct platform_device s3c24xx_uart_device0 = {
96 .id = 0,
97};
98
99static struct platform_device s3c24xx_uart_device1 = {
100 .id = 1,
101};
102
103static struct platform_device s3c24xx_uart_device2 = {
104 .id = 2,
105};
106
107struct platform_device *s3c24xx_uart_src[3] = {
108 &s3c24xx_uart_device0,
109 &s3c24xx_uart_device1,
110 &s3c24xx_uart_device2,
111};
112
113struct platform_device *s3c24xx_uart_devs[3] = {
114};
115
116/* USB Host Controller */
117
118static struct resource s3c_usb_resource[] = {
119 [0] = {
120 .start = S3C24XX_PA_USBHOST,
121 .end = S3C24XX_PA_USBHOST + S3C24XX_SZ_USBHOST - 1,
122 .flags = IORESOURCE_MEM,
123 },
124 [1] = {
125 .start = IRQ_USBH,
126 .end = IRQ_USBH,
127 .flags = IORESOURCE_IRQ,
128 }
129};
130
131static u64 s3c_device_usb_dmamask = 0xffffffffUL;
132
133struct platform_device s3c_device_usb = {
134 .name = "s3c2410-ohci",
135 .id = -1,
136 .num_resources = ARRAY_SIZE(s3c_usb_resource),
137 .resource = s3c_usb_resource,
138 .dev = {
139 .dma_mask = &s3c_device_usb_dmamask,
140 .coherent_dma_mask = 0xffffffffUL
141 }
142};
143
144EXPORT_SYMBOL(s3c_device_usb);
145
146/* LCD Controller */
147
148static struct resource s3c_lcd_resource[] = {
149 [0] = {
150 .start = S3C24XX_PA_LCD,
151 .end = S3C24XX_PA_LCD + S3C24XX_SZ_LCD - 1,
152 .flags = IORESOURCE_MEM,
153 },
154 [1] = {
155 .start = IRQ_LCD,
156 .end = IRQ_LCD,
157 .flags = IORESOURCE_IRQ,
158 }
159
160};
161
162static u64 s3c_device_lcd_dmamask = 0xffffffffUL;
163
164struct platform_device s3c_device_lcd = {
165 .name = "s3c2410-lcd",
166 .id = -1,
167 .num_resources = ARRAY_SIZE(s3c_lcd_resource),
168 .resource = s3c_lcd_resource,
169 .dev = {
170 .dma_mask = &s3c_device_lcd_dmamask,
171 .coherent_dma_mask = 0xffffffffUL
172 }
173};
174
175EXPORT_SYMBOL(s3c_device_lcd);
176
177void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
178{
179 struct s3c2410fb_mach_info *npd;
180
181 npd = kmalloc(sizeof(*npd), GFP_KERNEL);
182 if (npd) {
183 memcpy(npd, pd, sizeof(*npd));
184 s3c_device_lcd.dev.platform_data = npd;
185 } else {
186 printk(KERN_ERR "no memory for LCD platform data\n");
187 }
188}
189
190/* NAND Controller */
191
192static struct resource s3c_nand_resource[] = {
193 [0] = {
194 .start = S3C2410_PA_NAND,
195 .end = S3C2410_PA_NAND + S3C24XX_SZ_NAND - 1,
196 .flags = IORESOURCE_MEM,
197 }
198};
199
200struct platform_device s3c_device_nand = {
201 .name = "s3c2410-nand",
202 .id = -1,
203 .num_resources = ARRAY_SIZE(s3c_nand_resource),
204 .resource = s3c_nand_resource,
205};
206
207EXPORT_SYMBOL(s3c_device_nand);
208
209/* USB Device (Gadget)*/
210
211static struct resource s3c_usbgadget_resource[] = {
212 [0] = {
213 .start = S3C24XX_PA_USBDEV,
214 .end = S3C24XX_PA_USBDEV + S3C24XX_SZ_USBDEV - 1,
215 .flags = IORESOURCE_MEM,
216 },
217 [1] = {
218 .start = IRQ_USBD,
219 .end = IRQ_USBD,
220 .flags = IORESOURCE_IRQ,
221 }
222
223};
224
225struct platform_device s3c_device_usbgadget = {
226 .name = "s3c2410-usbgadget",
227 .id = -1,
228 .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
229 .resource = s3c_usbgadget_resource,
230};
231
232EXPORT_SYMBOL(s3c_device_usbgadget);
233
234void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
235{
236 struct s3c2410_udc_mach_info *npd;
237
238 npd = kmalloc(sizeof(*npd), GFP_KERNEL);
239 if (npd) {
240 memcpy(npd, pd, sizeof(*npd));
241 s3c_device_usbgadget.dev.platform_data = npd;
242 } else {
243 printk(KERN_ERR "no memory for udc platform data\n");
244 }
245}
246
247
248/* Watchdog */
249
250static struct resource s3c_wdt_resource[] = {
251 [0] = {
252 .start = S3C24XX_PA_WATCHDOG,
253 .end = S3C24XX_PA_WATCHDOG + S3C24XX_SZ_WATCHDOG - 1,
254 .flags = IORESOURCE_MEM,
255 },
256 [1] = {
257 .start = IRQ_WDT,
258 .end = IRQ_WDT,
259 .flags = IORESOURCE_IRQ,
260 }
261
262};
263
264struct platform_device s3c_device_wdt = {
265 .name = "s3c2410-wdt",
266 .id = -1,
267 .num_resources = ARRAY_SIZE(s3c_wdt_resource),
268 .resource = s3c_wdt_resource,
269};
270
271EXPORT_SYMBOL(s3c_device_wdt);
272
273/* I2C */
274
275static struct resource s3c_i2c_resource[] = {
276 [0] = {
277 .start = S3C24XX_PA_IIC,
278 .end = S3C24XX_PA_IIC + S3C24XX_SZ_IIC - 1,
279 .flags = IORESOURCE_MEM,
280 },
281 [1] = {
282 .start = IRQ_IIC,
283 .end = IRQ_IIC,
284 .flags = IORESOURCE_IRQ,
285 }
286
287};
288
289struct platform_device s3c_device_i2c = {
290 .name = "s3c2410-i2c",
291 .id = -1,
292 .num_resources = ARRAY_SIZE(s3c_i2c_resource),
293 .resource = s3c_i2c_resource,
294};
295
296EXPORT_SYMBOL(s3c_device_i2c);
297
298/* IIS */
299
300static struct resource s3c_iis_resource[] = {
301 [0] = {
302 .start = S3C24XX_PA_IIS,
303 .end = S3C24XX_PA_IIS + S3C24XX_SZ_IIS -1,
304 .flags = IORESOURCE_MEM,
305 }
306};
307
308static u64 s3c_device_iis_dmamask = 0xffffffffUL;
309
310struct platform_device s3c_device_iis = {
311 .name = "s3c2410-iis",
312 .id = -1,
313 .num_resources = ARRAY_SIZE(s3c_iis_resource),
314 .resource = s3c_iis_resource,
315 .dev = {
316 .dma_mask = &s3c_device_iis_dmamask,
317 .coherent_dma_mask = 0xffffffffUL
318 }
319};
320
321EXPORT_SYMBOL(s3c_device_iis);
322
323/* RTC */
324
325static struct resource s3c_rtc_resource[] = {
326 [0] = {
327 .start = S3C24XX_PA_RTC,
328 .end = S3C24XX_PA_RTC + 0xff,
329 .flags = IORESOURCE_MEM,
330 },
331 [1] = {
332 .start = IRQ_RTC,
333 .end = IRQ_RTC,
334 .flags = IORESOURCE_IRQ,
335 },
336 [2] = {
337 .start = IRQ_TICK,
338 .end = IRQ_TICK,
339 .flags = IORESOURCE_IRQ
340 }
341};
342
343struct platform_device s3c_device_rtc = {
344 .name = "s3c2410-rtc",
345 .id = -1,
346 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
347 .resource = s3c_rtc_resource,
348};
349
350EXPORT_SYMBOL(s3c_device_rtc);
351
352/* ADC */
353
354static struct resource s3c_adc_resource[] = {
355 [0] = {
356 .start = S3C24XX_PA_ADC,
357 .end = S3C24XX_PA_ADC + S3C24XX_SZ_ADC - 1,
358 .flags = IORESOURCE_MEM,
359 },
360 [1] = {
361 .start = IRQ_TC,
362 .end = IRQ_TC,
363 .flags = IORESOURCE_IRQ,
364 },
365 [2] = {
366 .start = IRQ_ADC,
367 .end = IRQ_ADC,
368 .flags = IORESOURCE_IRQ,
369 }
370
371};
372
373struct platform_device s3c_device_adc = {
374 .name = "s3c2410-adc",
375 .id = -1,
376 .num_resources = ARRAY_SIZE(s3c_adc_resource),
377 .resource = s3c_adc_resource,
378};
379
380/* SDI */
381
382static struct resource s3c_sdi_resource[] = {
383 [0] = {
384 .start = S3C2410_PA_SDI,
385 .end = S3C2410_PA_SDI + S3C24XX_SZ_SDI - 1,
386 .flags = IORESOURCE_MEM,
387 },
388 [1] = {
389 .start = IRQ_SDI,
390 .end = IRQ_SDI,
391 .flags = IORESOURCE_IRQ,
392 }
393
394};
395
396struct platform_device s3c_device_sdi = {
397 .name = "s3c2410-sdi",
398 .id = -1,
399 .num_resources = ARRAY_SIZE(s3c_sdi_resource),
400 .resource = s3c_sdi_resource,
401};
402
403EXPORT_SYMBOL(s3c_device_sdi);
404
405/* SPI (0) */
406
407static struct resource s3c_spi0_resource[] = {
408 [0] = {
409 .start = S3C24XX_PA_SPI,
410 .end = S3C24XX_PA_SPI + 0x1f,
411 .flags = IORESOURCE_MEM,
412 },
413 [1] = {
414 .start = IRQ_SPI0,
415 .end = IRQ_SPI0,
416 .flags = IORESOURCE_IRQ,
417 }
418
419};
420
421static u64 s3c_device_spi0_dmamask = 0xffffffffUL;
422
423struct platform_device s3c_device_spi0 = {
424 .name = "s3c2410-spi",
425 .id = 0,
426 .num_resources = ARRAY_SIZE(s3c_spi0_resource),
427 .resource = s3c_spi0_resource,
428 .dev = {
429 .dma_mask = &s3c_device_spi0_dmamask,
430 .coherent_dma_mask = 0xffffffffUL
431 }
432};
433
434EXPORT_SYMBOL(s3c_device_spi0);
435
436/* SPI (1) */
437
438static struct resource s3c_spi1_resource[] = {
439 [0] = {
440 .start = S3C24XX_PA_SPI + 0x20,
441 .end = S3C24XX_PA_SPI + 0x20 + 0x1f,
442 .flags = IORESOURCE_MEM,
443 },
444 [1] = {
445 .start = IRQ_SPI1,
446 .end = IRQ_SPI1,
447 .flags = IORESOURCE_IRQ,
448 }
449
450};
451
452static u64 s3c_device_spi1_dmamask = 0xffffffffUL;
453
454struct platform_device s3c_device_spi1 = {
455 .name = "s3c2410-spi",
456 .id = 1,
457 .num_resources = ARRAY_SIZE(s3c_spi1_resource),
458 .resource = s3c_spi1_resource,
459 .dev = {
460 .dma_mask = &s3c_device_spi1_dmamask,
461 .coherent_dma_mask = 0xffffffffUL
462 }
463};
464
465EXPORT_SYMBOL(s3c_device_spi1);
466
467/* pwm timer blocks */
468
469static struct resource s3c_timer0_resource[] = {
470 [0] = {
471 .start = S3C24XX_PA_TIMER + 0x0C,
472 .end = S3C24XX_PA_TIMER + 0x0C + 0xB,
473 .flags = IORESOURCE_MEM,
474 },
475 [1] = {
476 .start = IRQ_TIMER0,
477 .end = IRQ_TIMER0,
478 .flags = IORESOURCE_IRQ,
479 }
480
481};
482
483struct platform_device s3c_device_timer0 = {
484 .name = "s3c2410-timer",
485 .id = 0,
486 .num_resources = ARRAY_SIZE(s3c_timer0_resource),
487 .resource = s3c_timer0_resource,
488};
489
490EXPORT_SYMBOL(s3c_device_timer0);
491
492/* timer 1 */
493
494static struct resource s3c_timer1_resource[] = {
495 [0] = {
496 .start = S3C24XX_PA_TIMER + 0x18,
497 .end = S3C24XX_PA_TIMER + 0x23,
498 .flags = IORESOURCE_MEM,
499 },
500 [1] = {
501 .start = IRQ_TIMER1,
502 .end = IRQ_TIMER1,
503 .flags = IORESOURCE_IRQ,
504 }
505
506};
507
508struct platform_device s3c_device_timer1 = {
509 .name = "s3c2410-timer",
510 .id = 1,
511 .num_resources = ARRAY_SIZE(s3c_timer1_resource),
512 .resource = s3c_timer1_resource,
513};
514
515EXPORT_SYMBOL(s3c_device_timer1);
516
517/* timer 2 */
518
519static struct resource s3c_timer2_resource[] = {
520 [0] = {
521 .start = S3C24XX_PA_TIMER + 0x24,
522 .end = S3C24XX_PA_TIMER + 0x2F,
523 .flags = IORESOURCE_MEM,
524 },
525 [1] = {
526 .start = IRQ_TIMER2,
527 .end = IRQ_TIMER2,
528 .flags = IORESOURCE_IRQ,
529 }
530
531};
532
533struct platform_device s3c_device_timer2 = {
534 .name = "s3c2410-timer",
535 .id = 2,
536 .num_resources = ARRAY_SIZE(s3c_timer2_resource),
537 .resource = s3c_timer2_resource,
538};
539
540EXPORT_SYMBOL(s3c_device_timer2);
541
542/* timer 3 */
543
544static struct resource s3c_timer3_resource[] = {
545 [0] = {
546 .start = S3C24XX_PA_TIMER + 0x30,
547 .end = S3C24XX_PA_TIMER + 0x3B,
548 .flags = IORESOURCE_MEM,
549 },
550 [1] = {
551 .start = IRQ_TIMER3,
552 .end = IRQ_TIMER3,
553 .flags = IORESOURCE_IRQ,
554 }
555
556};
557
558struct platform_device s3c_device_timer3 = {
559 .name = "s3c2410-timer",
560 .id = 3,
561 .num_resources = ARRAY_SIZE(s3c_timer3_resource),
562 .resource = s3c_timer3_resource,
563};
564
565EXPORT_SYMBOL(s3c_device_timer3);
566
567#ifdef CONFIG_CPU_S3C2440
568
569/* Camif Controller */
570
571static struct resource s3c_camif_resource[] = {
572 [0] = {
573 .start = S3C2440_PA_CAMIF,
574 .end = S3C2440_PA_CAMIF + S3C2440_SZ_CAMIF - 1,
575 .flags = IORESOURCE_MEM,
576 },
577 [1] = {
578 .start = IRQ_CAM,
579 .end = IRQ_CAM,
580 .flags = IORESOURCE_IRQ,
581 }
582
583};
584
585static u64 s3c_device_camif_dmamask = 0xffffffffUL;
586
587struct platform_device s3c_device_camif = {
588 .name = "s3c2440-camif",
589 .id = -1,
590 .num_resources = ARRAY_SIZE(s3c_camif_resource),
591 .resource = s3c_camif_resource,
592 .dev = {
593 .dma_mask = &s3c_device_camif_dmamask,
594 .coherent_dma_mask = 0xffffffffUL
595 }
596};
597
598EXPORT_SYMBOL(s3c_device_camif);
599
600#endif // CONFIG_CPU_S32440