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-rw-r--r--arch/arm/plat-orion/time.c21
1 files changed, 2 insertions, 19 deletions
diff --git a/arch/arm/plat-orion/time.c b/arch/arm/plat-orion/time.c
index 742b0323c57b..69a61367e4b8 100644
--- a/arch/arm/plat-orion/time.c
+++ b/arch/arm/plat-orion/time.c
@@ -81,24 +81,6 @@ static void __init setup_sched_clock(unsigned long tclk)
81} 81}
82 82
83/* 83/*
84 * Clocksource handling.
85 */
86static cycle_t orion_clksrc_read(struct clocksource *cs)
87{
88 return 0xffffffff - readl(timer_base + TIMER0_VAL_OFF);
89}
90
91static struct clocksource orion_clksrc = {
92 .name = "orion_clocksource",
93 .rating = 300,
94 .read = orion_clksrc_read,
95 .mask = CLOCKSOURCE_MASK(32),
96 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
97};
98
99
100
101/*
102 * Clockevent handling. 84 * Clockevent handling.
103 */ 85 */
104static int 86static int
@@ -247,7 +229,8 @@ orion_time_init(u32 _bridge_base, u32 _bridge_timer1_clr_mask,
247 writel(u & ~BRIDGE_INT_TIMER0, bridge_base + BRIDGE_MASK_OFF); 229 writel(u & ~BRIDGE_INT_TIMER0, bridge_base + BRIDGE_MASK_OFF);
248 u = readl(timer_base + TIMER_CTRL_OFF); 230 u = readl(timer_base + TIMER_CTRL_OFF);
249 writel(u | TIMER0_EN | TIMER0_RELOAD_EN, timer_base + TIMER_CTRL_OFF); 231 writel(u | TIMER0_EN | TIMER0_RELOAD_EN, timer_base + TIMER_CTRL_OFF);
250 clocksource_register_hz(&orion_clksrc, tclk); 232 clocksource_mmio_init(timer_base + TIMER0_VAL_OFF, "orion_clocksource",
233 tclk, 300, 32, clocksource_mmio_readl_down);
251 234
252 /* 235 /*
253 * Setup clockevent timer (interrupt-driven). 236 * Setup clockevent timer (interrupt-driven).