9 files changed, 56 insertions, 190 deletions

diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
index 44ae077dbc28..2132c4f389e1 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -28,19 +28,20 @@
 
 #include <plat/clock.h>
 
+/* OMAP2_32KSYNCNT_CR_OFF: offset of 32ksync counter register */
+#define OMAP2_32KSYNCNT_CR_OFF          0x10
+
 /*
  * 32KHz clocksource ... always available, on pretty most chips except
  * OMAP 730 and 1510.  Other timers could be used as clocksources, with
  * higher resolution in free-running counter modes (e.g. 12 MHz xtal),
  * but systems won't necessarily want to spend resources that way.
  */
-static void __iomem *timer_32k_base;
-
-#define OMAP16XX_TIMER_32K_SYNCHRONIZED         0xfffbc410
+static void __iomem *sync32k_cnt_reg;
 
 static u32 notrace omap_32k_read_sched_clock(void)
 {
-        return timer_32k_base ? __raw_readl(timer_32k_base) : 0;
+        return sync32k_cnt_reg ? __raw_readl(sync32k_cnt_reg) : 0;
 }
 
 /**
@@ -60,7 +61,7 @@ static void omap_read_persistent_clock(struct timespec *ts)
         struct timespec *tsp = &persistent_ts;
 
         last_cycles = cycles;
-        cycles = timer_32k_base ? __raw_readl(timer_32k_base) : 0;
+        cycles = sync32k_cnt_reg ? __raw_readl(sync32k_cnt_reg) : 0;
         delta = cycles - last_cycles;
 
         nsecs = clocksource_cyc2ns(delta, persistent_mult, persistent_shift);
@@ -69,55 +70,41 @@ static void omap_read_persistent_clock(struct timespec *ts)
         *ts = *tsp;
 }
 
-int __init omap_init_clocksource_32k(void)
+/**
+ * omap_init_clocksource_32k - setup and register counter 32k as a
+ * kernel clocksource
+ * @pbase: base addr of counter_32k module
+ * @size: size of counter_32k to map
+ *
+ * Returns 0 upon success or negative error code upon failure.
+ *
+ */
+int __init omap_init_clocksource_32k(void __iomem *vbase)
 {
-        static char err[] __initdata = KERN_ERR
-                        "%s: can't register clocksource!\n";
-
-        if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
-                u32 pbase;
-                unsigned long size = SZ_4K;
-                void __iomem *base;
-                struct clk *sync_32k_ick;
-
-                if (cpu_is_omap16xx()) {
-                        pbase = OMAP16XX_TIMER_32K_SYNCHRONIZED;
-                        size = SZ_1K;
-                } else if (cpu_is_omap2420())
-                        pbase = OMAP2420_32KSYNCT_BASE + 0x10;
-                else if (cpu_is_omap2430())
-                        pbase = OMAP2430_32KSYNCT_BASE + 0x10;
-                else if (cpu_is_omap34xx())
-                        pbase = OMAP3430_32KSYNCT_BASE + 0x10;
-                else if (cpu_is_omap44xx())
-                        pbase = OMAP4430_32KSYNCT_BASE + 0x10;
-                else
-                        return -ENODEV;
-
-                /* For this to work we must have a static mapping in io.c for this area */
-                base = ioremap(pbase, size);
-                if (!base)
-                        return -ENODEV;
-
-                sync_32k_ick = clk_get(NULL, "omap_32ksync_ick");
-                if (!IS_ERR(sync_32k_ick))
-                        clk_enable(sync_32k_ick);
-
-                timer_32k_base = base;
-
-                /*
-                 * 120000 rough estimate from the calculations in
-                 * __clocksource_updatefreq_scale.
-                 */
-                clocks_calc_mult_shift(&persistent_mult, &persistent_shift,
-                                32768, NSEC_PER_SEC, 120000);
-
-                if (clocksource_mmio_init(base, "32k_counter", 32768, 250, 32,
-                                          clocksource_mmio_readl_up))
-                        printk(err, "32k_counter");
-
-                setup_sched_clock(omap_32k_read_sched_clock, 32, 32768);
-                register_persistent_clock(NULL, omap_read_persistent_clock);
+        int ret;
+
+        /*
+         * 32k sync Counter register offset is at 0x10
+         */
+        sync32k_cnt_reg = vbase + OMAP2_32KSYNCNT_CR_OFF;
+
+        /*
+         * 120000 rough estimate from the calculations in
+         * __clocksource_updatefreq_scale.
+         */
+        clocks_calc_mult_shift(&persistent_mult, &persistent_shift,
+                        32768, NSEC_PER_SEC, 120000);
+
+        ret = clocksource_mmio_init(sync32k_cnt_reg, "32k_counter", 32768,
+                                250, 32, clocksource_mmio_readl_up);
+        if (ret) {
+                pr_err("32k_counter: can't register clocksource\n");
+                return ret;
         }
+
+        setup_sched_clock(omap_32k_read_sched_clock, 32, 32768);
+        register_persistent_clock(NULL, omap_read_persistent_clock);
+        pr_info("OMAP clocksource: 32k_counter at 32768 Hz\n");
+
         return 0;
 }
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
index 09b07d252892..1cba9273d2cb 100644
--- a/arch/arm/plat-omap/devices.c
+++ b/arch/arm/plat-omap/devices.c
@@ -28,54 +28,6 @@
 #include <plat/menelaus.h>
 #include <plat/omap44xx.h>
 
-#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \
-        defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
-
-#define OMAP_MMC_NR_RES         2
-
-/*
- * Register MMC devices. Called from mach-omap1 and mach-omap2 device init.
- */
-int __init omap_mmc_add(const char *name, int id, unsigned long base,
-                                unsigned long size, unsigned int irq,
-                                struct omap_mmc_platform_data *data)
-{
-        struct platform_device *pdev;
-        struct resource res[OMAP_MMC_NR_RES];
-        int ret;
-
-        pdev = platform_device_alloc(name, id);
-        if (!pdev)
-                return -ENOMEM;
-
-        memset(res, 0, OMAP_MMC_NR_RES * sizeof(struct resource));
-        res[0].start = base;
-        res[0].end = base + size - 1;
-        res[0].flags = IORESOURCE_MEM;
-        res[1].start = res[1].end = irq;
-        res[1].flags = IORESOURCE_IRQ;
-
-        ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res));
-        if (ret == 0)
-                ret = platform_device_add_data(pdev, data, sizeof(*data));
-        if (ret)
-                goto fail;
-
-        ret = platform_device_add(pdev);
-        if (ret)
-                goto fail;
-
-        /* return device handle to board setup code */
-        data->dev = &pdev->dev;
-        return 0;
-
-fail:
-        platform_device_put(pdev);
-        return ret;
-}
-
-#endif
-
 /*-------------------------------------------------------------------------*/
 
 #if defined(CONFIG_HW_RANDOM_OMAP) || defined(CONFIG_HW_RANDOM_OMAP_MODULE)
@@ -109,79 +61,6 @@ static void omap_init_rng(void)
 static inline void omap_init_rng(void) {}
 #endif
 
-/*-------------------------------------------------------------------------*/
-
-/* Numbering for the SPI-capable controllers when used for SPI:
- * spi          = 1
- * uwire        = 2
- * mmc1..2      = 3..4
- * mcbsp1..3    = 5..7
- */
-
-#if defined(CONFIG_SPI_OMAP_UWIRE) || defined(CONFIG_SPI_OMAP_UWIRE_MODULE)
-
-#define OMAP_UWIRE_BASE         0xfffb3000
-
-static struct resource uwire_resources[] = {
-        {
-                .start          = OMAP_UWIRE_BASE,
-                .end            = OMAP_UWIRE_BASE + 0x20,
-                .flags          = IORESOURCE_MEM,
-        },
-};
-
-static struct platform_device omap_uwire_device = {
-        .name      = "omap_uwire",
-        .id          = -1,
-        .num_resources  = ARRAY_SIZE(uwire_resources),
-        .resource       = uwire_resources,
-};
-
-static void omap_init_uwire(void)
-{
-        /* FIXME define and use a boot tag; not all boards will be hooking
-         * up devices to the microwire controller, and multi-board configs
-         * mean that CONFIG_SPI_OMAP_UWIRE may be configured anyway...
-         */
-
-        /* board-specific code must configure chipselects (only a few
-         * are normally used) and SCLK/SDI/SDO (each has two choices).
-         */
-        (void) platform_device_register(&omap_uwire_device);
-}
-#else
-static inline void omap_init_uwire(void) {}
-#endif
-
-#if defined(CONFIG_TIDSPBRIDGE) || defined(CONFIG_TIDSPBRIDGE_MODULE)
-
-static phys_addr_t omap_dsp_phys_mempool_base;
-
-void __init omap_dsp_reserve_sdram_memblock(void)
-{
-        phys_addr_t size = CONFIG_TIDSPBRIDGE_MEMPOOL_SIZE;
-        phys_addr_t paddr;
-
-        if (!size)
-                return;
-
-        paddr = arm_memblock_steal(size, SZ_1M);
-        if (!paddr) {
-                pr_err("%s: failed to reserve %llx bytes\n",
-                                __func__, (unsigned long long)size);
-                return;
-        }
-
-        omap_dsp_phys_mempool_base = paddr;
-}
-
-phys_addr_t omap_dsp_get_mempool_base(void)
-{
-        return omap_dsp_phys_mempool_base;
-}
-EXPORT_SYMBOL(omap_dsp_get_mempool_base);
-#endif
-
 /*
  * This gets called after board-specific INIT_MACHINE, and initializes most
  * on-chip peripherals accessible on this board (except for few like USB):
@@ -208,7 +87,6 @@ static int __init omap_init_devices(void)
          * in alphabetical order so they're easier to sort through.
          */
         omap_init_rng();
-        omap_init_uwire();
         return 0;
 }
 arch_initcall(omap_init_devices);
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 987e6101267d..cb16ade437cb 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -852,7 +852,7 @@ omap_dma_set_prio_lch(int lch, unsigned char read_prio,
         }
         l = p->dma_read(CCR, lch);
         l &= ~((1 << 6) | (1 << 26));
-        if (cpu_is_omap2430() || cpu_is_omap34xx() ||  cpu_is_omap44xx())
+        if (cpu_class_is_omap2() && !cpu_is_omap242x())
                 l |= ((read_prio & 0x1) << 6) | ((write_prio & 0x1) << 26);
         else
                 l |= ((read_prio & 0x1) << 6);
@@ -2080,7 +2080,7 @@ static int __devinit omap_system_dma_probe(struct platform_device *pdev)
                 }
         }
 
-        if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx())
+        if (cpu_class_is_omap2() && !cpu_is_omap242x())
                 omap_dma_set_global_params(DMA_DEFAULT_ARB_RATE,
                                 DMA_DEFAULT_FIFO_DEPTH, 0);
 
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index c4ed35e89fbd..3b0cfeb33d05 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -82,8 +82,6 @@ static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u32 reg,
 
 static void omap_timer_restore_context(struct omap_dm_timer *timer)
 {
-        __raw_writel(timer->context.tiocp_cfg,
-                        timer->io_base + OMAP_TIMER_OCP_CFG_OFFSET);
         if (timer->revision == 1)
                 __raw_writel(timer->context.tistat, timer->sys_stat);
 
diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h
index a557b8484e6c..d1cb6f527b7e 100644
--- a/arch/arm/plat-omap/include/plat/common.h
+++ b/arch/arm/plat-omap/include/plat/common.h
@@ -30,7 +30,7 @@
 #include <plat/i2c.h>
 #include <plat/omap_hwmod.h>
 
-extern int __init omap_init_clocksource_32k(void);
+extern int __init omap_init_clocksource_32k(void __iomem *vbase);
 
 extern void __init omap_check_revision(void);
 
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
index 4bdf14ec6747..297245dba66e 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -121,6 +121,7 @@ IS_OMAP_CLASS(16xx, 0x16)
 IS_OMAP_CLASS(24xx, 0x24)
 IS_OMAP_CLASS(34xx, 0x34)
 IS_OMAP_CLASS(44xx, 0x44)
+IS_AM_CLASS(35xx, 0x35)
 IS_AM_CLASS(33xx, 0x33)
 
 IS_TI_CLASS(81xx, 0x81)
@@ -148,6 +149,7 @@ IS_AM_SUBCLASS(335x, 0x335)
 #define cpu_is_ti81xx()                 0
 #define cpu_is_ti816x()                 0
 #define cpu_is_ti814x()                 0
+#define soc_is_am35xx()                 0
 #define cpu_is_am33xx()                 0
 #define cpu_is_am335x()                 0
 #define cpu_is_omap44xx()               0
@@ -357,6 +359,7 @@ IS_OMAP_TYPE(3517, 0x3517)
 # undef cpu_is_ti81xx
 # undef cpu_is_ti816x
 # undef cpu_is_ti814x
+# undef soc_is_am35xx
 # undef cpu_is_am33xx
 # undef cpu_is_am335x
 # define cpu_is_omap3430()              is_omap3430()
@@ -378,6 +381,7 @@ IS_OMAP_TYPE(3517, 0x3517)
 # define cpu_is_ti81xx()                is_ti81xx()
 # define cpu_is_ti816x()                is_ti816x()
 # define cpu_is_ti814x()                is_ti814x()
+# define soc_is_am35xx()                is_am35xx()
 # define cpu_is_am33xx()                is_am33xx()
 # define cpu_is_am335x()                is_am335x()
 #endif
@@ -433,6 +437,10 @@ IS_OMAP_TYPE(3517, 0x3517)
 #define TI8148_REV_ES2_0        (TI814X_CLASS | (0x1 << 8))
 #define TI8148_REV_ES2_1        (TI814X_CLASS | (0x2 << 8))
 
+#define AM35XX_CLASS            0x35170034
+#define AM35XX_REV_ES1_0        AM35XX_CLASS
+#define AM35XX_REV_ES1_1        (AM35XX_CLASS | (0x1 << 8))
+
 #define AM335X_CLASS            0x33500034
 #define AM335X_REV_ES1_0        AM335X_CLASS
 
diff --git a/arch/arm/plat-omap/include/plat/dma.h b/arch/arm/plat-omap/include/plat/dma.h
index 42afb4c45517..c5811d4409b0 100644
--- a/arch/arm/plat-omap/include/plat/dma.h
+++ b/arch/arm/plat-omap/include/plat/dma.h
@@ -312,6 +312,11 @@
 #define CLEAR_CSR_ON_READ               BIT(0xC)
 #define IS_WORD_16                      BIT(0xD)
 
+/* Defines for DMA Capabilities */
+#define DMA_HAS_TRANSPARENT_CAPS        (0x1 << 18)
+#define DMA_HAS_CONSTANT_FILL_CAPS      (0x1 << 19)
+#define DMA_HAS_DESCRIPTOR_CAPS         (0x3 << 20)
+
 enum omap_reg_offsets {
 
 GCR,            GSCR,           GRST1,          HW_ID,
diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h
index bdf871a84d62..5da73562e486 100644
--- a/arch/arm/plat-omap/include/plat/dmtimer.h
+++ b/arch/arm/plat-omap/include/plat/dmtimer.h
@@ -75,7 +75,6 @@ struct clk;
 
 struct timer_regs {
         u32 tidr;
-        u32 tiocp_cfg;
         u32 tistat;
         u32 tisr;
         u32 tier;
diff --git a/arch/arm/plat-omap/include/plat/mmc.h b/arch/arm/plat-omap/include/plat/mmc.h
index 3e7ae0f0215f..a7754a886d42 100644
--- a/arch/arm/plat-omap/include/plat/mmc.h
+++ b/arch/arm/plat-omap/include/plat/mmc.h
@@ -177,9 +177,6 @@ extern void omap_mmc_notify_cover_event(struct device *dev, int slot,
 void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
                                 int nr_controllers);
 void omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data);
-int omap_mmc_add(const char *name, int id, unsigned long base,
-                                unsigned long size, unsigned int irq,
-                                struct omap_mmc_platform_data *data);
 #else
 static inline void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
                                 int nr_controllers)
@@ -188,12 +185,6 @@ static inline void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
 static inline void omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)
 {
 }
-static inline int omap_mmc_add(const char *name, int id, unsigned long base,
-                                unsigned long size, unsigned int irq,
-                                struct omap_mmc_platform_data *data)
-{
-        return 0;
-}
 
 #endif