16 files changed, 98 insertions, 54 deletions

diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c
index 1868c0d8f9b5..341235c278ac 100644
--- a/arch/arm/plat-omap/cpu-omap.c
+++ b/arch/arm/plat-omap/cpu-omap.c
@@ -127,7 +127,7 @@ static int __init omap_cpu_init(struct cpufreq_policy *policy)
         }
 
         /* FIXME: what's the actual transition time? */
-        policy->cpuinfo.transition_latency = 10 * 1000 * 1000;
+        policy->cpuinfo.transition_latency = 300 * 1000;
 
         return 0;
 }
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index fd3154ae69b1..68eaae324b6a 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -691,13 +691,16 @@ static inline void disable_lnk(int lch)
 static inline void omap2_enable_irq_lch(int lch)
 {
         u32 val;
+        unsigned long flags;
 
         if (!cpu_class_is_omap2())
                 return;
 
+        spin_lock_irqsave(&dma_chan_lock, flags);
         val = dma_read(IRQENABLE_L0);
         val |= 1 << lch;
         dma_write(val, IRQENABLE_L0);
+        spin_unlock_irqrestore(&dma_chan_lock, flags);
 }
 
 int omap_request_dma(int dev_id, const char *dev_name,
@@ -799,10 +802,13 @@ void omap_free_dma(int lch)
 
         if (cpu_class_is_omap2()) {
                 u32 val;
+
+                spin_lock_irqsave(&dma_chan_lock, flags);
                 /* Disable interrupts */
                 val = dma_read(IRQENABLE_L0);
                 val &= ~(1 << lch);
                 dma_write(val, IRQENABLE_L0);
+                spin_unlock_irqrestore(&dma_chan_lock, flags);
 
                 /* Clear the CSR register and IRQ status register */
                 dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR(lch));
@@ -829,10 +835,10 @@ EXPORT_SYMBOL(omap_free_dma);
  *
  * @param arb_rate
  * @param max_fifo_depth
- * @param tparams - Number of thereads to reserve : DMA_THREAD_RESERVE_NORM
- *                                                  DMA_THREAD_RESERVE_ONET
- *                                                  DMA_THREAD_RESERVE_TWOT
- *                                                  DMA_THREAD_RESERVE_THREET
+ * @param tparams - Number of threads to reserve : DMA_THREAD_RESERVE_NORM
+ *                                                 DMA_THREAD_RESERVE_ONET
+ *                                                 DMA_THREAD_RESERVE_TWOT
+ *                                                 DMA_THREAD_RESERVE_THREET
  */
 void
 omap_dma_set_global_params(int arb_rate, int max_fifo_depth, int tparams)
@@ -844,11 +850,14 @@ omap_dma_set_global_params(int arb_rate, int max_fifo_depth, int tparams)
                 return;
         }
 
+        if (max_fifo_depth == 0)
+                max_fifo_depth = 1;
         if (arb_rate == 0)
                 arb_rate = 1;
 
-        reg = (arb_rate & 0xff) << 16;
-        reg |= (0xff & max_fifo_depth);
+        reg = 0xff & max_fifo_depth;
+        reg |= (0x3 & tparams) << 12;
+        reg |= (arb_rate & 0xff) << 16;
 
         dma_write(reg, GCR);
 }
@@ -975,6 +984,14 @@ void omap_stop_dma(int lch)
 {
         u32 l;
 
+        /* Disable all interrupts on the channel */
+        if (cpu_class_is_omap1())
+                dma_write(0, CICR(lch));
+
+        l = dma_read(CCR(lch));
+        l &= ~OMAP_DMA_CCR_EN;
+        dma_write(l, CCR(lch));
+
         if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) {
                 int next_lch, cur_lch = lch;
                 char dma_chan_link_map[OMAP_DMA4_LOGICAL_DMA_CH_COUNT];
@@ -992,18 +1009,8 @@ void omap_stop_dma(int lch)
                         next_lch = dma_chan[cur_lch].next_lch;
                         cur_lch = next_lch;
                 } while (next_lch != -1);
-
-                return;
         }
 
-        /* Disable all interrupts on the channel */
-        if (cpu_class_is_omap1())
-                dma_write(0, CICR(lch));
-
-        l = dma_read(CCR(lch));
-        l &= ~OMAP_DMA_CCR_EN;
-        dma_write(l, CCR(lch));
-
         dma_chan[lch].flags &= ~OMAP_DMA_ACTIVE;
 }
 EXPORT_SYMBOL(omap_stop_dma);
@@ -1107,6 +1114,14 @@ int omap_dma_running(void)
 {
         int lch;
 
+        /*
+         * On OMAP1510, internal LCD controller will start the transfer
+         * when it gets enabled, so assume DMA running if LCD enabled.
+         */
+        if (cpu_is_omap1510())
+                if (omap_readw(0xfffec000 + 0x00) & (1 << 0))
+                        return 1;
+
         /* Check if LCD DMA is running */
         if (cpu_is_omap16xx())
                 if (omap_readw(OMAP1610_DMA_LCD_CCR) & OMAP_DMA_CCR_EN)
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 693839c89ad0..7c345b757df1 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -250,7 +250,7 @@ static struct gpio_bank gpio_bank_730[7] = {
 
 #ifdef CONFIG_ARCH_OMAP850
 static struct gpio_bank gpio_bank_850[7] = {
-        { OMAP1_MPUIO_BASE,     INT_850_MPUIO,      IH_MPUIO_BASE,      METHOD_MPUIO },
+        { OMAP1_MPUIO_VBASE,     INT_850_MPUIO,     IH_MPUIO_BASE,      METHOD_MPUIO },
         { OMAP850_GPIO1_BASE,  INT_850_GPIO_BANK1,  IH_GPIO_BASE,       METHOD_GPIO_850 },
         { OMAP850_GPIO2_BASE,  INT_850_GPIO_BANK2,  IH_GPIO_BASE + 32,  METHOD_GPIO_850 },
         { OMAP850_GPIO3_BASE,  INT_850_GPIO_BANK3,  IH_GPIO_BASE + 64,  METHOD_GPIO_850 },
@@ -373,7 +373,7 @@ static inline int gpio_valid(int gpio)
 
 static int check_gpio(int gpio)
 {
-        if (unlikely(gpio_valid(gpio)) < 0) {
+        if (unlikely(gpio_valid(gpio) < 0)) {
                 printk(KERN_ERR "omap-gpio: invalid GPIO %d\n", gpio);
                 dump_stack();
                 return -1;
diff --git a/arch/arm/plat-omap/include/mach/cpu.h b/arch/arm/plat-omap/include/mach/cpu.h
index 11e73d9e8928..f129efb3075e 100644
--- a/arch/arm/plat-omap/include/mach/cpu.h
+++ b/arch/arm/plat-omap/include/mach/cpu.h
@@ -303,32 +303,21 @@ IS_OMAP_TYPE(3430, 0x3430)
 #define cpu_is_omap2430()               0
 #define cpu_is_omap3430()               0
 
-#if defined(MULTI_OMAP1)
-# if defined(CONFIG_ARCH_OMAP730)
-#  undef  cpu_is_omap730
-#  define cpu_is_omap730()              is_omap730()
-# endif
-# if defined(CONFIG_ARCH_OMAP850)
-#  undef  cpu_is_omap850
-#  define cpu_is_omap850()              is_omap850()
-# endif
-#else
-# if defined(CONFIG_ARCH_OMAP730)
-#  undef  cpu_is_omap730
-#  define cpu_is_omap730()              1
-# endif
-#endif
-#else
-# if defined(CONFIG_ARCH_OMAP850)
-#  undef  cpu_is_omap850
-#  define cpu_is_omap850()              1
-# endif
-#endif
-
 /*
  * Whether we have MULTI_OMAP1 or not, we still need to distinguish
- * between 330 vs. 1510 and 1611B/5912 vs. 1710.
+ * between 730 vs 850, 330 vs. 1510 and 1611B/5912 vs. 1710.
  */
+
+#if defined(CONFIG_ARCH_OMAP730)
+# undef  cpu_is_omap730
+# define cpu_is_omap730()               is_omap730()
+#endif
+
+#if defined(CONFIG_ARCH_OMAP850)
+# undef  cpu_is_omap850
+# define cpu_is_omap850()               is_omap850()
+#endif
+
 #if defined(CONFIG_ARCH_OMAP15XX)
 # undef  cpu_is_omap310
 # undef  cpu_is_omap1510
@@ -433,3 +422,5 @@ IS_OMAP_TYPE(3430, 0x3430)
 
 int omap_chip_is(struct omap_chip_id oci);
 void omap2_check_revision(void);
+
+#endif
diff --git a/arch/arm/plat-omap/include/mach/gpmc.h b/arch/arm/plat-omap/include/mach/gpmc.h
index 921b16532ff5..9c99cda77ba6 100644
--- a/arch/arm/plat-omap/include/mach/gpmc.h
+++ b/arch/arm/plat-omap/include/mach/gpmc.h
@@ -103,6 +103,10 @@ extern int gpmc_cs_request(int cs, unsigned long size, unsigned long *base);
 extern void gpmc_cs_free(int cs);
 extern int gpmc_cs_set_reserved(int cs, int reserved);
 extern int gpmc_cs_reserved(int cs);
+extern int gpmc_prefetch_enable(int cs, int dma_mode,
+                                        unsigned int u32_count, int is_write);
+extern void gpmc_prefetch_reset(void);
+extern int gpmc_prefetch_status(void);
 extern void __init gpmc_init(void);
 
 #endif
diff --git a/arch/arm/plat-omap/include/mach/irqs.h b/arch/arm/plat-omap/include/mach/irqs.h
index fb7cb7723990..28a165058b61 100644
--- a/arch/arm/plat-omap/include/mach/irqs.h
+++ b/arch/arm/plat-omap/include/mach/irqs.h
@@ -503,6 +503,7 @@
 #define INT_44XX_FPKA_READY_IRQ (50 + IRQ_GIC_START)
 #define INT_44XX_SHA1MD51_IRQ   (51 + IRQ_GIC_START)
 #define INT_44XX_RNG_IRQ        (52 + IRQ_GIC_START)
+#define INT_44XX_MMC5_IRQ       (59 + IRQ_GIC_START)
 #define INT_44XX_I2C3_IRQ       (61 + IRQ_GIC_START)
 #define INT_44XX_FPKA_ERROR_IRQ (64 + IRQ_GIC_START)
 #define INT_44XX_PBIAS_IRQ      (75 + IRQ_GIC_START)
@@ -511,6 +512,7 @@
 #define INT_44XX_TLL_IRQ        (78 + IRQ_GIC_START)
 #define INT_44XX_PARTHASH_IRQ   (79 + IRQ_GIC_START)
 #define INT_44XX_MMC3_IRQ       (94 + IRQ_GIC_START)
+#define INT_44XX_MMC4_IRQ       (96 + IRQ_GIC_START)
 
 
 /* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730/850) and
diff --git a/arch/arm/plat-omap/include/mach/keypad.h b/arch/arm/plat-omap/include/mach/keypad.h
index 45ea3ae3c995..3ae52ccc793c 100644
--- a/arch/arm/plat-omap/include/mach/keypad.h
+++ b/arch/arm/plat-omap/include/mach/keypad.h
@@ -10,6 +10,8 @@
 #ifndef ASMARM_ARCH_KEYPAD_H
 #define ASMARM_ARCH_KEYPAD_H
 
+#warning: Please update the board to use matrix_keypad.h instead
+
 struct omap_kp_platform_data {
         int rows;
         int cols;
diff --git a/arch/arm/plat-omap/include/mach/lcd_mipid.h b/arch/arm/plat-omap/include/mach/lcd_mipid.h
index f8fbc4801e52..8e52c6572281 100644
--- a/arch/arm/plat-omap/include/mach/lcd_mipid.h
+++ b/arch/arm/plat-omap/include/mach/lcd_mipid.h
@@ -16,7 +16,12 @@ enum mipid_test_result {
 struct mipid_platform_data {
         int     nreset_gpio;
         int     data_lines;
+
         void    (*shutdown)(struct mipid_platform_data *pdata);
+        void    (*set_bklight_level)(struct mipid_platform_data *pdata,
+                                     int level);
+        int     (*get_bklight_level)(struct mipid_platform_data *pdata);
+        int     (*get_bklight_max)(struct mipid_platform_data *pdata);
 };
 
 #endif
diff --git a/arch/arm/plat-omap/include/mach/mmc.h b/arch/arm/plat-omap/include/mach/mmc.h
index 81d5b36534b3..7229b9593301 100644
--- a/arch/arm/plat-omap/include/mach/mmc.h
+++ b/arch/arm/plat-omap/include/mach/mmc.h
@@ -25,11 +25,18 @@
 
 #define OMAP24XX_NR_MMC         2
 #define OMAP34XX_NR_MMC         3
+#define OMAP44XX_NR_MMC         5
 #define OMAP2420_MMC_SIZE       OMAP1_MMC_SIZE
-#define HSMMC_SIZE              0x200
+#define OMAP3_HSMMC_SIZE        0x200
+#define OMAP4_HSMMC_SIZE        0x1000
 #define OMAP2_MMC1_BASE         0x4809c000
 #define OMAP2_MMC2_BASE         0x480b4000
 #define OMAP3_MMC3_BASE         0x480ad000
+#define OMAP4_MMC4_BASE         0x480d1000
+#define OMAP4_MMC5_BASE         0x480d5000
+#define OMAP4_MMC_REG_OFFSET    0x100
+#define HSMMC5                  (1 << 4)
+#define HSMMC4                  (1 << 3)
 #define HSMMC3                  (1 << 2)
 #define HSMMC2                  (1 << 1)
 #define HSMMC1                  (1 << 0)
@@ -59,6 +66,9 @@ struct omap_mmc_platform_data {
         int (*suspend)(struct device *dev, int slot);
         int (*resume)(struct device *dev, int slot);
 
+        /* Return context loss count due to PM states changing */
+        int (*get_context_loss_count)(struct device *dev);
+
         u64 dma_mask;
 
         struct omap_mmc_slot_data {
@@ -80,12 +90,20 @@ struct omap_mmc_platform_data {
                 /* use the internal clock */
                 unsigned internal_clock:1;
 
+                /* nonremovable e.g. eMMC */
+                unsigned nonremovable:1;
+
+                /* Try to sleep or power off when possible */
+                unsigned power_saving:1;
+
                 int switch_pin;                 /* gpio (card detect) */
                 int gpio_wp;                    /* gpio (write protect) */
 
                 int (* set_bus_mode)(struct device *dev, int slot, int bus_mode);
                 int (* set_power)(struct device *dev, int slot, int power_on, int vdd);
                 int (* get_ro)(struct device *dev, int slot);
+                int (*set_sleep)(struct device *dev, int slot, int sleep,
+                                 int vdd, int cardsleep);
 
                 /* return MMC cover switch state, can be NULL if not supported.
                  *
diff --git a/arch/arm/plat-omap/include/mach/mux.h b/arch/arm/plat-omap/include/mach/mux.h
index 98dfab651dfc..0f49d2d563d9 100644
--- a/arch/arm/plat-omap/include/mach/mux.h
+++ b/arch/arm/plat-omap/include/mach/mux.h
@@ -840,12 +840,14 @@ enum omap34xx_index {
          */
         AF26_34XX_GPIO0,
         AF22_34XX_GPIO9,
+        AG9_34XX_GPIO23,
         AH8_34XX_GPIO29,
         U8_34XX_GPIO54_OUT,
         U8_34XX_GPIO54_DOWN,
         L8_34XX_GPIO63,
         G25_34XX_GPIO86_OUT,
         AG4_34XX_GPIO134_OUT,
+        AF4_34XX_GPIO135_OUT,
         AE4_34XX_GPIO136_OUT,
         AF6_34XX_GPIO140_UP,
         AE6_34XX_GPIO141,
diff --git a/arch/arm/plat-omap/include/mach/omapfb.h b/arch/arm/plat-omap/include/mach/omapfb.h
index 7b74d1255e0b..b226bdf45739 100644
--- a/arch/arm/plat-omap/include/mach/omapfb.h
+++ b/arch/arm/plat-omap/include/mach/omapfb.h
@@ -276,8 +276,8 @@ typedef int (*omapfb_notifier_callback_t)(struct notifier_block *,
                                           void *fbi);
 
 struct omapfb_mem_region {
-        dma_addr_t      paddr;
-        void            *vaddr;
+        u32             paddr;
+        void __iomem    *vaddr;
         unsigned long   size;
         u8              type;           /* OMAPFB_PLANE_MEM_* */
         unsigned        alloc:1;        /* allocated by the driver */
diff --git a/arch/arm/plat-omap/include/mach/powerdomain.h b/arch/arm/plat-omap/include/mach/powerdomain.h
index 6271d8556a40..fa6461423bd0 100644
--- a/arch/arm/plat-omap/include/mach/powerdomain.h
+++ b/arch/arm/plat-omap/include/mach/powerdomain.h
@@ -135,6 +135,8 @@ struct powerdomain *pwrdm_lookup(const char *name);
 
 int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user),
                         void *user);
+int pwrdm_for_each_nolock(int (*fn)(struct powerdomain *pwrdm, void *user),
+                        void *user);
 
 int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm);
 int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm);
diff --git a/arch/arm/plat-omap/iommu.c b/arch/arm/plat-omap/iommu.c
index 4b6012707307..94584f167a82 100644
--- a/arch/arm/plat-omap/iommu.c
+++ b/arch/arm/plat-omap/iommu.c
@@ -664,7 +664,7 @@ static size_t iopgtable_clear_entry_core(struct iommu *obj, u32 da)
                 nent = 1; /* for the next L1 entry */
         } else {
                 bytes = IOPGD_SIZE;
-                if (*iopgd & IOPGD_SUPER) {
+                if ((*iopgd & IOPGD_SUPER) == IOPGD_SUPER) {
                         nent *= 16;
                         /* rewind to the 1st entry */
                         iopgd = (u32 *)((u32)iopgd & IOSUPER_MASK);
diff --git a/arch/arm/plat-omap/iovmm.c b/arch/arm/plat-omap/iovmm.c
index 6fc52fcbdc03..dc3fac3dd0ea 100644
--- a/arch/arm/plat-omap/iovmm.c
+++ b/arch/arm/plat-omap/iovmm.c
@@ -47,7 +47,7 @@
  *      'va':   mpu virtual address
  *
  *      'c':    contiguous memory area
- *      'd':    dicontiguous memory area
+ *      'd':    discontiguous memory area
  *      'a':    anonymous memory allocation
  *      '()':   optional feature
  *
@@ -199,7 +199,8 @@ static void *vmap_sg(const struct sg_table *sgt)
                 va += bytes;
         }
 
-        flush_cache_vmap(new->addr, new->addr + total);
+        flush_cache_vmap((unsigned long)new->addr,
+                                (unsigned long)(new->addr + total));
         return new->addr;
 
 err_out:
@@ -362,8 +363,9 @@ void *da_to_va(struct iommu *obj, u32 da)
                 goto out;
         }
         va = area->va;
-        mutex_unlock(&obj->mmap_lock);
 out:
+        mutex_unlock(&obj->mmap_lock);
+
         return va;
 }
 EXPORT_SYMBOL_GPL(da_to_va);
@@ -390,14 +392,14 @@ static void sgtable_fill_vmalloc(struct sg_table *sgt, void *_va)
         }
 
         va_end = _va + PAGE_SIZE * i;
-        flush_cache_vmap(_va, va_end);
+        flush_cache_vmap((unsigned long)_va, (unsigned long)va_end);
 }
 
 static inline void sgtable_drain_vmalloc(struct sg_table *sgt)
 {
         /*
          * Actually this is not necessary at all, just exists for
-         * consistency of the code readibility.
+         * consistency of the code readability.
          */
         BUG_ON(!sgt);
 }
@@ -433,7 +435,7 @@ static inline void sgtable_drain_kmalloc(struct sg_table *sgt)
 {
         /*
          * Actually this is not necessary at all, just exists for
-         * consistency of the code readibility
+         * consistency of the code readability
          */
         BUG_ON(!sgt);
 }
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index 88ac9768f1c1..e664b912d7bb 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -595,7 +595,7 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx)
         rx &= 1;
         if (cpu_is_omap2430() || cpu_is_omap34xx()) {
                 w = OMAP_MCBSP_READ(io_base, RCCR);
-                w |= (tx ? RDISABLE : 0);
+                w |= (rx ? RDISABLE : 0);
                 OMAP_MCBSP_WRITE(io_base, RCCR, w);
         }
         w = OMAP_MCBSP_READ(io_base, SPCR1);
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 925f64711c37..75d1f26e5b17 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -270,7 +270,8 @@ void * omap_sram_push(void * start, unsigned long size)
         omap_sram_ceil -= size;
         omap_sram_ceil = ROUND_DOWN(omap_sram_ceil, sizeof(void *));
         memcpy((void *)omap_sram_ceil, start, size);
-        flush_icache_range((unsigned long)start, (unsigned long)(start + size));
+        flush_icache_range((unsigned long)omap_sram_ceil,
+                (unsigned long)(omap_sram_ceil + size));
 
         return (void *)omap_sram_ceil;
 }