diff options
Diffstat (limited to 'arch/arm/plat-omap/include/plat/dmtimer.h')
-rw-r--r-- | arch/arm/plat-omap/include/plat/dmtimer.h | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h index 2861b155485a..dd79f3005cdf 100644 --- a/arch/arm/plat-omap/include/plat/dmtimer.h +++ b/arch/arm/plat-omap/include/plat/dmtimer.h | |||
@@ -280,20 +280,20 @@ static inline u32 __omap_dm_timer_read(struct omap_dm_timer *timer, u32 reg, | |||
280 | int posted) | 280 | int posted) |
281 | { | 281 | { |
282 | if (posted) | 282 | if (posted) |
283 | while (__raw_readl(timer->pend) & (reg >> WPSHIFT)) | 283 | while (readl_relaxed(timer->pend) & (reg >> WPSHIFT)) |
284 | cpu_relax(); | 284 | cpu_relax(); |
285 | 285 | ||
286 | return __raw_readl(timer->func_base + (reg & 0xff)); | 286 | return readl_relaxed(timer->func_base + (reg & 0xff)); |
287 | } | 287 | } |
288 | 288 | ||
289 | static inline void __omap_dm_timer_write(struct omap_dm_timer *timer, | 289 | static inline void __omap_dm_timer_write(struct omap_dm_timer *timer, |
290 | u32 reg, u32 val, int posted) | 290 | u32 reg, u32 val, int posted) |
291 | { | 291 | { |
292 | if (posted) | 292 | if (posted) |
293 | while (__raw_readl(timer->pend) & (reg >> WPSHIFT)) | 293 | while (readl_relaxed(timer->pend) & (reg >> WPSHIFT)) |
294 | cpu_relax(); | 294 | cpu_relax(); |
295 | 295 | ||
296 | __raw_writel(val, timer->func_base + (reg & 0xff)); | 296 | writel_relaxed(val, timer->func_base + (reg & 0xff)); |
297 | } | 297 | } |
298 | 298 | ||
299 | static inline void __omap_dm_timer_init_regs(struct omap_dm_timer *timer) | 299 | static inline void __omap_dm_timer_init_regs(struct omap_dm_timer *timer) |
@@ -301,7 +301,7 @@ static inline void __omap_dm_timer_init_regs(struct omap_dm_timer *timer) | |||
301 | u32 tidr; | 301 | u32 tidr; |
302 | 302 | ||
303 | /* Assume v1 ip if bits [31:16] are zero */ | 303 | /* Assume v1 ip if bits [31:16] are zero */ |
304 | tidr = __raw_readl(timer->io_base); | 304 | tidr = readl_relaxed(timer->io_base); |
305 | if (!(tidr >> 16)) { | 305 | if (!(tidr >> 16)) { |
306 | timer->revision = 1; | 306 | timer->revision = 1; |
307 | timer->irq_stat = timer->io_base + OMAP_TIMER_V1_STAT_OFFSET; | 307 | timer->irq_stat = timer->io_base + OMAP_TIMER_V1_STAT_OFFSET; |
@@ -385,7 +385,7 @@ static inline void __omap_dm_timer_stop(struct omap_dm_timer *timer, | |||
385 | } | 385 | } |
386 | 386 | ||
387 | /* Ack possibly pending interrupt */ | 387 | /* Ack possibly pending interrupt */ |
388 | __raw_writel(OMAP_TIMER_INT_OVERFLOW, timer->irq_stat); | 388 | writel_relaxed(OMAP_TIMER_INT_OVERFLOW, timer->irq_stat); |
389 | } | 389 | } |
390 | 390 | ||
391 | static inline void __omap_dm_timer_load_start(struct omap_dm_timer *timer, | 391 | static inline void __omap_dm_timer_load_start(struct omap_dm_timer *timer, |
@@ -399,7 +399,7 @@ static inline void __omap_dm_timer_load_start(struct omap_dm_timer *timer, | |||
399 | static inline void __omap_dm_timer_int_enable(struct omap_dm_timer *timer, | 399 | static inline void __omap_dm_timer_int_enable(struct omap_dm_timer *timer, |
400 | unsigned int value) | 400 | unsigned int value) |
401 | { | 401 | { |
402 | __raw_writel(value, timer->irq_ena); | 402 | writel_relaxed(value, timer->irq_ena); |
403 | __omap_dm_timer_write(timer, OMAP_TIMER_WAKEUP_EN_REG, value, 0); | 403 | __omap_dm_timer_write(timer, OMAP_TIMER_WAKEUP_EN_REG, value, 0); |
404 | } | 404 | } |
405 | 405 | ||
@@ -412,7 +412,7 @@ __omap_dm_timer_read_counter(struct omap_dm_timer *timer, int posted) | |||
412 | static inline void __omap_dm_timer_write_status(struct omap_dm_timer *timer, | 412 | static inline void __omap_dm_timer_write_status(struct omap_dm_timer *timer, |
413 | unsigned int value) | 413 | unsigned int value) |
414 | { | 414 | { |
415 | __raw_writel(value, timer->irq_stat); | 415 | writel_relaxed(value, timer->irq_stat); |
416 | } | 416 | } |
417 | 417 | ||
418 | #endif /* __ASM_ARCH_DMTIMER_H */ | 418 | #endif /* __ASM_ARCH_DMTIMER_H */ |