1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/plat-omap/include/mach/fpga.h b/arch/arm/plat-omap/include/mach/fpga.h
index c92e4b42b289..f1864a652f7a 100644
--- a/arch/arm/plat-omap/include/mach/fpga.h
+++ b/arch/arm/plat-omap/include/mach/fpga.h
@@ -34,9 +34,9 @@ extern void omap1510_fpga_init_irq(void);
 * ---------------------------------------------------------------------------
 */
 /* maps in the FPGA registers and the ETHR registers */
-#define H2P2_DBG_FPGA_BASE              0xE8000000      /* VA */
+#define H2P2_DBG_FPGA_BASE              IOMEM(0xE8000000)       /* VA */
-#define H2P2_DBG_FPGA_SIZE              SZ_4K           /* SIZE */
+#define H2P2_DBG_FPGA_SIZE              SZ_4K                   /* SIZE */
-#define H2P2_DBG_FPGA_START             0x04000000      /* PA */
+#define H2P2_DBG_FPGA_START             0x04000000              /* PA */
 #define H2P2_DBG_FPGA_ETHR_START        (H2P2_DBG_FPGA_START + 0x300)
 #define H2P2_DBG_FPGA_FPGA_REV          (H2P2_DBG_FPGA_BASE + 0x10)     /* FPGA Revision */
@@ -85,9 +85,9 @@ struct h2p2_dbg_fpga {
 *  OMAP-1510 FPGA
 * ---------------------------------------------------------------------------
 */
-#define OMAP1510_FPGA_BASE                      0xE8000000      /* Virtual */
+#define OMAP1510_FPGA_BASE              IOMEM(0xE8000000)       /* VA */
-#define OMAP1510_FPGA_SIZE                      SZ_4K
+#define OMAP1510_FPGA_SIZE              SZ_4K
-#define OMAP1510_FPGA_START                     0x08000000      /* Physical */
+#define OMAP1510_FPGA_START             0x08000000              /* PA */
 /* Revision */
 #define OMAP1510_FPGA_REV_LOW                   (OMAP1510_FPGA_BASE + 0x0)

diff --git a/arch/arm/plat-omap/include/mach/fpga.h b/arch/arm/plat-omap/include/mach/fpga.h index c92e4b42b289..f1864a652f7a 100644 --- a/arch/arm/plat-omap/include/mach/fpga.h +++ b/arch/arm/plat-omap/include/mach/fpga.h
@@ -34,9 +34,9 @@ extern void omap1510_fpga_init_irq(void);
34	* ---------------------------------------------------------------------------	34	* ---------------------------------------------------------------------------
35	*/	35	*/
36	/* maps in the FPGA registers and the ETHR registers */	36	/* maps in the FPGA registers and the ETHR registers */
37	#define H2P2_DBG_FPGA_BASE 0xE8000000 /* VA */	37	#define H2P2_DBG_FPGA_BASE IOMEM(0xE8000000) /* VA */
38	#define H2P2_DBG_FPGA_SIZE SZ_4K /* SIZE */	38	#define H2P2_DBG_FPGA_SIZE SZ_4K /* SIZE */
39	#define H2P2_DBG_FPGA_START 0x04000000 /* PA */	39	#define H2P2_DBG_FPGA_START 0x04000000 /* PA */
40		40
41	#define H2P2_DBG_FPGA_ETHR_START (H2P2_DBG_FPGA_START + 0x300)	41	#define H2P2_DBG_FPGA_ETHR_START (H2P2_DBG_FPGA_START + 0x300)
42	#define H2P2_DBG_FPGA_FPGA_REV (H2P2_DBG_FPGA_BASE + 0x10) /* FPGA Revision */	42	#define H2P2_DBG_FPGA_FPGA_REV (H2P2_DBG_FPGA_BASE + 0x10) /* FPGA Revision */
@@ -85,9 +85,9 @@ struct h2p2_dbg_fpga {
85	* OMAP-1510 FPGA	85	* OMAP-1510 FPGA
86	* ---------------------------------------------------------------------------	86	* ---------------------------------------------------------------------------
87	*/	87	*/
88	#define OMAP1510_FPGA_BASE 0xE8000000 /* Virtual */	88	#define OMAP1510_FPGA_BASE IOMEM(0xE8000000) /* VA */
89	#define OMAP1510_FPGA_SIZE SZ_4K	89	#define OMAP1510_FPGA_SIZE SZ_4K
90	#define OMAP1510_FPGA_START 0x08000000 /* Physical */	90	#define OMAP1510_FPGA_START 0x08000000 /* PA */
91		91
92	/* Revision */	92	/* Revision */
93	#define OMAP1510_FPGA_REV_LOW (OMAP1510_FPGA_BASE + 0x0)	93	#define OMAP1510_FPGA_REV_LOW (OMAP1510_FPGA_BASE + 0x0)