diff options
Diffstat (limited to 'arch/arm/plat-omap/gpio.c')
-rw-r--r-- | arch/arm/plat-omap/gpio.c | 70 |
1 files changed, 35 insertions, 35 deletions
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index 5935ae4e550b..8679fbca6bbe 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c | |||
@@ -28,7 +28,7 @@ | |||
28 | /* | 28 | /* |
29 | * OMAP1510 GPIO registers | 29 | * OMAP1510 GPIO registers |
30 | */ | 30 | */ |
31 | #define OMAP1510_GPIO_BASE (void __iomem *)0xfffce000 | 31 | #define OMAP1510_GPIO_BASE IO_ADDRESS(0xfffce000) |
32 | #define OMAP1510_GPIO_DATA_INPUT 0x00 | 32 | #define OMAP1510_GPIO_DATA_INPUT 0x00 |
33 | #define OMAP1510_GPIO_DATA_OUTPUT 0x04 | 33 | #define OMAP1510_GPIO_DATA_OUTPUT 0x04 |
34 | #define OMAP1510_GPIO_DIR_CONTROL 0x08 | 34 | #define OMAP1510_GPIO_DIR_CONTROL 0x08 |
@@ -42,10 +42,10 @@ | |||
42 | /* | 42 | /* |
43 | * OMAP1610 specific GPIO registers | 43 | * OMAP1610 specific GPIO registers |
44 | */ | 44 | */ |
45 | #define OMAP1610_GPIO1_BASE (void __iomem *)0xfffbe400 | 45 | #define OMAP1610_GPIO1_BASE IO_ADDRESS(0xfffbe400) |
46 | #define OMAP1610_GPIO2_BASE (void __iomem *)0xfffbec00 | 46 | #define OMAP1610_GPIO2_BASE IO_ADDRESS(0xfffbec00) |
47 | #define OMAP1610_GPIO3_BASE (void __iomem *)0xfffbb400 | 47 | #define OMAP1610_GPIO3_BASE IO_ADDRESS(0xfffbb400) |
48 | #define OMAP1610_GPIO4_BASE (void __iomem *)0xfffbbc00 | 48 | #define OMAP1610_GPIO4_BASE IO_ADDRESS(0xfffbbc00) |
49 | #define OMAP1610_GPIO_REVISION 0x0000 | 49 | #define OMAP1610_GPIO_REVISION 0x0000 |
50 | #define OMAP1610_GPIO_SYSCONFIG 0x0010 | 50 | #define OMAP1610_GPIO_SYSCONFIG 0x0010 |
51 | #define OMAP1610_GPIO_SYSSTATUS 0x0014 | 51 | #define OMAP1610_GPIO_SYSSTATUS 0x0014 |
@@ -67,12 +67,12 @@ | |||
67 | /* | 67 | /* |
68 | * OMAP730 specific GPIO registers | 68 | * OMAP730 specific GPIO registers |
69 | */ | 69 | */ |
70 | #define OMAP730_GPIO1_BASE (void __iomem *)0xfffbc000 | 70 | #define OMAP730_GPIO1_BASE IO_ADDRESS(0xfffbc000) |
71 | #define OMAP730_GPIO2_BASE (void __iomem *)0xfffbc800 | 71 | #define OMAP730_GPIO2_BASE IO_ADDRESS(0xfffbc800) |
72 | #define OMAP730_GPIO3_BASE (void __iomem *)0xfffbd000 | 72 | #define OMAP730_GPIO3_BASE IO_ADDRESS(0xfffbd000) |
73 | #define OMAP730_GPIO4_BASE (void __iomem *)0xfffbd800 | 73 | #define OMAP730_GPIO4_BASE IO_ADDRESS(0xfffbd800) |
74 | #define OMAP730_GPIO5_BASE (void __iomem *)0xfffbe000 | 74 | #define OMAP730_GPIO5_BASE IO_ADDRESS(0xfffbe000) |
75 | #define OMAP730_GPIO6_BASE (void __iomem *)0xfffbe800 | 75 | #define OMAP730_GPIO6_BASE IO_ADDRESS(0xfffbe800) |
76 | #define OMAP730_GPIO_DATA_INPUT 0x00 | 76 | #define OMAP730_GPIO_DATA_INPUT 0x00 |
77 | #define OMAP730_GPIO_DATA_OUTPUT 0x04 | 77 | #define OMAP730_GPIO_DATA_OUTPUT 0x04 |
78 | #define OMAP730_GPIO_DIR_CONTROL 0x08 | 78 | #define OMAP730_GPIO_DIR_CONTROL 0x08 |
@@ -83,16 +83,16 @@ | |||
83 | /* | 83 | /* |
84 | * omap24xx specific GPIO registers | 84 | * omap24xx specific GPIO registers |
85 | */ | 85 | */ |
86 | #define OMAP242X_GPIO1_BASE (void __iomem *)0x48018000 | 86 | #define OMAP242X_GPIO1_BASE IO_ADDRESS(0x48018000) |
87 | #define OMAP242X_GPIO2_BASE (void __iomem *)0x4801a000 | 87 | #define OMAP242X_GPIO2_BASE IO_ADDRESS(0x4801a000) |
88 | #define OMAP242X_GPIO3_BASE (void __iomem *)0x4801c000 | 88 | #define OMAP242X_GPIO3_BASE IO_ADDRESS(0x4801c000) |
89 | #define OMAP242X_GPIO4_BASE (void __iomem *)0x4801e000 | 89 | #define OMAP242X_GPIO4_BASE IO_ADDRESS(0x4801e000) |
90 | 90 | ||
91 | #define OMAP243X_GPIO1_BASE (void __iomem *)0x4900C000 | 91 | #define OMAP243X_GPIO1_BASE IO_ADDRESS(0x4900C000) |
92 | #define OMAP243X_GPIO2_BASE (void __iomem *)0x4900E000 | 92 | #define OMAP243X_GPIO2_BASE IO_ADDRESS(0x4900E000) |
93 | #define OMAP243X_GPIO3_BASE (void __iomem *)0x49010000 | 93 | #define OMAP243X_GPIO3_BASE IO_ADDRESS(0x49010000) |
94 | #define OMAP243X_GPIO4_BASE (void __iomem *)0x49012000 | 94 | #define OMAP243X_GPIO4_BASE IO_ADDRESS(0x49012000) |
95 | #define OMAP243X_GPIO5_BASE (void __iomem *)0x480B6000 | 95 | #define OMAP243X_GPIO5_BASE IO_ADDRESS(0x480B6000) |
96 | 96 | ||
97 | #define OMAP24XX_GPIO_REVISION 0x0000 | 97 | #define OMAP24XX_GPIO_REVISION 0x0000 |
98 | #define OMAP24XX_GPIO_SYSCONFIG 0x0010 | 98 | #define OMAP24XX_GPIO_SYSCONFIG 0x0010 |
@@ -122,13 +122,14 @@ | |||
122 | * omap34xx specific GPIO registers | 122 | * omap34xx specific GPIO registers |
123 | */ | 123 | */ |
124 | 124 | ||
125 | #define OMAP34XX_GPIO1_BASE (void __iomem *)0x48310000 | 125 | #define OMAP34XX_GPIO1_BASE IO_ADDRESS(0x48310000) |
126 | #define OMAP34XX_GPIO2_BASE (void __iomem *)0x49050000 | 126 | #define OMAP34XX_GPIO2_BASE IO_ADDRESS(0x49050000) |
127 | #define OMAP34XX_GPIO3_BASE (void __iomem *)0x49052000 | 127 | #define OMAP34XX_GPIO3_BASE IO_ADDRESS(0x49052000) |
128 | #define OMAP34XX_GPIO4_BASE (void __iomem *)0x49054000 | 128 | #define OMAP34XX_GPIO4_BASE IO_ADDRESS(0x49054000) |
129 | #define OMAP34XX_GPIO5_BASE (void __iomem *)0x49056000 | 129 | #define OMAP34XX_GPIO5_BASE IO_ADDRESS(0x49056000) |
130 | #define OMAP34XX_GPIO6_BASE (void __iomem *)0x49058000 | 130 | #define OMAP34XX_GPIO6_BASE IO_ADDRESS(0x49058000) |
131 | 131 | ||
132 | #define OMAP_MPUIO_VBASE IO_ADDRESS(OMAP_MPUIO_BASE) | ||
132 | 133 | ||
133 | struct gpio_bank { | 134 | struct gpio_bank { |
134 | void __iomem *base; | 135 | void __iomem *base; |
@@ -160,7 +161,7 @@ struct gpio_bank { | |||
160 | 161 | ||
161 | #ifdef CONFIG_ARCH_OMAP16XX | 162 | #ifdef CONFIG_ARCH_OMAP16XX |
162 | static struct gpio_bank gpio_bank_1610[5] = { | 163 | static struct gpio_bank gpio_bank_1610[5] = { |
163 | { OMAP_MPUIO_BASE, INT_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO}, | 164 | { OMAP_MPUIO_VBASE, INT_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO}, |
164 | { OMAP1610_GPIO1_BASE, INT_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_1610 }, | 165 | { OMAP1610_GPIO1_BASE, INT_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_1610 }, |
165 | { OMAP1610_GPIO2_BASE, INT_1610_GPIO_BANK2, IH_GPIO_BASE + 16, METHOD_GPIO_1610 }, | 166 | { OMAP1610_GPIO2_BASE, INT_1610_GPIO_BANK2, IH_GPIO_BASE + 16, METHOD_GPIO_1610 }, |
166 | { OMAP1610_GPIO3_BASE, INT_1610_GPIO_BANK3, IH_GPIO_BASE + 32, METHOD_GPIO_1610 }, | 167 | { OMAP1610_GPIO3_BASE, INT_1610_GPIO_BANK3, IH_GPIO_BASE + 32, METHOD_GPIO_1610 }, |
@@ -170,14 +171,14 @@ static struct gpio_bank gpio_bank_1610[5] = { | |||
170 | 171 | ||
171 | #ifdef CONFIG_ARCH_OMAP15XX | 172 | #ifdef CONFIG_ARCH_OMAP15XX |
172 | static struct gpio_bank gpio_bank_1510[2] = { | 173 | static struct gpio_bank gpio_bank_1510[2] = { |
173 | { OMAP_MPUIO_BASE, INT_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO }, | 174 | { OMAP_MPUIO_VBASE, INT_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO }, |
174 | { OMAP1510_GPIO_BASE, INT_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_1510 } | 175 | { OMAP1510_GPIO_BASE, INT_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_1510 } |
175 | }; | 176 | }; |
176 | #endif | 177 | #endif |
177 | 178 | ||
178 | #ifdef CONFIG_ARCH_OMAP730 | 179 | #ifdef CONFIG_ARCH_OMAP730 |
179 | static struct gpio_bank gpio_bank_730[7] = { | 180 | static struct gpio_bank gpio_bank_730[7] = { |
180 | { OMAP_MPUIO_BASE, INT_730_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO }, | 181 | { OMAP_MPUIO_VBASE, INT_730_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO }, |
181 | { OMAP730_GPIO1_BASE, INT_730_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_730 }, | 182 | { OMAP730_GPIO1_BASE, INT_730_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_730 }, |
182 | { OMAP730_GPIO2_BASE, INT_730_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_730 }, | 183 | { OMAP730_GPIO2_BASE, INT_730_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_730 }, |
183 | { OMAP730_GPIO3_BASE, INT_730_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_730 }, | 184 | { OMAP730_GPIO3_BASE, INT_730_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_730 }, |
@@ -1389,7 +1390,7 @@ static int __init _omap_gpio_init(void) | |||
1389 | 1390 | ||
1390 | gpio_bank_count = 5; | 1391 | gpio_bank_count = 5; |
1391 | gpio_bank = gpio_bank_1610; | 1392 | gpio_bank = gpio_bank_1610; |
1392 | rev = omap_readw(gpio_bank[1].base + OMAP1610_GPIO_REVISION); | 1393 | rev = __raw_readw(gpio_bank[1].base + OMAP1610_GPIO_REVISION); |
1393 | printk(KERN_INFO "OMAP GPIO hardware version %d.%d\n", | 1394 | printk(KERN_INFO "OMAP GPIO hardware version %d.%d\n", |
1394 | (rev >> 4) & 0x0f, rev & 0x0f); | 1395 | (rev >> 4) & 0x0f, rev & 0x0f); |
1395 | } | 1396 | } |
@@ -1408,7 +1409,7 @@ static int __init _omap_gpio_init(void) | |||
1408 | 1409 | ||
1409 | gpio_bank_count = 4; | 1410 | gpio_bank_count = 4; |
1410 | gpio_bank = gpio_bank_242x; | 1411 | gpio_bank = gpio_bank_242x; |
1411 | rev = omap_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION); | 1412 | rev = __raw_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION); |
1412 | printk(KERN_INFO "OMAP242x GPIO hardware version %d.%d\n", | 1413 | printk(KERN_INFO "OMAP242x GPIO hardware version %d.%d\n", |
1413 | (rev >> 4) & 0x0f, rev & 0x0f); | 1414 | (rev >> 4) & 0x0f, rev & 0x0f); |
1414 | } | 1415 | } |
@@ -1417,7 +1418,7 @@ static int __init _omap_gpio_init(void) | |||
1417 | 1418 | ||
1418 | gpio_bank_count = 5; | 1419 | gpio_bank_count = 5; |
1419 | gpio_bank = gpio_bank_243x; | 1420 | gpio_bank = gpio_bank_243x; |
1420 | rev = omap_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION); | 1421 | rev = __raw_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION); |
1421 | printk(KERN_INFO "OMAP243x GPIO hardware version %d.%d\n", | 1422 | printk(KERN_INFO "OMAP243x GPIO hardware version %d.%d\n", |
1422 | (rev >> 4) & 0x0f, rev & 0x0f); | 1423 | (rev >> 4) & 0x0f, rev & 0x0f); |
1423 | } | 1424 | } |
@@ -1428,7 +1429,7 @@ static int __init _omap_gpio_init(void) | |||
1428 | 1429 | ||
1429 | gpio_bank_count = OMAP34XX_NR_GPIOS; | 1430 | gpio_bank_count = OMAP34XX_NR_GPIOS; |
1430 | gpio_bank = gpio_bank_34xx; | 1431 | gpio_bank = gpio_bank_34xx; |
1431 | rev = omap_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION); | 1432 | rev = __raw_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION); |
1432 | printk(KERN_INFO "OMAP34xx GPIO hardware version %d.%d\n", | 1433 | printk(KERN_INFO "OMAP34xx GPIO hardware version %d.%d\n", |
1433 | (rev >> 4) & 0x0f, rev & 0x0f); | 1434 | (rev >> 4) & 0x0f, rev & 0x0f); |
1434 | } | 1435 | } |
@@ -1437,10 +1438,9 @@ static int __init _omap_gpio_init(void) | |||
1437 | int j, gpio_count = 16; | 1438 | int j, gpio_count = 16; |
1438 | 1439 | ||
1439 | bank = &gpio_bank[i]; | 1440 | bank = &gpio_bank[i]; |
1440 | bank->base = IO_ADDRESS(bank->base); | ||
1441 | spin_lock_init(&bank->lock); | 1441 | spin_lock_init(&bank->lock); |
1442 | if (bank_is_mpuio(bank)) | 1442 | if (bank_is_mpuio(bank)) |
1443 | omap_writew(0xFFFF, OMAP_MPUIO_BASE + OMAP_MPUIO_GPIO_MASKIT); | 1443 | __raw_writew(0xffff, bank->base + OMAP_MPUIO_GPIO_MASKIT); |
1444 | if (cpu_is_omap15xx() && bank->method == METHOD_GPIO_1510) { | 1444 | if (cpu_is_omap15xx() && bank->method == METHOD_GPIO_1510) { |
1445 | __raw_writew(0xffff, bank->base + OMAP1510_GPIO_INT_MASK); | 1445 | __raw_writew(0xffff, bank->base + OMAP1510_GPIO_INT_MASK); |
1446 | __raw_writew(0x0000, bank->base + OMAP1510_GPIO_INT_STATUS); | 1446 | __raw_writew(0x0000, bank->base + OMAP1510_GPIO_INT_STATUS); |