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Diffstat (limited to 'arch/arm/plat-nomadik/timer.c')
-rw-r--r--arch/arm/plat-nomadik/timer.c26
1 files changed, 24 insertions, 2 deletions
diff --git a/arch/arm/plat-nomadik/timer.c b/arch/arm/plat-nomadik/timer.c
index 0ff3798769ab..08aaa4a7f65f 100644
--- a/arch/arm/plat-nomadik/timer.c
+++ b/arch/arm/plat-nomadik/timer.c
@@ -13,7 +13,9 @@
13#include <linux/irq.h> 13#include <linux/irq.h>
14#include <linux/io.h> 14#include <linux/io.h>
15#include <linux/clockchips.h> 15#include <linux/clockchips.h>
16#include <linux/clk.h>
16#include <linux/jiffies.h> 17#include <linux/jiffies.h>
18#include <linux/err.h>
17#include <asm/mach/time.h> 19#include <asm/mach/time.h>
18 20
19#include <plat/mtu.h> 21#include <plat/mtu.h>
@@ -124,13 +126,25 @@ static struct irqaction nmdk_timer_irq = {
124void __init nmdk_timer_init(void) 126void __init nmdk_timer_init(void)
125{ 127{
126 unsigned long rate; 128 unsigned long rate;
127 u32 cr = MTU_CRn_32BITS;; 129 struct clk *clk0;
130 struct clk *clk1;
131 u32 cr;
132
133 clk0 = clk_get_sys("mtu0", NULL);
134 BUG_ON(IS_ERR(clk0));
135
136 clk1 = clk_get_sys("mtu1", NULL);
137 BUG_ON(IS_ERR(clk1));
138
139 clk_enable(clk0);
140 clk_enable(clk1);
128 141
129 /* 142 /*
130 * Tick rate is 2.4MHz for Nomadik and 110MHz for ux500: 143 * Tick rate is 2.4MHz for Nomadik and 110MHz for ux500:
131 * use a divide-by-16 counter if it's more than 16MHz 144 * use a divide-by-16 counter if it's more than 16MHz
132 */ 145 */
133 rate = CLOCK_TICK_RATE; 146 cr = MTU_CRn_32BITS;;
147 rate = clk_get_rate(clk0);
134 if (rate > 16 << 20) { 148 if (rate > 16 << 20) {
135 rate /= 16; 149 rate /= 16;
136 cr |= MTU_CRn_PRESCALE_16; 150 cr |= MTU_CRn_PRESCALE_16;
@@ -153,6 +167,14 @@ void __init nmdk_timer_init(void)
153 nmdk_clksrc.name); 167 nmdk_clksrc.name);
154 168
155 /* Timer 1 is used for events, fix according to rate */ 169 /* Timer 1 is used for events, fix according to rate */
170 cr = MTU_CRn_32BITS;
171 rate = clk_get_rate(clk1);
172 if (rate > 16 << 20) {
173 rate /= 16;
174 cr |= MTU_CRn_PRESCALE_16;
175 } else {
176 cr |= MTU_CRn_PRESCALE_1;
177 }
156 writel(cr | MTU_CRn_ONESHOT, mtu_base + MTU_CR(1)); /* off, currently */ 178 writel(cr | MTU_CRn_ONESHOT, mtu_base + MTU_CR(1)); /* off, currently */
157 nmdk_clkevt.mult = div_sc(rate, NSEC_PER_SEC, nmdk_clkevt.shift); 179 nmdk_clkevt.mult = div_sc(rate, NSEC_PER_SEC, nmdk_clkevt.shift);
158 nmdk_clkevt.max_delta_ns = 180 nmdk_clkevt.max_delta_ns =