diff options
Diffstat (limited to 'arch/arm/plat-mxc/include/mach/mx31.h')
-rw-r--r-- | arch/arm/plat-mxc/include/mach/mx31.h | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/plat-mxc/include/mach/mx31.h index b8b47d139eb5..fb90e119c2b5 100644 --- a/arch/arm/plat-mxc/include/mach/mx31.h +++ b/arch/arm/plat-mxc/include/mach/mx31.h | |||
@@ -1,3 +1,10 @@ | |||
1 | #ifndef __MACH_MX31_H__ | ||
2 | #define __MACH_MX31_H__ | ||
3 | |||
4 | #ifndef __ASSEMBLER__ | ||
5 | #include <linux/io.h> | ||
6 | #endif | ||
7 | |||
1 | /* | 8 | /* |
2 | * IRAM | 9 | * IRAM |
3 | */ | 10 | */ |
@@ -107,8 +114,30 @@ | |||
107 | #define MX31_EMI_CTL_BASE_ADDR (MX31_X_MEMC_BASE_ADDR + 0x4000) | 114 | #define MX31_EMI_CTL_BASE_ADDR (MX31_X_MEMC_BASE_ADDR + 0x4000) |
108 | #define MX31_PCMCIA_CTL_BASE_ADDR MX31_EMI_CTL_BASE_ADDR | 115 | #define MX31_PCMCIA_CTL_BASE_ADDR MX31_EMI_CTL_BASE_ADDR |
109 | 116 | ||
117 | #define MX31_WEIM_CSCRx_BASE_ADDR(cs) (MX31_WEIM_BASE_ADDR + (cs) * 0x10) | ||
118 | #define MX31_WEIM_CSCRxU(cs) (MX31_WEIM_CSCRx_BASE_ADDR(cs)) | ||
119 | #define MX31_WEIM_CSCRxL(cs) (MX31_WEIM_CSCRx_BASE_ADDR(cs) + 0x4) | ||
120 | #define MX31_WEIM_CSCRxA(cs) (MX31_WEIM_CSCRx_BASE_ADDR(cs) + 0x8) | ||
121 | |||
110 | #define MX31_PCMCIA_MEM_BASE_ADDR 0xbc000000 | 122 | #define MX31_PCMCIA_MEM_BASE_ADDR 0xbc000000 |
111 | 123 | ||
124 | #define MX31_IO_ADDRESS(x) ( \ | ||
125 | IMX_IO_ADDRESS(x, MX31_AIPS1) ?: \ | ||
126 | IMX_IO_ADDRESS(x, MX31_AIPS2) ?: \ | ||
127 | IMX_IO_ADDRESS(x, MX31_AVIC) ?: \ | ||
128 | IMX_IO_ADDRESS(x, MX31_X_MEMC) ?: \ | ||
129 | IMX_IO_ADDRESS(x, MX31_SPBA0)) | ||
130 | |||
131 | #ifndef __ASSEMBLER__ | ||
132 | static inline void mx31_setup_weimcs(size_t cs, | ||
133 | unsigned upper, unsigned lower, unsigned addional) | ||
134 | { | ||
135 | __raw_writel(upper, MX31_IO_ADDRESS(MX31_WEIM_CSCRxU(cs))); | ||
136 | __raw_writel(lower, MX31_IO_ADDRESS(MX31_WEIM_CSCRxL(cs))); | ||
137 | __raw_writel(addional, MX31_IO_ADDRESS(MX31_WEIM_CSCRxA(cs))); | ||
138 | } | ||
139 | #endif | ||
140 | |||
112 | #define MX31_INT_I2C3 3 | 141 | #define MX31_INT_I2C3 3 |
113 | #define MX31_INT_I2C2 4 | 142 | #define MX31_INT_I2C2 4 |
114 | #define MX31_INT_MPEG4_ENCODER 5 | 143 | #define MX31_INT_MPEG4_ENCODER 5 |
@@ -186,6 +215,7 @@ | |||
186 | #define MX31_SYSTEM_REV_MIN MX31_CHIP_REV_1_0 | 215 | #define MX31_SYSTEM_REV_MIN MX31_CHIP_REV_1_0 |
187 | #define MX31_SYSTEM_REV_NUM 3 | 216 | #define MX31_SYSTEM_REV_NUM 3 |
188 | 217 | ||
218 | #ifdef IMX_NEEDS_DEPRECATED_SYMBOLS | ||
189 | /* these should go away */ | 219 | /* these should go away */ |
190 | #define ATA_BASE_ADDR MX31_ATA_BASE_ADDR | 220 | #define ATA_BASE_ADDR MX31_ATA_BASE_ADDR |
191 | #define UART4_BASE_ADDR MX31_UART4_BASE_ADDR | 221 | #define UART4_BASE_ADDR MX31_UART4_BASE_ADDR |
@@ -216,3 +246,6 @@ | |||
216 | #define MXC_INT_UART5 MX31_INT_UART5 | 246 | #define MXC_INT_UART5 MX31_INT_UART5 |
217 | #define MXC_INT_CCM MX31_INT_CCM | 247 | #define MXC_INT_CCM MX31_INT_CCM |
218 | #define MXC_INT_PCMCIA MX31_INT_PCMCIA | 248 | #define MXC_INT_PCMCIA MX31_INT_PCMCIA |
249 | #endif | ||
250 | |||
251 | #endif /* ifndef __MACH_MX31_H__ */ | ||