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Diffstat (limited to 'arch/arm/plat-mxc/include/mach/irqs.h')
-rw-r--r--arch/arm/plat-mxc/include/mach/irqs.h9
1 files changed, 8 insertions, 1 deletions
diff --git a/arch/arm/plat-mxc/include/mach/irqs.h b/arch/arm/plat-mxc/include/mach/irqs.h
index 7ebdd7191495..86781f7b0c0c 100644
--- a/arch/arm/plat-mxc/include/mach/irqs.h
+++ b/arch/arm/plat-mxc/include/mach/irqs.h
@@ -12,9 +12,13 @@
12#define __ASM_ARCH_MXC_IRQS_H__ 12#define __ASM_ARCH_MXC_IRQS_H__
13 13
14/* 14/*
15 * So far all i.MX SoCs have 64 internal interrupts 15 * SoCs with TZIC interrupt controller have 128 IRQs, those with AVIC have 64
16 */ 16 */
17#ifdef CONFIG_MXC_TZIC
18#define MXC_INTERNAL_IRQS 128
19#else
17#define MXC_INTERNAL_IRQS 64 20#define MXC_INTERNAL_IRQS 64
21#endif
18 22
19#define MXC_GPIO_IRQ_START MXC_INTERNAL_IRQS 23#define MXC_GPIO_IRQ_START MXC_INTERNAL_IRQS
20 24
@@ -25,6 +29,8 @@
25#define MXC_GPIO_IRQS (32 * 4) 29#define MXC_GPIO_IRQS (32 * 4)
26#elif defined CONFIG_ARCH_MX25 30#elif defined CONFIG_ARCH_MX25
27#define MXC_GPIO_IRQS (32 * 4) 31#define MXC_GPIO_IRQS (32 * 4)
32#elif defined CONFIG_ARCH_MX5
33#define MXC_GPIO_IRQS (32 * 4)
28#elif defined CONFIG_ARCH_MXC91231 34#elif defined CONFIG_ARCH_MXC91231
29#define MXC_GPIO_IRQS (32 * 4) 35#define MXC_GPIO_IRQS (32 * 4)
30#elif defined CONFIG_ARCH_MX3 36#elif defined CONFIG_ARCH_MX3
@@ -52,6 +58,7 @@
52#else 58#else
53#define MX3_IPU_IRQS 0 59#define MX3_IPU_IRQS 0
54#endif 60#endif
61/* REVISIT: Add IPU irqs on IMX51 */
55 62
56#define NR_IRQS (MXC_IPU_IRQ_START + MX3_IPU_IRQS) 63#define NR_IRQS (MXC_IPU_IRQ_START + MX3_IPU_IRQS)
57 64