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-rw-r--r--arch/arm/mm/proc-mohawk.S11
1 files changed, 6 insertions, 5 deletions
diff --git a/arch/arm/mm/proc-mohawk.S b/arch/arm/mm/proc-mohawk.S
index 52b5fd74fbb3..9674d36cc97d 100644
--- a/arch/arm/mm/proc-mohawk.S
+++ b/arch/arm/mm/proc-mohawk.S
@@ -186,15 +186,16 @@ ENTRY(mohawk_coherent_user_range)
186 mov pc, lr 186 mov pc, lr
187 187
188/* 188/*
189 * flush_kern_dcache_page(void *page) 189 * flush_kern_dcache_area(void *addr, size_t size)
190 * 190 *
191 * Ensure no D cache aliasing occurs, either with itself or 191 * Ensure no D cache aliasing occurs, either with itself or
192 * the I cache 192 * the I cache
193 * 193 *
194 * - addr - page aligned address 194 * - addr - kernel address
195 * - size - region size
195 */ 196 */
196ENTRY(mohawk_flush_kern_dcache_page) 197ENTRY(mohawk_flush_kern_dcache_area)
197 add r1, r0, #PAGE_SZ 198 add r1, r0, r1
1981: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry 1991: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
199 add r0, r0, #CACHE_DLINESIZE 200 add r0, r0, #CACHE_DLINESIZE
200 cmp r0, r1 201 cmp r0, r1
@@ -273,7 +274,7 @@ ENTRY(mohawk_cache_fns)
273 .long mohawk_flush_user_cache_range 274 .long mohawk_flush_user_cache_range
274 .long mohawk_coherent_kern_range 275 .long mohawk_coherent_kern_range
275 .long mohawk_coherent_user_range 276 .long mohawk_coherent_user_range
276 .long mohawk_flush_kern_dcache_page 277 .long mohawk_flush_kern_dcache_area
277 .long mohawk_dma_inv_range 278 .long mohawk_dma_inv_range
278 .long mohawk_dma_clean_range 279 .long mohawk_dma_clean_range
279 .long mohawk_dma_flush_range 280 .long mohawk_dma_flush_range