diff options
Diffstat (limited to 'arch/arm/mm/proc-arm925.S')
-rw-r--r-- | arch/arm/mm/proc-arm925.S | 43 |
1 files changed, 34 insertions, 9 deletions
diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S index cb53435a85ae..3c6cffe400f6 100644 --- a/arch/arm/mm/proc-arm925.S +++ b/arch/arm/mm/proc-arm925.S | |||
@@ -251,15 +251,16 @@ ENTRY(arm925_coherent_user_range) | |||
251 | mov pc, lr | 251 | mov pc, lr |
252 | 252 | ||
253 | /* | 253 | /* |
254 | * flush_kern_dcache_page(void *page) | 254 | * flush_kern_dcache_area(void *addr, size_t size) |
255 | * | 255 | * |
256 | * Ensure no D cache aliasing occurs, either with itself or | 256 | * Ensure no D cache aliasing occurs, either with itself or |
257 | * the I cache | 257 | * the I cache |
258 | * | 258 | * |
259 | * - addr - page aligned address | 259 | * - addr - kernel address |
260 | * - size - region size | ||
260 | */ | 261 | */ |
261 | ENTRY(arm925_flush_kern_dcache_page) | 262 | ENTRY(arm925_flush_kern_dcache_area) |
262 | add r1, r0, #PAGE_SZ | 263 | add r1, r0, r1 |
263 | 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry | 264 | 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry |
264 | add r0, r0, #CACHE_DLINESIZE | 265 | add r0, r0, #CACHE_DLINESIZE |
265 | cmp r0, r1 | 266 | cmp r0, r1 |
@@ -282,7 +283,7 @@ ENTRY(arm925_flush_kern_dcache_page) | |||
282 | * | 283 | * |
283 | * (same as v4wb) | 284 | * (same as v4wb) |
284 | */ | 285 | */ |
285 | ENTRY(arm925_dma_inv_range) | 286 | arm925_dma_inv_range: |
286 | #ifndef CONFIG_CPU_DCACHE_WRITETHROUGH | 287 | #ifndef CONFIG_CPU_DCACHE_WRITETHROUGH |
287 | tst r0, #CACHE_DLINESIZE - 1 | 288 | tst r0, #CACHE_DLINESIZE - 1 |
288 | mcrne p15, 0, r0, c7, c10, 1 @ clean D entry | 289 | mcrne p15, 0, r0, c7, c10, 1 @ clean D entry |
@@ -307,7 +308,7 @@ ENTRY(arm925_dma_inv_range) | |||
307 | * | 308 | * |
308 | * (same as v4wb) | 309 | * (same as v4wb) |
309 | */ | 310 | */ |
310 | ENTRY(arm925_dma_clean_range) | 311 | arm925_dma_clean_range: |
311 | #ifndef CONFIG_CPU_DCACHE_WRITETHROUGH | 312 | #ifndef CONFIG_CPU_DCACHE_WRITETHROUGH |
312 | bic r0, r0, #CACHE_DLINESIZE - 1 | 313 | bic r0, r0, #CACHE_DLINESIZE - 1 |
313 | 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry | 314 | 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry |
@@ -340,15 +341,39 @@ ENTRY(arm925_dma_flush_range) | |||
340 | mcr p15, 0, r0, c7, c10, 4 @ drain WB | 341 | mcr p15, 0, r0, c7, c10, 4 @ drain WB |
341 | mov pc, lr | 342 | mov pc, lr |
342 | 343 | ||
344 | /* | ||
345 | * dma_map_area(start, size, dir) | ||
346 | * - start - kernel virtual start address | ||
347 | * - size - size of region | ||
348 | * - dir - DMA direction | ||
349 | */ | ||
350 | ENTRY(arm925_dma_map_area) | ||
351 | add r1, r1, r0 | ||
352 | cmp r2, #DMA_TO_DEVICE | ||
353 | beq arm925_dma_clean_range | ||
354 | bcs arm925_dma_inv_range | ||
355 | b arm925_dma_flush_range | ||
356 | ENDPROC(arm925_dma_map_area) | ||
357 | |||
358 | /* | ||
359 | * dma_unmap_area(start, size, dir) | ||
360 | * - start - kernel virtual start address | ||
361 | * - size - size of region | ||
362 | * - dir - DMA direction | ||
363 | */ | ||
364 | ENTRY(arm925_dma_unmap_area) | ||
365 | mov pc, lr | ||
366 | ENDPROC(arm925_dma_unmap_area) | ||
367 | |||
343 | ENTRY(arm925_cache_fns) | 368 | ENTRY(arm925_cache_fns) |
344 | .long arm925_flush_kern_cache_all | 369 | .long arm925_flush_kern_cache_all |
345 | .long arm925_flush_user_cache_all | 370 | .long arm925_flush_user_cache_all |
346 | .long arm925_flush_user_cache_range | 371 | .long arm925_flush_user_cache_range |
347 | .long arm925_coherent_kern_range | 372 | .long arm925_coherent_kern_range |
348 | .long arm925_coherent_user_range | 373 | .long arm925_coherent_user_range |
349 | .long arm925_flush_kern_dcache_page | 374 | .long arm925_flush_kern_dcache_area |
350 | .long arm925_dma_inv_range | 375 | .long arm925_dma_map_area |
351 | .long arm925_dma_clean_range | 376 | .long arm925_dma_unmap_area |
352 | .long arm925_dma_flush_range | 377 | .long arm925_dma_flush_range |
353 | 378 | ||
354 | ENTRY(cpu_arm925_dcache_clean_area) | 379 | ENTRY(cpu_arm925_dcache_clean_area) |