aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mm/proc-arm922.S
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mm/proc-arm922.S')
-rw-r--r--arch/arm/mm/proc-arm922.S43
1 files changed, 34 insertions, 9 deletions
diff --git a/arch/arm/mm/proc-arm922.S b/arch/arm/mm/proc-arm922.S
index 06a1aa4e3398..c0ff8e4b1074 100644
--- a/arch/arm/mm/proc-arm922.S
+++ b/arch/arm/mm/proc-arm922.S
@@ -209,15 +209,16 @@ ENTRY(arm922_coherent_user_range)
209 mov pc, lr 209 mov pc, lr
210 210
211/* 211/*
212 * flush_kern_dcache_page(void *page) 212 * flush_kern_dcache_area(void *addr, size_t size)
213 * 213 *
214 * Ensure no D cache aliasing occurs, either with itself or 214 * Ensure no D cache aliasing occurs, either with itself or
215 * the I cache 215 * the I cache
216 * 216 *
217 * - addr - page aligned address 217 * - addr - kernel address
218 * - size - region size
218 */ 219 */
219ENTRY(arm922_flush_kern_dcache_page) 220ENTRY(arm922_flush_kern_dcache_area)
220 add r1, r0, #PAGE_SZ 221 add r1, r0, r1
2211: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry 2221: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
222 add r0, r0, #CACHE_DLINESIZE 223 add r0, r0, #CACHE_DLINESIZE
223 cmp r0, r1 224 cmp r0, r1
@@ -240,7 +241,7 @@ ENTRY(arm922_flush_kern_dcache_page)
240 * 241 *
241 * (same as v4wb) 242 * (same as v4wb)
242 */ 243 */
243ENTRY(arm922_dma_inv_range) 244arm922_dma_inv_range:
244 tst r0, #CACHE_DLINESIZE - 1 245 tst r0, #CACHE_DLINESIZE - 1
245 bic r0, r0, #CACHE_DLINESIZE - 1 246 bic r0, r0, #CACHE_DLINESIZE - 1
246 mcrne p15, 0, r0, c7, c10, 1 @ clean D entry 247 mcrne p15, 0, r0, c7, c10, 1 @ clean D entry
@@ -263,7 +264,7 @@ ENTRY(arm922_dma_inv_range)
263 * 264 *
264 * (same as v4wb) 265 * (same as v4wb)
265 */ 266 */
266ENTRY(arm922_dma_clean_range) 267arm922_dma_clean_range:
267 bic r0, r0, #CACHE_DLINESIZE - 1 268 bic r0, r0, #CACHE_DLINESIZE - 1
2681: mcr p15, 0, r0, c7, c10, 1 @ clean D entry 2691: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
269 add r0, r0, #CACHE_DLINESIZE 270 add r0, r0, #CACHE_DLINESIZE
@@ -289,15 +290,39 @@ ENTRY(arm922_dma_flush_range)
289 mcr p15, 0, r0, c7, c10, 4 @ drain WB 290 mcr p15, 0, r0, c7, c10, 4 @ drain WB
290 mov pc, lr 291 mov pc, lr
291 292
293/*
294 * dma_map_area(start, size, dir)
295 * - start - kernel virtual start address
296 * - size - size of region
297 * - dir - DMA direction
298 */
299ENTRY(arm922_dma_map_area)
300 add r1, r1, r0
301 cmp r2, #DMA_TO_DEVICE
302 beq arm922_dma_clean_range
303 bcs arm922_dma_inv_range
304 b arm922_dma_flush_range
305ENDPROC(arm922_dma_map_area)
306
307/*
308 * dma_unmap_area(start, size, dir)
309 * - start - kernel virtual start address
310 * - size - size of region
311 * - dir - DMA direction
312 */
313ENTRY(arm922_dma_unmap_area)
314 mov pc, lr
315ENDPROC(arm922_dma_unmap_area)
316
292ENTRY(arm922_cache_fns) 317ENTRY(arm922_cache_fns)
293 .long arm922_flush_kern_cache_all 318 .long arm922_flush_kern_cache_all
294 .long arm922_flush_user_cache_all 319 .long arm922_flush_user_cache_all
295 .long arm922_flush_user_cache_range 320 .long arm922_flush_user_cache_range
296 .long arm922_coherent_kern_range 321 .long arm922_coherent_kern_range
297 .long arm922_coherent_user_range 322 .long arm922_coherent_user_range
298 .long arm922_flush_kern_dcache_page 323 .long arm922_flush_kern_dcache_area
299 .long arm922_dma_inv_range 324 .long arm922_dma_map_area
300 .long arm922_dma_clean_range 325 .long arm922_dma_unmap_area
301 .long arm922_dma_flush_range 326 .long arm922_dma_flush_range
302 327
303#endif 328#endif