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-rw-r--r--arch/arm/mm/proc-arm920.S43
1 files changed, 34 insertions, 9 deletions
diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S
index 2b7c197cc58d..8be81992645d 100644
--- a/arch/arm/mm/proc-arm920.S
+++ b/arch/arm/mm/proc-arm920.S
@@ -207,15 +207,16 @@ ENTRY(arm920_coherent_user_range)
207 mov pc, lr 207 mov pc, lr
208 208
209/* 209/*
210 * flush_kern_dcache_page(void *page) 210 * flush_kern_dcache_area(void *addr, size_t size)
211 * 211 *
212 * Ensure no D cache aliasing occurs, either with itself or 212 * Ensure no D cache aliasing occurs, either with itself or
213 * the I cache 213 * the I cache
214 * 214 *
215 * - addr - page aligned address 215 * - addr - kernel address
216 * - size - region size
216 */ 217 */
217ENTRY(arm920_flush_kern_dcache_page) 218ENTRY(arm920_flush_kern_dcache_area)
218 add r1, r0, #PAGE_SZ 219 add r1, r0, r1
2191: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry 2201: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
220 add r0, r0, #CACHE_DLINESIZE 221 add r0, r0, #CACHE_DLINESIZE
221 cmp r0, r1 222 cmp r0, r1
@@ -238,7 +239,7 @@ ENTRY(arm920_flush_kern_dcache_page)
238 * 239 *
239 * (same as v4wb) 240 * (same as v4wb)
240 */ 241 */
241ENTRY(arm920_dma_inv_range) 242arm920_dma_inv_range:
242 tst r0, #CACHE_DLINESIZE - 1 243 tst r0, #CACHE_DLINESIZE - 1
243 bic r0, r0, #CACHE_DLINESIZE - 1 244 bic r0, r0, #CACHE_DLINESIZE - 1
244 mcrne p15, 0, r0, c7, c10, 1 @ clean D entry 245 mcrne p15, 0, r0, c7, c10, 1 @ clean D entry
@@ -261,7 +262,7 @@ ENTRY(arm920_dma_inv_range)
261 * 262 *
262 * (same as v4wb) 263 * (same as v4wb)
263 */ 264 */
264ENTRY(arm920_dma_clean_range) 265arm920_dma_clean_range:
265 bic r0, r0, #CACHE_DLINESIZE - 1 266 bic r0, r0, #CACHE_DLINESIZE - 1
2661: mcr p15, 0, r0, c7, c10, 1 @ clean D entry 2671: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
267 add r0, r0, #CACHE_DLINESIZE 268 add r0, r0, #CACHE_DLINESIZE
@@ -287,15 +288,39 @@ ENTRY(arm920_dma_flush_range)
287 mcr p15, 0, r0, c7, c10, 4 @ drain WB 288 mcr p15, 0, r0, c7, c10, 4 @ drain WB
288 mov pc, lr 289 mov pc, lr
289 290
291/*
292 * dma_map_area(start, size, dir)
293 * - start - kernel virtual start address
294 * - size - size of region
295 * - dir - DMA direction
296 */
297ENTRY(arm920_dma_map_area)
298 add r1, r1, r0
299 cmp r2, #DMA_TO_DEVICE
300 beq arm920_dma_clean_range
301 bcs arm920_dma_inv_range
302 b arm920_dma_flush_range
303ENDPROC(arm920_dma_map_area)
304
305/*
306 * dma_unmap_area(start, size, dir)
307 * - start - kernel virtual start address
308 * - size - size of region
309 * - dir - DMA direction
310 */
311ENTRY(arm920_dma_unmap_area)
312 mov pc, lr
313ENDPROC(arm920_dma_unmap_area)
314
290ENTRY(arm920_cache_fns) 315ENTRY(arm920_cache_fns)
291 .long arm920_flush_kern_cache_all 316 .long arm920_flush_kern_cache_all
292 .long arm920_flush_user_cache_all 317 .long arm920_flush_user_cache_all
293 .long arm920_flush_user_cache_range 318 .long arm920_flush_user_cache_range
294 .long arm920_coherent_kern_range 319 .long arm920_coherent_kern_range
295 .long arm920_coherent_user_range 320 .long arm920_coherent_user_range
296 .long arm920_flush_kern_dcache_page 321 .long arm920_flush_kern_dcache_area
297 .long arm920_dma_inv_range 322 .long arm920_dma_map_area
298 .long arm920_dma_clean_range 323 .long arm920_dma_unmap_area
299 .long arm920_dma_flush_range 324 .long arm920_dma_flush_range
300 325
301#endif 326#endif