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-rw-r--r--arch/arm/mm/proc-arm1022.S43
1 files changed, 34 insertions, 9 deletions
diff --git a/arch/arm/mm/proc-arm1022.S b/arch/arm/mm/proc-arm1022.S
index 8eb72d75a8b6..ce13e4a827de 100644
--- a/arch/arm/mm/proc-arm1022.S
+++ b/arch/arm/mm/proc-arm1022.S
@@ -214,17 +214,18 @@ ENTRY(arm1022_coherent_user_range)
214 mov pc, lr 214 mov pc, lr
215 215
216/* 216/*
217 * flush_kern_dcache_page(void *page) 217 * flush_kern_dcache_area(void *addr, size_t size)
218 * 218 *
219 * Ensure no D cache aliasing occurs, either with itself or 219 * Ensure no D cache aliasing occurs, either with itself or
220 * the I cache 220 * the I cache
221 * 221 *
222 * - page - page aligned address 222 * - addr - kernel address
223 * - size - region size
223 */ 224 */
224ENTRY(arm1022_flush_kern_dcache_page) 225ENTRY(arm1022_flush_kern_dcache_area)
225 mov ip, #0 226 mov ip, #0
226#ifndef CONFIG_CPU_DCACHE_DISABLE 227#ifndef CONFIG_CPU_DCACHE_DISABLE
227 add r1, r0, #PAGE_SZ 228 add r1, r0, r1
2281: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry 2291: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
229 add r0, r0, #CACHE_DLINESIZE 230 add r0, r0, #CACHE_DLINESIZE
230 cmp r0, r1 231 cmp r0, r1
@@ -246,7 +247,7 @@ ENTRY(arm1022_flush_kern_dcache_page)
246 * 247 *
247 * (same as v4wb) 248 * (same as v4wb)
248 */ 249 */
249ENTRY(arm1022_dma_inv_range) 250arm1022_dma_inv_range:
250 mov ip, #0 251 mov ip, #0
251#ifndef CONFIG_CPU_DCACHE_DISABLE 252#ifndef CONFIG_CPU_DCACHE_DISABLE
252 tst r0, #CACHE_DLINESIZE - 1 253 tst r0, #CACHE_DLINESIZE - 1
@@ -272,7 +273,7 @@ ENTRY(arm1022_dma_inv_range)
272 * 273 *
273 * (same as v4wb) 274 * (same as v4wb)
274 */ 275 */
275ENTRY(arm1022_dma_clean_range) 276arm1022_dma_clean_range:
276 mov ip, #0 277 mov ip, #0
277#ifndef CONFIG_CPU_DCACHE_DISABLE 278#ifndef CONFIG_CPU_DCACHE_DISABLE
278 bic r0, r0, #CACHE_DLINESIZE - 1 279 bic r0, r0, #CACHE_DLINESIZE - 1
@@ -304,15 +305,39 @@ ENTRY(arm1022_dma_flush_range)
304 mcr p15, 0, ip, c7, c10, 4 @ drain WB 305 mcr p15, 0, ip, c7, c10, 4 @ drain WB
305 mov pc, lr 306 mov pc, lr
306 307
308/*
309 * dma_map_area(start, size, dir)
310 * - start - kernel virtual start address
311 * - size - size of region
312 * - dir - DMA direction
313 */
314ENTRY(arm1022_dma_map_area)
315 add r1, r1, r0
316 cmp r2, #DMA_TO_DEVICE
317 beq arm1022_dma_clean_range
318 bcs arm1022_dma_inv_range
319 b arm1022_dma_flush_range
320ENDPROC(arm1022_dma_map_area)
321
322/*
323 * dma_unmap_area(start, size, dir)
324 * - start - kernel virtual start address
325 * - size - size of region
326 * - dir - DMA direction
327 */
328ENTRY(arm1022_dma_unmap_area)
329 mov pc, lr
330ENDPROC(arm1022_dma_unmap_area)
331
307ENTRY(arm1022_cache_fns) 332ENTRY(arm1022_cache_fns)
308 .long arm1022_flush_kern_cache_all 333 .long arm1022_flush_kern_cache_all
309 .long arm1022_flush_user_cache_all 334 .long arm1022_flush_user_cache_all
310 .long arm1022_flush_user_cache_range 335 .long arm1022_flush_user_cache_range
311 .long arm1022_coherent_kern_range 336 .long arm1022_coherent_kern_range
312 .long arm1022_coherent_user_range 337 .long arm1022_coherent_user_range
313 .long arm1022_flush_kern_dcache_page 338 .long arm1022_flush_kern_dcache_area
314 .long arm1022_dma_inv_range 339 .long arm1022_dma_map_area
315 .long arm1022_dma_clean_range 340 .long arm1022_dma_unmap_area
316 .long arm1022_dma_flush_range 341 .long arm1022_dma_flush_range
317 342
318 .align 5 343 .align 5