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-rw-r--r--arch/arm/mm/flush.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c
index 2b269c955524..1a8d4aa821be 100644
--- a/arch/arm/mm/flush.c
+++ b/arch/arm/mm/flush.c
@@ -253,8 +253,8 @@ void __sync_icache_dcache(pte_t pteval)
253 253
254 if (!test_and_set_bit(PG_dcache_clean, &page->flags)) 254 if (!test_and_set_bit(PG_dcache_clean, &page->flags))
255 __flush_dcache_page(mapping, page); 255 __flush_dcache_page(mapping, page);
256 /* pte_exec() already checked above for non-aliasing VIPT cache */ 256
257 if (cache_is_vipt_nonaliasing() || pte_exec(pteval)) 257 if (pte_exec(pteval))
258 __flush_icache_all(); 258 __flush_icache_all();
259} 259}
260#endif 260#endif
@@ -275,7 +275,8 @@ void __sync_icache_dcache(pte_t pteval)
275 * kernel cache lines for later. Otherwise, we assume we have 275 * kernel cache lines for later. Otherwise, we assume we have
276 * aliasing mappings. 276 * aliasing mappings.
277 * 277 *
278 * Note that we disable the lazy flush for SMP. 278 * Note that we disable the lazy flush for SMP configurations where
279 * the cache maintenance operations are not automatically broadcasted.
279 */ 280 */
280void flush_dcache_page(struct page *page) 281void flush_dcache_page(struct page *page)
281{ 282{