diff options
Diffstat (limited to 'arch/arm/mm/dma-mapping.c')
-rw-r--r-- | arch/arm/mm/dma-mapping.c | 666 |
1 files changed, 272 insertions, 394 deletions
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c index b9590a7085ca..13fa536d82e6 100644 --- a/arch/arm/mm/dma-mapping.c +++ b/arch/arm/mm/dma-mapping.c | |||
@@ -11,7 +11,7 @@ | |||
11 | */ | 11 | */ |
12 | #include <linux/module.h> | 12 | #include <linux/module.h> |
13 | #include <linux/mm.h> | 13 | #include <linux/mm.h> |
14 | #include <linux/slab.h> | 14 | #include <linux/gfp.h> |
15 | #include <linux/errno.h> | 15 | #include <linux/errno.h> |
16 | #include <linux/list.h> | 16 | #include <linux/list.h> |
17 | #include <linux/init.h> | 17 | #include <linux/init.h> |
@@ -29,9 +29,6 @@ | |||
29 | #error "CONSISTENT_DMA_SIZE must be multiple of 2MiB" | 29 | #error "CONSISTENT_DMA_SIZE must be multiple of 2MiB" |
30 | #endif | 30 | #endif |
31 | 31 | ||
32 | #define CONSISTENT_END (0xffe00000) | ||
33 | #define CONSISTENT_BASE (CONSISTENT_END - CONSISTENT_DMA_SIZE) | ||
34 | |||
35 | #define CONSISTENT_OFFSET(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PAGE_SHIFT) | 32 | #define CONSISTENT_OFFSET(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PAGE_SHIFT) |
36 | #define CONSISTENT_PTE_INDEX(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PGDIR_SHIFT) | 33 | #define CONSISTENT_PTE_INDEX(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PGDIR_SHIFT) |
37 | #define NUM_CONSISTENT_PTES (CONSISTENT_DMA_SIZE >> PGDIR_SHIFT) | 34 | #define NUM_CONSISTENT_PTES (CONSISTENT_DMA_SIZE >> PGDIR_SHIFT) |
@@ -63,194 +60,152 @@ static u64 get_coherent_dma_mask(struct device *dev) | |||
63 | return mask; | 60 | return mask; |
64 | } | 61 | } |
65 | 62 | ||
66 | #ifdef CONFIG_MMU | ||
67 | /* | 63 | /* |
68 | * These are the page tables (2MB each) covering uncached, DMA consistent allocations | 64 | * Allocate a DMA buffer for 'dev' of size 'size' using the |
65 | * specified gfp mask. Note that 'size' must be page aligned. | ||
69 | */ | 66 | */ |
70 | static pte_t *consistent_pte[NUM_CONSISTENT_PTES]; | 67 | static struct page *__dma_alloc_buffer(struct device *dev, size_t size, gfp_t gfp) |
71 | static DEFINE_SPINLOCK(consistent_lock); | 68 | { |
69 | unsigned long order = get_order(size); | ||
70 | struct page *page, *p, *e; | ||
71 | void *ptr; | ||
72 | u64 mask = get_coherent_dma_mask(dev); | ||
72 | 73 | ||
73 | /* | 74 | #ifdef CONFIG_DMA_API_DEBUG |
74 | * VM region handling support. | 75 | u64 limit = (mask + 1) & ~mask; |
75 | * | 76 | if (limit && size >= limit) { |
76 | * This should become something generic, handling VM region allocations for | 77 | dev_warn(dev, "coherent allocation too big (requested %#x mask %#llx)\n", |
77 | * vmalloc and similar (ioremap, module space, etc). | 78 | size, mask); |
78 | * | 79 | return NULL; |
79 | * I envisage vmalloc()'s supporting vm_struct becoming: | 80 | } |
80 | * | 81 | #endif |
81 | * struct vm_struct { | ||
82 | * struct vm_region region; | ||
83 | * unsigned long flags; | ||
84 | * struct page **pages; | ||
85 | * unsigned int nr_pages; | ||
86 | * unsigned long phys_addr; | ||
87 | * }; | ||
88 | * | ||
89 | * get_vm_area() would then call vm_region_alloc with an appropriate | ||
90 | * struct vm_region head (eg): | ||
91 | * | ||
92 | * struct vm_region vmalloc_head = { | ||
93 | * .vm_list = LIST_HEAD_INIT(vmalloc_head.vm_list), | ||
94 | * .vm_start = VMALLOC_START, | ||
95 | * .vm_end = VMALLOC_END, | ||
96 | * }; | ||
97 | * | ||
98 | * However, vmalloc_head.vm_start is variable (typically, it is dependent on | ||
99 | * the amount of RAM found at boot time.) I would imagine that get_vm_area() | ||
100 | * would have to initialise this each time prior to calling vm_region_alloc(). | ||
101 | */ | ||
102 | struct arm_vm_region { | ||
103 | struct list_head vm_list; | ||
104 | unsigned long vm_start; | ||
105 | unsigned long vm_end; | ||
106 | struct page *vm_pages; | ||
107 | int vm_active; | ||
108 | }; | ||
109 | 82 | ||
110 | static struct arm_vm_region consistent_head = { | 83 | if (!mask) |
111 | .vm_list = LIST_HEAD_INIT(consistent_head.vm_list), | 84 | return NULL; |
112 | .vm_start = CONSISTENT_BASE, | ||
113 | .vm_end = CONSISTENT_END, | ||
114 | }; | ||
115 | 85 | ||
116 | static struct arm_vm_region * | 86 | if (mask < 0xffffffffULL) |
117 | arm_vm_region_alloc(struct arm_vm_region *head, size_t size, gfp_t gfp) | 87 | gfp |= GFP_DMA; |
118 | { | 88 | |
119 | unsigned long addr = head->vm_start, end = head->vm_end - size; | 89 | page = alloc_pages(gfp, order); |
120 | unsigned long flags; | 90 | if (!page) |
121 | struct arm_vm_region *c, *new; | 91 | return NULL; |
122 | |||
123 | new = kmalloc(sizeof(struct arm_vm_region), gfp); | ||
124 | if (!new) | ||
125 | goto out; | ||
126 | |||
127 | spin_lock_irqsave(&consistent_lock, flags); | ||
128 | |||
129 | list_for_each_entry(c, &head->vm_list, vm_list) { | ||
130 | if ((addr + size) < addr) | ||
131 | goto nospc; | ||
132 | if ((addr + size) <= c->vm_start) | ||
133 | goto found; | ||
134 | addr = c->vm_end; | ||
135 | if (addr > end) | ||
136 | goto nospc; | ||
137 | } | ||
138 | 92 | ||
139 | found: | ||
140 | /* | 93 | /* |
141 | * Insert this entry _before_ the one we found. | 94 | * Now split the huge page and free the excess pages |
142 | */ | 95 | */ |
143 | list_add_tail(&new->vm_list, &c->vm_list); | 96 | split_page(page, order); |
144 | new->vm_start = addr; | 97 | for (p = page + (size >> PAGE_SHIFT), e = page + (1 << order); p < e; p++) |
145 | new->vm_end = addr + size; | 98 | __free_page(p); |
146 | new->vm_active = 1; | 99 | |
147 | 100 | /* | |
148 | spin_unlock_irqrestore(&consistent_lock, flags); | 101 | * Ensure that the allocated pages are zeroed, and that any data |
149 | return new; | 102 | * lurking in the kernel direct-mapped region is invalidated. |
150 | 103 | */ | |
151 | nospc: | 104 | ptr = page_address(page); |
152 | spin_unlock_irqrestore(&consistent_lock, flags); | 105 | memset(ptr, 0, size); |
153 | kfree(new); | 106 | dmac_flush_range(ptr, ptr + size); |
154 | out: | 107 | outer_flush_range(__pa(ptr), __pa(ptr) + size); |
155 | return NULL; | 108 | |
109 | return page; | ||
156 | } | 110 | } |
157 | 111 | ||
158 | static struct arm_vm_region *arm_vm_region_find(struct arm_vm_region *head, unsigned long addr) | 112 | /* |
113 | * Free a DMA buffer. 'size' must be page aligned. | ||
114 | */ | ||
115 | static void __dma_free_buffer(struct page *page, size_t size) | ||
159 | { | 116 | { |
160 | struct arm_vm_region *c; | 117 | struct page *e = page + (size >> PAGE_SHIFT); |
161 | 118 | ||
162 | list_for_each_entry(c, &head->vm_list, vm_list) { | 119 | while (page < e) { |
163 | if (c->vm_active && c->vm_start == addr) | 120 | __free_page(page); |
164 | goto out; | 121 | page++; |
165 | } | 122 | } |
166 | c = NULL; | ||
167 | out: | ||
168 | return c; | ||
169 | } | 123 | } |
170 | 124 | ||
125 | #ifdef CONFIG_MMU | ||
126 | /* | ||
127 | * These are the page tables (2MB each) covering uncached, DMA consistent allocations | ||
128 | */ | ||
129 | static pte_t *consistent_pte[NUM_CONSISTENT_PTES]; | ||
130 | |||
131 | #include "vmregion.h" | ||
132 | |||
133 | static struct arm_vmregion_head consistent_head = { | ||
134 | .vm_lock = __SPIN_LOCK_UNLOCKED(&consistent_head.vm_lock), | ||
135 | .vm_list = LIST_HEAD_INIT(consistent_head.vm_list), | ||
136 | .vm_start = CONSISTENT_BASE, | ||
137 | .vm_end = CONSISTENT_END, | ||
138 | }; | ||
139 | |||
171 | #ifdef CONFIG_HUGETLB_PAGE | 140 | #ifdef CONFIG_HUGETLB_PAGE |
172 | #error ARM Coherent DMA allocator does not (yet) support huge TLB | 141 | #error ARM Coherent DMA allocator does not (yet) support huge TLB |
173 | #endif | 142 | #endif |
174 | 143 | ||
175 | static void * | 144 | /* |
176 | __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp, | 145 | * Initialise the consistent memory allocation. |
177 | pgprot_t prot) | 146 | */ |
147 | static int __init consistent_init(void) | ||
178 | { | 148 | { |
179 | struct page *page; | 149 | int ret = 0; |
180 | struct arm_vm_region *c; | 150 | pgd_t *pgd; |
181 | unsigned long order; | 151 | pmd_t *pmd; |
182 | u64 mask = get_coherent_dma_mask(dev); | 152 | pte_t *pte; |
183 | u64 limit; | 153 | int i = 0; |
154 | u32 base = CONSISTENT_BASE; | ||
184 | 155 | ||
185 | if (!consistent_pte[0]) { | 156 | do { |
186 | printk(KERN_ERR "%s: not initialised\n", __func__); | 157 | pgd = pgd_offset(&init_mm, base); |
187 | dump_stack(); | 158 | pmd = pmd_alloc(&init_mm, pgd, base); |
188 | return NULL; | 159 | if (!pmd) { |
189 | } | 160 | printk(KERN_ERR "%s: no pmd tables\n", __func__); |
161 | ret = -ENOMEM; | ||
162 | break; | ||
163 | } | ||
164 | WARN_ON(!pmd_none(*pmd)); | ||
190 | 165 | ||
191 | if (!mask) | 166 | pte = pte_alloc_kernel(pmd, base); |
192 | goto no_page; | 167 | if (!pte) { |
168 | printk(KERN_ERR "%s: no pte tables\n", __func__); | ||
169 | ret = -ENOMEM; | ||
170 | break; | ||
171 | } | ||
193 | 172 | ||
194 | /* | 173 | consistent_pte[i++] = pte; |
195 | * Sanity check the allocation size. | 174 | base += (1 << PGDIR_SHIFT); |
196 | */ | 175 | } while (base < CONSISTENT_END); |
197 | size = PAGE_ALIGN(size); | ||
198 | limit = (mask + 1) & ~mask; | ||
199 | if ((limit && size >= limit) || | ||
200 | size >= (CONSISTENT_END - CONSISTENT_BASE)) { | ||
201 | printk(KERN_WARNING "coherent allocation too big " | ||
202 | "(requested %#x mask %#llx)\n", size, mask); | ||
203 | goto no_page; | ||
204 | } | ||
205 | 176 | ||
206 | order = get_order(size); | 177 | return ret; |
178 | } | ||
207 | 179 | ||
208 | if (mask < 0xffffffffULL) | 180 | core_initcall(consistent_init); |
209 | gfp |= GFP_DMA; | ||
210 | 181 | ||
211 | page = alloc_pages(gfp, order); | 182 | static void * |
212 | if (!page) | 183 | __dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot) |
213 | goto no_page; | 184 | { |
185 | struct arm_vmregion *c; | ||
214 | 186 | ||
215 | /* | 187 | if (!consistent_pte[0]) { |
216 | * Invalidate any data that might be lurking in the | 188 | printk(KERN_ERR "%s: not initialised\n", __func__); |
217 | * kernel direct-mapped region for device DMA. | 189 | dump_stack(); |
218 | */ | 190 | return NULL; |
219 | { | ||
220 | void *ptr = page_address(page); | ||
221 | memset(ptr, 0, size); | ||
222 | dmac_flush_range(ptr, ptr + size); | ||
223 | outer_flush_range(__pa(ptr), __pa(ptr) + size); | ||
224 | } | 191 | } |
225 | 192 | ||
226 | /* | 193 | /* |
227 | * Allocate a virtual address in the consistent mapping region. | 194 | * Allocate a virtual address in the consistent mapping region. |
228 | */ | 195 | */ |
229 | c = arm_vm_region_alloc(&consistent_head, size, | 196 | c = arm_vmregion_alloc(&consistent_head, size, |
230 | gfp & ~(__GFP_DMA | __GFP_HIGHMEM)); | 197 | gfp & ~(__GFP_DMA | __GFP_HIGHMEM)); |
231 | if (c) { | 198 | if (c) { |
232 | pte_t *pte; | 199 | pte_t *pte; |
233 | struct page *end = page + (1 << order); | ||
234 | int idx = CONSISTENT_PTE_INDEX(c->vm_start); | 200 | int idx = CONSISTENT_PTE_INDEX(c->vm_start); |
235 | u32 off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1); | 201 | u32 off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1); |
236 | 202 | ||
237 | pte = consistent_pte[idx] + off; | 203 | pte = consistent_pte[idx] + off; |
238 | c->vm_pages = page; | 204 | c->vm_pages = page; |
239 | 205 | ||
240 | split_page(page, order); | ||
241 | |||
242 | /* | ||
243 | * Set the "dma handle" | ||
244 | */ | ||
245 | *handle = page_to_dma(dev, page); | ||
246 | |||
247 | do { | 206 | do { |
248 | BUG_ON(!pte_none(*pte)); | 207 | BUG_ON(!pte_none(*pte)); |
249 | 208 | ||
250 | /* | ||
251 | * x86 does not mark the pages reserved... | ||
252 | */ | ||
253 | SetPageReserved(page); | ||
254 | set_pte_ext(pte, mk_pte(page, prot), 0); | 209 | set_pte_ext(pte, mk_pte(page, prot), 0); |
255 | page++; | 210 | page++; |
256 | pte++; | 211 | pte++; |
@@ -261,48 +216,90 @@ __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp, | |||
261 | } | 216 | } |
262 | } while (size -= PAGE_SIZE); | 217 | } while (size -= PAGE_SIZE); |
263 | 218 | ||
264 | /* | ||
265 | * Free the otherwise unused pages. | ||
266 | */ | ||
267 | while (page < end) { | ||
268 | __free_page(page); | ||
269 | page++; | ||
270 | } | ||
271 | |||
272 | return (void *)c->vm_start; | 219 | return (void *)c->vm_start; |
273 | } | 220 | } |
274 | |||
275 | if (page) | ||
276 | __free_pages(page, order); | ||
277 | no_page: | ||
278 | *handle = ~0; | ||
279 | return NULL; | 221 | return NULL; |
280 | } | 222 | } |
223 | |||
224 | static void __dma_free_remap(void *cpu_addr, size_t size) | ||
225 | { | ||
226 | struct arm_vmregion *c; | ||
227 | unsigned long addr; | ||
228 | pte_t *ptep; | ||
229 | int idx; | ||
230 | u32 off; | ||
231 | |||
232 | c = arm_vmregion_find_remove(&consistent_head, (unsigned long)cpu_addr); | ||
233 | if (!c) { | ||
234 | printk(KERN_ERR "%s: trying to free invalid coherent area: %p\n", | ||
235 | __func__, cpu_addr); | ||
236 | dump_stack(); | ||
237 | return; | ||
238 | } | ||
239 | |||
240 | if ((c->vm_end - c->vm_start) != size) { | ||
241 | printk(KERN_ERR "%s: freeing wrong coherent size (%ld != %d)\n", | ||
242 | __func__, c->vm_end - c->vm_start, size); | ||
243 | dump_stack(); | ||
244 | size = c->vm_end - c->vm_start; | ||
245 | } | ||
246 | |||
247 | idx = CONSISTENT_PTE_INDEX(c->vm_start); | ||
248 | off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1); | ||
249 | ptep = consistent_pte[idx] + off; | ||
250 | addr = c->vm_start; | ||
251 | do { | ||
252 | pte_t pte = ptep_get_and_clear(&init_mm, addr, ptep); | ||
253 | |||
254 | ptep++; | ||
255 | addr += PAGE_SIZE; | ||
256 | off++; | ||
257 | if (off >= PTRS_PER_PTE) { | ||
258 | off = 0; | ||
259 | ptep = consistent_pte[++idx]; | ||
260 | } | ||
261 | |||
262 | if (pte_none(pte) || !pte_present(pte)) | ||
263 | printk(KERN_CRIT "%s: bad page in kernel page table\n", | ||
264 | __func__); | ||
265 | } while (size -= PAGE_SIZE); | ||
266 | |||
267 | flush_tlb_kernel_range(c->vm_start, c->vm_end); | ||
268 | |||
269 | arm_vmregion_free(&consistent_head, c); | ||
270 | } | ||
271 | |||
281 | #else /* !CONFIG_MMU */ | 272 | #else /* !CONFIG_MMU */ |
273 | |||
274 | #define __dma_alloc_remap(page, size, gfp, prot) page_address(page) | ||
275 | #define __dma_free_remap(addr, size) do { } while (0) | ||
276 | |||
277 | #endif /* CONFIG_MMU */ | ||
278 | |||
282 | static void * | 279 | static void * |
283 | __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp, | 280 | __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp, |
284 | pgprot_t prot) | 281 | pgprot_t prot) |
285 | { | 282 | { |
286 | void *virt; | 283 | struct page *page; |
287 | u64 mask = get_coherent_dma_mask(dev); | 284 | void *addr; |
288 | 285 | ||
289 | if (!mask) | 286 | *handle = ~0; |
290 | goto error; | 287 | size = PAGE_ALIGN(size); |
291 | 288 | ||
292 | if (mask < 0xffffffffULL) | 289 | page = __dma_alloc_buffer(dev, size, gfp); |
293 | gfp |= GFP_DMA; | 290 | if (!page) |
294 | virt = kmalloc(size, gfp); | 291 | return NULL; |
295 | if (!virt) | ||
296 | goto error; | ||
297 | 292 | ||
298 | *handle = virt_to_dma(dev, virt); | 293 | if (!arch_is_coherent()) |
299 | return virt; | 294 | addr = __dma_alloc_remap(page, size, gfp, prot); |
295 | else | ||
296 | addr = page_address(page); | ||
300 | 297 | ||
301 | error: | 298 | if (addr) |
302 | *handle = ~0; | 299 | *handle = page_to_dma(dev, page); |
303 | return NULL; | 300 | |
301 | return addr; | ||
304 | } | 302 | } |
305 | #endif /* CONFIG_MMU */ | ||
306 | 303 | ||
307 | /* | 304 | /* |
308 | * Allocate DMA-coherent memory space and return both the kernel remapped | 305 | * Allocate DMA-coherent memory space and return both the kernel remapped |
@@ -316,19 +313,8 @@ dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gf | |||
316 | if (dma_alloc_from_coherent(dev, size, handle, &memory)) | 313 | if (dma_alloc_from_coherent(dev, size, handle, &memory)) |
317 | return memory; | 314 | return memory; |
318 | 315 | ||
319 | if (arch_is_coherent()) { | ||
320 | void *virt; | ||
321 | |||
322 | virt = kmalloc(size, gfp); | ||
323 | if (!virt) | ||
324 | return NULL; | ||
325 | *handle = virt_to_dma(dev, virt); | ||
326 | |||
327 | return virt; | ||
328 | } | ||
329 | |||
330 | return __dma_alloc(dev, size, handle, gfp, | 316 | return __dma_alloc(dev, size, handle, gfp, |
331 | pgprot_noncached(pgprot_kernel)); | 317 | pgprot_dmacoherent(pgprot_kernel)); |
332 | } | 318 | } |
333 | EXPORT_SYMBOL(dma_alloc_coherent); | 319 | EXPORT_SYMBOL(dma_alloc_coherent); |
334 | 320 | ||
@@ -349,15 +335,12 @@ static int dma_mmap(struct device *dev, struct vm_area_struct *vma, | |||
349 | { | 335 | { |
350 | int ret = -ENXIO; | 336 | int ret = -ENXIO; |
351 | #ifdef CONFIG_MMU | 337 | #ifdef CONFIG_MMU |
352 | unsigned long flags, user_size, kern_size; | 338 | unsigned long user_size, kern_size; |
353 | struct arm_vm_region *c; | 339 | struct arm_vmregion *c; |
354 | 340 | ||
355 | user_size = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT; | 341 | user_size = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT; |
356 | 342 | ||
357 | spin_lock_irqsave(&consistent_lock, flags); | 343 | c = arm_vmregion_find(&consistent_head, (unsigned long)cpu_addr); |
358 | c = arm_vm_region_find(&consistent_head, (unsigned long)cpu_addr); | ||
359 | spin_unlock_irqrestore(&consistent_lock, flags); | ||
360 | |||
361 | if (c) { | 344 | if (c) { |
362 | unsigned long off = vma->vm_pgoff; | 345 | unsigned long off = vma->vm_pgoff; |
363 | 346 | ||
@@ -379,7 +362,7 @@ static int dma_mmap(struct device *dev, struct vm_area_struct *vma, | |||
379 | int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma, | 362 | int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma, |
380 | void *cpu_addr, dma_addr_t dma_addr, size_t size) | 363 | void *cpu_addr, dma_addr_t dma_addr, size_t size) |
381 | { | 364 | { |
382 | vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); | 365 | vma->vm_page_prot = pgprot_dmacoherent(vma->vm_page_prot); |
383 | return dma_mmap(dev, vma, cpu_addr, dma_addr, size); | 366 | return dma_mmap(dev, vma, cpu_addr, dma_addr, size); |
384 | } | 367 | } |
385 | EXPORT_SYMBOL(dma_mmap_coherent); | 368 | EXPORT_SYMBOL(dma_mmap_coherent); |
@@ -396,221 +379,66 @@ EXPORT_SYMBOL(dma_mmap_writecombine); | |||
396 | * free a page as defined by the above mapping. | 379 | * free a page as defined by the above mapping. |
397 | * Must not be called with IRQs disabled. | 380 | * Must not be called with IRQs disabled. |
398 | */ | 381 | */ |
399 | #ifdef CONFIG_MMU | ||
400 | void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, dma_addr_t handle) | 382 | void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, dma_addr_t handle) |
401 | { | 383 | { |
402 | struct arm_vm_region *c; | ||
403 | unsigned long flags, addr; | ||
404 | pte_t *ptep; | ||
405 | int idx; | ||
406 | u32 off; | ||
407 | |||
408 | WARN_ON(irqs_disabled()); | 384 | WARN_ON(irqs_disabled()); |
409 | 385 | ||
410 | if (dma_release_from_coherent(dev, get_order(size), cpu_addr)) | 386 | if (dma_release_from_coherent(dev, get_order(size), cpu_addr)) |
411 | return; | 387 | return; |
412 | 388 | ||
413 | if (arch_is_coherent()) { | ||
414 | kfree(cpu_addr); | ||
415 | return; | ||
416 | } | ||
417 | |||
418 | size = PAGE_ALIGN(size); | 389 | size = PAGE_ALIGN(size); |
419 | 390 | ||
420 | spin_lock_irqsave(&consistent_lock, flags); | 391 | if (!arch_is_coherent()) |
421 | c = arm_vm_region_find(&consistent_head, (unsigned long)cpu_addr); | 392 | __dma_free_remap(cpu_addr, size); |
422 | if (!c) | ||
423 | goto no_area; | ||
424 | |||
425 | c->vm_active = 0; | ||
426 | spin_unlock_irqrestore(&consistent_lock, flags); | ||
427 | |||
428 | if ((c->vm_end - c->vm_start) != size) { | ||
429 | printk(KERN_ERR "%s: freeing wrong coherent size (%ld != %d)\n", | ||
430 | __func__, c->vm_end - c->vm_start, size); | ||
431 | dump_stack(); | ||
432 | size = c->vm_end - c->vm_start; | ||
433 | } | ||
434 | |||
435 | idx = CONSISTENT_PTE_INDEX(c->vm_start); | ||
436 | off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1); | ||
437 | ptep = consistent_pte[idx] + off; | ||
438 | addr = c->vm_start; | ||
439 | do { | ||
440 | pte_t pte = ptep_get_and_clear(&init_mm, addr, ptep); | ||
441 | unsigned long pfn; | ||
442 | |||
443 | ptep++; | ||
444 | addr += PAGE_SIZE; | ||
445 | off++; | ||
446 | if (off >= PTRS_PER_PTE) { | ||
447 | off = 0; | ||
448 | ptep = consistent_pte[++idx]; | ||
449 | } | ||
450 | |||
451 | if (!pte_none(pte) && pte_present(pte)) { | ||
452 | pfn = pte_pfn(pte); | ||
453 | |||
454 | if (pfn_valid(pfn)) { | ||
455 | struct page *page = pfn_to_page(pfn); | ||
456 | |||
457 | /* | ||
458 | * x86 does not mark the pages reserved... | ||
459 | */ | ||
460 | ClearPageReserved(page); | ||
461 | |||
462 | __free_page(page); | ||
463 | continue; | ||
464 | } | ||
465 | } | ||
466 | |||
467 | printk(KERN_CRIT "%s: bad page in kernel page table\n", | ||
468 | __func__); | ||
469 | } while (size -= PAGE_SIZE); | ||
470 | |||
471 | flush_tlb_kernel_range(c->vm_start, c->vm_end); | ||
472 | 393 | ||
473 | spin_lock_irqsave(&consistent_lock, flags); | 394 | __dma_free_buffer(dma_to_page(dev, handle), size); |
474 | list_del(&c->vm_list); | ||
475 | spin_unlock_irqrestore(&consistent_lock, flags); | ||
476 | |||
477 | kfree(c); | ||
478 | return; | ||
479 | |||
480 | no_area: | ||
481 | spin_unlock_irqrestore(&consistent_lock, flags); | ||
482 | printk(KERN_ERR "%s: trying to free invalid coherent area: %p\n", | ||
483 | __func__, cpu_addr); | ||
484 | dump_stack(); | ||
485 | } | ||
486 | #else /* !CONFIG_MMU */ | ||
487 | void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, dma_addr_t handle) | ||
488 | { | ||
489 | if (dma_release_from_coherent(dev, get_order(size), cpu_addr)) | ||
490 | return; | ||
491 | kfree(cpu_addr); | ||
492 | } | 395 | } |
493 | #endif /* CONFIG_MMU */ | ||
494 | EXPORT_SYMBOL(dma_free_coherent); | 396 | EXPORT_SYMBOL(dma_free_coherent); |
495 | 397 | ||
496 | /* | 398 | /* |
497 | * Initialise the consistent memory allocation. | ||
498 | */ | ||
499 | static int __init consistent_init(void) | ||
500 | { | ||
501 | int ret = 0; | ||
502 | #ifdef CONFIG_MMU | ||
503 | pgd_t *pgd; | ||
504 | pmd_t *pmd; | ||
505 | pte_t *pte; | ||
506 | int i = 0; | ||
507 | u32 base = CONSISTENT_BASE; | ||
508 | |||
509 | do { | ||
510 | pgd = pgd_offset(&init_mm, base); | ||
511 | pmd = pmd_alloc(&init_mm, pgd, base); | ||
512 | if (!pmd) { | ||
513 | printk(KERN_ERR "%s: no pmd tables\n", __func__); | ||
514 | ret = -ENOMEM; | ||
515 | break; | ||
516 | } | ||
517 | WARN_ON(!pmd_none(*pmd)); | ||
518 | |||
519 | pte = pte_alloc_kernel(pmd, base); | ||
520 | if (!pte) { | ||
521 | printk(KERN_ERR "%s: no pte tables\n", __func__); | ||
522 | ret = -ENOMEM; | ||
523 | break; | ||
524 | } | ||
525 | |||
526 | consistent_pte[i++] = pte; | ||
527 | base += (1 << PGDIR_SHIFT); | ||
528 | } while (base < CONSISTENT_END); | ||
529 | #endif /* !CONFIG_MMU */ | ||
530 | |||
531 | return ret; | ||
532 | } | ||
533 | |||
534 | core_initcall(consistent_init); | ||
535 | |||
536 | /* | ||
537 | * Make an area consistent for devices. | 399 | * Make an area consistent for devices. |
538 | * Note: Drivers should NOT use this function directly, as it will break | 400 | * Note: Drivers should NOT use this function directly, as it will break |
539 | * platforms with CONFIG_DMABOUNCE. | 401 | * platforms with CONFIG_DMABOUNCE. |
540 | * Use the driver DMA support - see dma-mapping.h (dma_sync_*) | 402 | * Use the driver DMA support - see dma-mapping.h (dma_sync_*) |
541 | */ | 403 | */ |
542 | void dma_cache_maint(const void *start, size_t size, int direction) | 404 | void ___dma_single_cpu_to_dev(const void *kaddr, size_t size, |
405 | enum dma_data_direction dir) | ||
543 | { | 406 | { |
544 | void (*inner_op)(const void *, const void *); | 407 | unsigned long paddr; |
545 | void (*outer_op)(unsigned long, unsigned long); | 408 | |
546 | 409 | BUG_ON(!virt_addr_valid(kaddr) || !virt_addr_valid(kaddr + size - 1)); | |
547 | BUG_ON(!virt_addr_valid(start) || !virt_addr_valid(start + size - 1)); | 410 | |
548 | 411 | dmac_map_area(kaddr, size, dir); | |
549 | switch (direction) { | ||
550 | case DMA_FROM_DEVICE: /* invalidate only */ | ||
551 | inner_op = dmac_inv_range; | ||
552 | outer_op = outer_inv_range; | ||
553 | break; | ||
554 | case DMA_TO_DEVICE: /* writeback only */ | ||
555 | inner_op = dmac_clean_range; | ||
556 | outer_op = outer_clean_range; | ||
557 | break; | ||
558 | case DMA_BIDIRECTIONAL: /* writeback and invalidate */ | ||
559 | inner_op = dmac_flush_range; | ||
560 | outer_op = outer_flush_range; | ||
561 | break; | ||
562 | default: | ||
563 | BUG(); | ||
564 | } | ||
565 | 412 | ||
566 | inner_op(start, start + size); | 413 | paddr = __pa(kaddr); |
567 | outer_op(__pa(start), __pa(start) + size); | 414 | if (dir == DMA_FROM_DEVICE) { |
415 | outer_inv_range(paddr, paddr + size); | ||
416 | } else { | ||
417 | outer_clean_range(paddr, paddr + size); | ||
418 | } | ||
419 | /* FIXME: non-speculating: flush on bidirectional mappings? */ | ||
568 | } | 420 | } |
569 | EXPORT_SYMBOL(dma_cache_maint); | 421 | EXPORT_SYMBOL(___dma_single_cpu_to_dev); |
570 | 422 | ||
571 | static void dma_cache_maint_contiguous(struct page *page, unsigned long offset, | 423 | void ___dma_single_dev_to_cpu(const void *kaddr, size_t size, |
572 | size_t size, int direction) | 424 | enum dma_data_direction dir) |
573 | { | 425 | { |
574 | void *vaddr; | 426 | BUG_ON(!virt_addr_valid(kaddr) || !virt_addr_valid(kaddr + size - 1)); |
575 | unsigned long paddr; | ||
576 | void (*inner_op)(const void *, const void *); | ||
577 | void (*outer_op)(unsigned long, unsigned long); | ||
578 | |||
579 | switch (direction) { | ||
580 | case DMA_FROM_DEVICE: /* invalidate only */ | ||
581 | inner_op = dmac_inv_range; | ||
582 | outer_op = outer_inv_range; | ||
583 | break; | ||
584 | case DMA_TO_DEVICE: /* writeback only */ | ||
585 | inner_op = dmac_clean_range; | ||
586 | outer_op = outer_clean_range; | ||
587 | break; | ||
588 | case DMA_BIDIRECTIONAL: /* writeback and invalidate */ | ||
589 | inner_op = dmac_flush_range; | ||
590 | outer_op = outer_flush_range; | ||
591 | break; | ||
592 | default: | ||
593 | BUG(); | ||
594 | } | ||
595 | 427 | ||
596 | if (!PageHighMem(page)) { | 428 | /* FIXME: non-speculating: not required */ |
597 | vaddr = page_address(page) + offset; | 429 | /* don't bother invalidating if DMA to device */ |
598 | inner_op(vaddr, vaddr + size); | 430 | if (dir != DMA_TO_DEVICE) { |
599 | } else { | 431 | unsigned long paddr = __pa(kaddr); |
600 | vaddr = kmap_high_get(page); | 432 | outer_inv_range(paddr, paddr + size); |
601 | if (vaddr) { | ||
602 | vaddr += offset; | ||
603 | inner_op(vaddr, vaddr + size); | ||
604 | kunmap_high(page); | ||
605 | } | ||
606 | } | 433 | } |
607 | 434 | ||
608 | paddr = page_to_phys(page) + offset; | 435 | dmac_unmap_area(kaddr, size, dir); |
609 | outer_op(paddr, paddr + size); | ||
610 | } | 436 | } |
437 | EXPORT_SYMBOL(___dma_single_dev_to_cpu); | ||
611 | 438 | ||
612 | void dma_cache_maint_page(struct page *page, unsigned long offset, | 439 | static void dma_cache_maint_page(struct page *page, unsigned long offset, |
613 | size_t size, int dir) | 440 | size_t size, enum dma_data_direction dir, |
441 | void (*op)(const void *, size_t, int)) | ||
614 | { | 442 | { |
615 | /* | 443 | /* |
616 | * A single sg entry may refer to multiple physically contiguous | 444 | * A single sg entry may refer to multiple physically contiguous |
@@ -621,20 +449,67 @@ void dma_cache_maint_page(struct page *page, unsigned long offset, | |||
621 | size_t left = size; | 449 | size_t left = size; |
622 | do { | 450 | do { |
623 | size_t len = left; | 451 | size_t len = left; |
624 | if (PageHighMem(page) && len + offset > PAGE_SIZE) { | 452 | void *vaddr; |
625 | if (offset >= PAGE_SIZE) { | 453 | |
626 | page += offset / PAGE_SIZE; | 454 | if (PageHighMem(page)) { |
627 | offset %= PAGE_SIZE; | 455 | if (len + offset > PAGE_SIZE) { |
456 | if (offset >= PAGE_SIZE) { | ||
457 | page += offset / PAGE_SIZE; | ||
458 | offset %= PAGE_SIZE; | ||
459 | } | ||
460 | len = PAGE_SIZE - offset; | ||
461 | } | ||
462 | vaddr = kmap_high_get(page); | ||
463 | if (vaddr) { | ||
464 | vaddr += offset; | ||
465 | op(vaddr, len, dir); | ||
466 | kunmap_high(page); | ||
467 | } else if (cache_is_vipt()) { | ||
468 | pte_t saved_pte; | ||
469 | vaddr = kmap_high_l1_vipt(page, &saved_pte); | ||
470 | op(vaddr + offset, len, dir); | ||
471 | kunmap_high_l1_vipt(page, saved_pte); | ||
628 | } | 472 | } |
629 | len = PAGE_SIZE - offset; | 473 | } else { |
474 | vaddr = page_address(page) + offset; | ||
475 | op(vaddr, len, dir); | ||
630 | } | 476 | } |
631 | dma_cache_maint_contiguous(page, offset, len, dir); | ||
632 | offset = 0; | 477 | offset = 0; |
633 | page++; | 478 | page++; |
634 | left -= len; | 479 | left -= len; |
635 | } while (left); | 480 | } while (left); |
636 | } | 481 | } |
637 | EXPORT_SYMBOL(dma_cache_maint_page); | 482 | |
483 | void ___dma_page_cpu_to_dev(struct page *page, unsigned long off, | ||
484 | size_t size, enum dma_data_direction dir) | ||
485 | { | ||
486 | unsigned long paddr; | ||
487 | |||
488 | dma_cache_maint_page(page, off, size, dir, dmac_map_area); | ||
489 | |||
490 | paddr = page_to_phys(page) + off; | ||
491 | if (dir == DMA_FROM_DEVICE) { | ||
492 | outer_inv_range(paddr, paddr + size); | ||
493 | } else { | ||
494 | outer_clean_range(paddr, paddr + size); | ||
495 | } | ||
496 | /* FIXME: non-speculating: flush on bidirectional mappings? */ | ||
497 | } | ||
498 | EXPORT_SYMBOL(___dma_page_cpu_to_dev); | ||
499 | |||
500 | void ___dma_page_dev_to_cpu(struct page *page, unsigned long off, | ||
501 | size_t size, enum dma_data_direction dir) | ||
502 | { | ||
503 | unsigned long paddr = page_to_phys(page) + off; | ||
504 | |||
505 | /* FIXME: non-speculating: not required */ | ||
506 | /* don't bother invalidating if DMA to device */ | ||
507 | if (dir != DMA_TO_DEVICE) | ||
508 | outer_inv_range(paddr, paddr + size); | ||
509 | |||
510 | dma_cache_maint_page(page, off, size, dir, dmac_unmap_area); | ||
511 | } | ||
512 | EXPORT_SYMBOL(___dma_page_dev_to_cpu); | ||
638 | 513 | ||
639 | /** | 514 | /** |
640 | * dma_map_sg - map a set of SG buffers for streaming mode DMA | 515 | * dma_map_sg - map a set of SG buffers for streaming mode DMA |
@@ -708,8 +583,12 @@ void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, | |||
708 | int i; | 583 | int i; |
709 | 584 | ||
710 | for_each_sg(sg, s, nents, i) { | 585 | for_each_sg(sg, s, nents, i) { |
711 | dmabounce_sync_for_cpu(dev, sg_dma_address(s), 0, | 586 | if (!dmabounce_sync_for_cpu(dev, sg_dma_address(s), 0, |
712 | sg_dma_len(s), dir); | 587 | sg_dma_len(s), dir)) |
588 | continue; | ||
589 | |||
590 | __dma_page_dev_to_cpu(sg_page(s), s->offset, | ||
591 | s->length, dir); | ||
713 | } | 592 | } |
714 | } | 593 | } |
715 | EXPORT_SYMBOL(dma_sync_sg_for_cpu); | 594 | EXPORT_SYMBOL(dma_sync_sg_for_cpu); |
@@ -732,9 +611,8 @@ void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, | |||
732 | sg_dma_len(s), dir)) | 611 | sg_dma_len(s), dir)) |
733 | continue; | 612 | continue; |
734 | 613 | ||
735 | if (!arch_is_coherent()) | 614 | __dma_page_cpu_to_dev(sg_page(s), s->offset, |
736 | dma_cache_maint_page(sg_page(s), s->offset, | 615 | s->length, dir); |
737 | s->length, dir); | ||
738 | } | 616 | } |
739 | } | 617 | } |
740 | EXPORT_SYMBOL(dma_sync_sg_for_device); | 618 | EXPORT_SYMBOL(dma_sync_sg_for_device); |