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-rw-r--r--arch/arm/mm/cache-v7.S10
1 files changed, 4 insertions, 6 deletions
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index a655d3da386d..39e3fb3db801 100644
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -13,6 +13,7 @@
13#include <linux/linkage.h> 13#include <linux/linkage.h>
14#include <linux/init.h> 14#include <linux/init.h>
15#include <asm/assembler.h> 15#include <asm/assembler.h>
16#include <asm/errno.h>
16#include <asm/unwind.h> 17#include <asm/unwind.h>
17 18
18#include "proc-macros.S" 19#include "proc-macros.S"
@@ -198,7 +199,6 @@ ENTRY(v7_coherent_user_range)
198 add r12, r12, r2 199 add r12, r12, r2
199 cmp r12, r1 200 cmp r12, r1
200 blo 2b 201 blo 2b
2013:
202 mov r0, #0 202 mov r0, #0
203 ALT_SMP(mcr p15, 0, r0, c7, c1, 6) @ invalidate BTB Inner Shareable 203 ALT_SMP(mcr p15, 0, r0, c7, c1, 6) @ invalidate BTB Inner Shareable
204 ALT_UP(mcr p15, 0, r0, c7, c5, 6) @ invalidate BTB 204 ALT_UP(mcr p15, 0, r0, c7, c5, 6) @ invalidate BTB
@@ -208,13 +208,11 @@ ENTRY(v7_coherent_user_range)
208 208
209/* 209/*
210 * Fault handling for the cache operation above. If the virtual address in r0 210 * Fault handling for the cache operation above. If the virtual address in r0
211 * isn't mapped, just try the next page. 211 * isn't mapped, fail with -EFAULT.
212 */ 212 */
2139001: 2139001:
214 mov r12, r12, lsr #12 214 mov r0, #-EFAULT
215 mov r12, r12, lsl #12 215 mov pc, lr
216 add r12, r12, #4096
217 b 3b
218 UNWIND(.fnend ) 216 UNWIND(.fnend )
219ENDPROC(v7_coherent_kern_range) 217ENDPROC(v7_coherent_kern_range)
220ENDPROC(v7_coherent_user_range) 218ENDPROC(v7_coherent_user_range)