1 files changed, 41 insertions, 10 deletions

diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index e1bd9759617f..06a90dcfc60a 100644
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -167,7 +167,11 @@ ENTRY(v7_coherent_user_range)
         cmp     r0, r1
         blo     1b
         mov     r0, #0
+#ifdef CONFIG_SMP
+        mcr     p15, 0, r0, c7, c1, 6           @ invalidate BTB Inner Shareable
+#else
         mcr     p15, 0, r0, c7, c5, 6           @ invalidate BTB
+#endif
         dsb
         isb
         mov     pc, lr
@@ -186,16 +190,17 @@ ENDPROC(v7_coherent_kern_range)
 ENDPROC(v7_coherent_user_range)
 
 /*
- *      v7_flush_kern_dcache_page(kaddr)
+ *      v7_flush_kern_dcache_area(void *addr, size_t size)
  *
  *      Ensure that the data held in the page kaddr is written back
  *      to the page in question.
  *
- *      - kaddr   - kernel address (guaranteed to be page aligned)
+ *      - addr  - kernel address
+ *      - size  - region size
  */
-ENTRY(v7_flush_kern_dcache_page)
+ENTRY(v7_flush_kern_dcache_area)
         dcache_line_size r2, r3
-        add     r1, r0, #PAGE_SZ
+        add     r1, r0, r1
 1:
         mcr     p15, 0, r0, c7, c14, 1          @ clean & invalidate D line / unified line
         add     r0, r0, r2
@@ -203,7 +208,7 @@ ENTRY(v7_flush_kern_dcache_page)
         blo     1b
         dsb
         mov     pc, lr
-ENDPROC(v7_flush_kern_dcache_page)
+ENDPROC(v7_flush_kern_dcache_area)
 
 /*
  *      v7_dma_inv_range(start,end)
@@ -215,7 +220,7 @@ ENDPROC(v7_flush_kern_dcache_page)
  *      - start   - virtual start address of region
  *      - end     - virtual end address of region
  */
-ENTRY(v7_dma_inv_range)
+v7_dma_inv_range:
         dcache_line_size r2, r3
         sub     r3, r2, #1
         tst     r0, r3
@@ -239,7 +244,7 @@ ENDPROC(v7_dma_inv_range)
  *      - start   - virtual start address of region
  *      - end     - virtual end address of region
  */
-ENTRY(v7_dma_clean_range)
+v7_dma_clean_range:
         dcache_line_size r2, r3
         sub     r3, r2, #1
         bic     r0, r0, r3
@@ -270,6 +275,32 @@ ENTRY(v7_dma_flush_range)
         mov     pc, lr
 ENDPROC(v7_dma_flush_range)
 
+/*
+ *      dma_map_area(start, size, dir)
+ *      - start - kernel virtual start address
+ *      - size  - size of region
+ *      - dir   - DMA direction
+ */
+ENTRY(v7_dma_map_area)
+        add     r1, r1, r0
+        teq     r2, #DMA_FROM_DEVICE
+        beq     v7_dma_inv_range
+        b       v7_dma_clean_range
+ENDPROC(v7_dma_map_area)
+
+/*
+ *      dma_unmap_area(start, size, dir)
+ *      - start - kernel virtual start address
+ *      - size  - size of region
+ *      - dir   - DMA direction
+ */
+ENTRY(v7_dma_unmap_area)
+        add     r1, r1, r0
+        teq     r2, #DMA_TO_DEVICE
+        bne     v7_dma_inv_range
+        mov     pc, lr
+ENDPROC(v7_dma_unmap_area)
+
         __INITDATA
 
         .type   v7_cache_fns, #object
@@ -279,8 +310,8 @@ ENTRY(v7_cache_fns)
         .long   v7_flush_user_cache_range
         .long   v7_coherent_kern_range
         .long   v7_coherent_user_range
-        .long   v7_flush_kern_dcache_page
-        .long   v7_dma_inv_range
-        .long   v7_dma_clean_range
+        .long   v7_flush_kern_dcache_area
+        .long   v7_dma_map_area
+        .long   v7_dma_unmap_area
         .long   v7_dma_flush_range
         .size   v7_cache_fns, . - v7_cache_fns