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-rw-r--r--arch/arm/mach-zynq/include/mach/debug-macro.S36
-rw-r--r--arch/arm/mach-zynq/include/mach/hardware.h18
-rw-r--r--arch/arm/mach-zynq/include/mach/irqs.h21
-rw-r--r--arch/arm/mach-zynq/include/mach/timex.h23
-rw-r--r--arch/arm/mach-zynq/include/mach/uart.h25
-rw-r--r--arch/arm/mach-zynq/include/mach/uncompress.h51
-rw-r--r--arch/arm/mach-zynq/include/mach/zynq_soc.h53
7 files changed, 0 insertions, 227 deletions
diff --git a/arch/arm/mach-zynq/include/mach/debug-macro.S b/arch/arm/mach-zynq/include/mach/debug-macro.S
deleted file mode 100644
index 3ab0be1f6191..000000000000
--- a/arch/arm/mach-zynq/include/mach/debug-macro.S
+++ /dev/null
@@ -1,36 +0,0 @@
1/* arch/arm/mach-zynq/include/mach/debug-macro.S
2 *
3 * Debugging macro include header
4 *
5 * Copyright (C) 2011 Xilinx
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#include <mach/zynq_soc.h>
18#include <mach/uart.h>
19
20 .macro addruart, rp, rv, tmp
21 ldr \rp, =LL_UART_PADDR @ physical
22 ldr \rv, =LL_UART_VADDR @ virtual
23 .endm
24
25 .macro senduart,rd,rx
26 str \rd, [\rx, #UART_FIFO_OFFSET] @ TXDATA
27 .endm
28
29 .macro waituart,rd,rx
30 .endm
31
32 .macro busyuart,rd,rx
331002: ldr \rd, [\rx, #UART_SR_OFFSET] @ get status register
34 tst \rd, #UART_SR_TXFULL @
35 bne 1002b @ wait if FIFO is full
36 .endm
diff --git a/arch/arm/mach-zynq/include/mach/hardware.h b/arch/arm/mach-zynq/include/mach/hardware.h
deleted file mode 100644
index d558d8a94be7..000000000000
--- a/arch/arm/mach-zynq/include/mach/hardware.h
+++ /dev/null
@@ -1,18 +0,0 @@
1/* arch/arm/mach-zynq/include/mach/hardware.h
2 *
3 * Copyright (C) 2011 Xilinx
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15#ifndef __MACH_HARDWARE_H__
16#define __MACH_HARDWARE_H__
17
18#endif
diff --git a/arch/arm/mach-zynq/include/mach/irqs.h b/arch/arm/mach-zynq/include/mach/irqs.h
deleted file mode 100644
index 5fb04fd3bac8..000000000000
--- a/arch/arm/mach-zynq/include/mach/irqs.h
+++ /dev/null
@@ -1,21 +0,0 @@
1/* arch/arm/mach-zynq/include/mach/irqs.h
2 *
3 * Copyright (C) 2011 Xilinx
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15#ifndef __MACH_IRQS_H
16#define __MACH_IRQS_H
17
18#define ARCH_NR_GPIOS 118
19#define NR_IRQS (128 + ARCH_NR_GPIOS)
20
21#endif
diff --git a/arch/arm/mach-zynq/include/mach/timex.h b/arch/arm/mach-zynq/include/mach/timex.h
deleted file mode 100644
index 6c0245e42a5e..000000000000
--- a/arch/arm/mach-zynq/include/mach/timex.h
+++ /dev/null
@@ -1,23 +0,0 @@
1/* arch/arm/mach-zynq/include/mach/timex.h
2 *
3 * Copyright (C) 2011 Xilinx
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15#ifndef __MACH_TIMEX_H__
16#define __MACH_TIMEX_H__
17
18/* the following is needed for the system to build but will be removed
19 in the future, the value is not important but won't hurt
20*/
21#define CLOCK_TICK_RATE (100 * HZ)
22
23#endif
diff --git a/arch/arm/mach-zynq/include/mach/uart.h b/arch/arm/mach-zynq/include/mach/uart.h
deleted file mode 100644
index 5c47c97156f3..000000000000
--- a/arch/arm/mach-zynq/include/mach/uart.h
+++ /dev/null
@@ -1,25 +0,0 @@
1/* arch/arm/mach-zynq/include/mach/uart.h
2 *
3 * Copyright (C) 2011 Xilinx
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15#ifndef __MACH_UART_H__
16#define __MACH_UART_H__
17
18#define UART_CR_OFFSET 0x00 /* Control Register [8:0] */
19#define UART_SR_OFFSET 0x2C /* Channel Status [11:0] */
20#define UART_FIFO_OFFSET 0x30 /* FIFO [15:0] or [7:0] */
21
22#define UART_SR_TXFULL 0x00000010 /* TX FIFO full */
23#define UART_SR_TXEMPTY 0x00000008 /* TX FIFO empty */
24
25#endif
diff --git a/arch/arm/mach-zynq/include/mach/uncompress.h b/arch/arm/mach-zynq/include/mach/uncompress.h
deleted file mode 100644
index af4e8447bfa3..000000000000
--- a/arch/arm/mach-zynq/include/mach/uncompress.h
+++ /dev/null
@@ -1,51 +0,0 @@
1/* arch/arm/mach-zynq/include/mach/uncompress.h
2 *
3 * Copyright (C) 2011 Xilinx
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15#ifndef __MACH_UNCOMPRESS_H__
16#define __MACH_UNCOMPRESS_H__
17
18#include <linux/io.h>
19#include <asm/processor.h>
20#include <mach/zynq_soc.h>
21#include <mach/uart.h>
22
23void arch_decomp_setup(void)
24{
25}
26
27static inline void flush(void)
28{
29 /*
30 * Wait while the FIFO is not empty
31 */
32 while (!(__raw_readl(IOMEM(LL_UART_PADDR + UART_SR_OFFSET)) &
33 UART_SR_TXEMPTY))
34 cpu_relax();
35}
36
37#define arch_decomp_wdog()
38
39static void putc(char ch)
40{
41 /*
42 * Wait for room in the FIFO, then write the char into the FIFO
43 */
44 while (__raw_readl(IOMEM(LL_UART_PADDR + UART_SR_OFFSET)) &
45 UART_SR_TXFULL)
46 cpu_relax();
47
48 __raw_writel(ch, IOMEM(LL_UART_PADDR + UART_FIFO_OFFSET));
49}
50
51#endif
diff --git a/arch/arm/mach-zynq/include/mach/zynq_soc.h b/arch/arm/mach-zynq/include/mach/zynq_soc.h
deleted file mode 100644
index 5ebbd8e6eeee..000000000000
--- a/arch/arm/mach-zynq/include/mach/zynq_soc.h
+++ /dev/null
@@ -1,53 +0,0 @@
1/* arch/arm/mach-zynq/include/mach/zynq_soc.h
2 *
3 * Copyright (C) 2011 Xilinx
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15#ifndef __MACH_XILINX_SOC_H__
16#define __MACH_XILINX_SOC_H__
17
18#include <asm/pgtable.h>
19
20#define PERIPHERAL_CLOCK_RATE 2500000
21
22/* Static peripheral mappings are mapped at the top of the vmalloc region. The
23 * early uart mapping causes intermediate problems/failure at certain
24 * addresses, including the very top of the vmalloc region. Map it at an
25 * address that is known to work.
26 */
27#define UART0_PHYS 0xE0000000
28#define UART1_PHYS 0xE0001000
29#define UART_SIZE SZ_4K
30#define UART_VIRT 0xF0001000
31
32#define TTC0_PHYS 0xF8001000
33#define TTC0_SIZE SZ_4K
34#define TTC0_VIRT (VMALLOC_END - TTC0_SIZE)
35
36#define SCU_PERIPH_PHYS 0xF8F00000
37#define SCU_PERIPH_SIZE SZ_8K
38#define SCU_PERIPH_VIRT (TTC0_VIRT - SCU_PERIPH_SIZE)
39
40#if IS_ENABLED(CONFIG_DEBUG_ZYNQ_UART1)
41# define LL_UART_PADDR UART1_PHYS
42#else
43# define LL_UART_PADDR UART0_PHYS
44#endif
45
46#define LL_UART_VADDR UART_VIRT
47
48/* The following are intended for the devices that are mapped early */
49
50#define TTC0_BASE IOMEM(TTC0_VIRT)
51#define SCU_PERIPH_BASE IOMEM(SCU_PERIPH_VIRT)
52
53#endif