14 files changed, 557 insertions, 40 deletions

diff --git a/arch/arm/mach-w90x900/clock.c b/arch/arm/mach-w90x900/clock.c
index b785994bab0a..2c371ff22e51 100644
--- a/arch/arm/mach-w90x900/clock.c
+++ b/arch/arm/mach-w90x900/clock.c
@@ -90,12 +90,3 @@ void nuc900_subclk_enable(struct clk *clk, int enable)
 
         __raw_writel(clken, W90X900_VA_CLKPWR + SUBCLK);
 }
-
-
-void clks_register(struct clk_lookup *clks, size_t num)
-{
-        int i;
-
-        for (i = 0; i < num; i++)
-                clkdev_add(&clks[i]);
-}
diff --git a/arch/arm/mach-w90x900/clock.h b/arch/arm/mach-w90x900/clock.h
index f5816a06eed6..c56ddab3d912 100644
--- a/arch/arm/mach-w90x900/clock.h
+++ b/arch/arm/mach-w90x900/clock.h
@@ -14,7 +14,6 @@
 
 void nuc900_clk_enable(struct clk *clk, int enable);
 void nuc900_subclk_enable(struct clk *clk, int enable);
-void clks_register(struct clk_lookup *clks, size_t num);
 
 struct clk {
         unsigned long           cken;
diff --git a/arch/arm/mach-w90x900/cpu.c b/arch/arm/mach-w90x900/cpu.c
index 921cef991bf0..642207e18198 100644
--- a/arch/arm/mach-w90x900/cpu.c
+++ b/arch/arm/mach-w90x900/cpu.c
@@ -45,6 +45,7 @@ static struct map_desc nuc900_iodesc[] __initdata = {
         IODESC_ENT(UART),
         IODESC_ENT(TIMER),
         IODESC_ENT(EBI),
+        IODESC_ENT(GPIO),
 };
 
 /* Initial clock declarations. */
@@ -68,6 +69,11 @@ static DEFINE_CLK(gdma, 27);
 static DEFINE_CLK(adc, 28);
 static DEFINE_CLK(usi, 29);
 static DEFINE_CLK(ext, 0);
+static DEFINE_CLK(timer0, 19);
+static DEFINE_CLK(timer1, 20);
+static DEFINE_CLK(timer2, 21);
+static DEFINE_CLK(timer3, 22);
+static DEFINE_CLK(timer4, 23);
 
 static struct clk_lookup nuc900_clkregs[] = {
         DEF_CLKLOOK(&clk_lcd, "nuc900-lcd", NULL),
@@ -90,12 +96,18 @@ static struct clk_lookup nuc900_clkregs[] = {
         DEF_CLKLOOK(&clk_adc, "nuc900-adc", NULL),
         DEF_CLKLOOK(&clk_usi, "nuc900-spi", NULL),
         DEF_CLKLOOK(&clk_ext, NULL, "ext"),
+        DEF_CLKLOOK(&clk_timer0, NULL, "timer0"),
+        DEF_CLKLOOK(&clk_timer1, NULL, "timer1"),
+        DEF_CLKLOOK(&clk_timer2, NULL, "timer2"),
+        DEF_CLKLOOK(&clk_timer3, NULL, "timer3"),
+        DEF_CLKLOOK(&clk_timer4, NULL, "timer4"),
 };
 
 /* Initial serial platform data */
 
 struct plat_serial8250_port nuc900_uart_data[] = {
         NUC900_8250PORT(UART0),
+        {},
 };
 
 struct platform_device nuc900_serial_device = {
@@ -207,6 +219,6 @@ void __init nuc900_map_io(struct map_desc *mach_desc, int mach_size)
 
 void __init nuc900_init_clocks(void)
 {
-        clks_register(nuc900_clkregs, ARRAY_SIZE(nuc900_clkregs));
+        clkdev_add_table(nuc900_clkregs, ARRAY_SIZE(nuc900_clkregs));
 }
 
diff --git a/arch/arm/mach-w90x900/cpu.h b/arch/arm/mach-w90x900/cpu.h
index 4d58ba164e25..f8730b60bd76 100644
--- a/arch/arm/mach-w90x900/cpu.h
+++ b/arch/arm/mach-w90x900/cpu.h
@@ -57,3 +57,4 @@ extern struct platform_device nuc900_device_fmi;
 extern struct platform_device nuc900_device_kpi;
 extern struct platform_device nuc900_device_rtc;
 extern struct platform_device nuc900_device_ts;
+extern struct platform_device nuc900_device_lcd;
diff --git a/arch/arm/mach-w90x900/dev.c b/arch/arm/mach-w90x900/dev.c
index 2a6f98de48d2..e2958eb567f9 100644
--- a/arch/arm/mach-w90x900/dev.c
+++ b/arch/arm/mach-w90x900/dev.c
@@ -18,6 +18,7 @@
 #include <linux/timer.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
+#include <linux/slab.h>
 
 #include <linux/mtd/physmap.h>
 #include <linux/mtd/mtd.h>
@@ -32,7 +33,9 @@
 #include <asm/mach-types.h>
 
 #include <mach/regs-serial.h>
+#include <mach/nuc900_spi.h>
 #include <mach/map.h>
+#include <mach/fb.h>
 
 #include "cpu.h"
 
@@ -196,6 +199,18 @@ static struct platform_device nuc900_device_emc = {
 
 /* SPI device */
 
+static struct nuc900_spi_info nuc900_spiflash_data = {
+        .num_cs         = 1,
+        .lsb            = 0,
+        .txneg          = 1,
+        .rxneg          = 0,
+        .divider        = 24,
+        .sleep          = 0,
+        .txnum          = 0,
+        .txbitlen       = 1,
+        .bus_num        = 0,
+};
+
 static struct resource nuc900_spi_resource[] = {
         [0] = {
                 .start = W90X900_PA_I2C + SPIOFFSET,
@@ -214,6 +229,9 @@ static struct platform_device nuc900_device_spi = {
         .id             = -1,
         .num_resources  = ARRAY_SIZE(nuc900_spi_resource),
         .resource       = nuc900_spi_resource,
+        .dev            = {
+                                .platform_data = &nuc900_spiflash_data,
+                        }
 };
 
 /* spi device, spi flash info */
@@ -364,6 +382,47 @@ struct platform_device nuc900_device_kpi = {
         .resource       = nuc900_kpi_resource,
 };
 
+#ifdef CONFIG_FB_NUC900
+
+static struct resource nuc900_lcd_resource[] = {
+        [0] = {
+                .start = W90X900_PA_LCD,
+                .end   = W90X900_PA_LCD + W90X900_SZ_LCD - 1,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = IRQ_LCD,
+                .end   = IRQ_LCD,
+                .flags = IORESOURCE_IRQ,
+        }
+};
+
+static u64 nuc900_device_lcd_dmamask = -1;
+struct platform_device nuc900_device_lcd = {
+        .name             = "nuc900-lcd",
+        .id               = -1,
+        .num_resources    = ARRAY_SIZE(nuc900_lcd_resource),
+        .resource         = nuc900_lcd_resource,
+        .dev              = {
+                .dma_mask               = &nuc900_device_lcd_dmamask,
+                .coherent_dma_mask      = -1,
+        }
+};
+
+void  nuc900_fb_set_platdata(struct nuc900fb_mach_info *pd)
+{
+        struct nuc900fb_mach_info *npd;
+
+        npd = kmalloc(sizeof(*npd), GFP_KERNEL);
+        if (npd) {
+                memcpy(npd, pd, sizeof(*npd));
+                nuc900_device_lcd.dev.platform_data = npd;
+        } else {
+                printk(KERN_ERR "no memory for LCD platform data\n");
+        }
+}
+#endif
+
 /*Here should be your evb resourse,such as LCD*/
 
 static struct platform_device *nuc900_public_dev[] __initdata = {
diff --git a/arch/arm/mach-w90x900/include/mach/fb.h b/arch/arm/mach-w90x900/include/mach/fb.h
new file mode 100644
index 000000000000..cec5ece765ed
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/fb.h
@@ -0,0 +1,83 @@
+/* linux/include/asm/arch-nuc900/fb.h
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * Changelog:
+ *
+ *   2008/08/26     vincen.zswan modify this file for LCD.
+ */
+
+#ifndef __ASM_ARM_FB_H
+#define __ASM_ARM_FB_H
+
+
+
+/* LCD Controller Hardware Desc */
+struct nuc900fb_hw {
+        unsigned int lcd_dccs;
+        unsigned int lcd_device_ctrl;
+        unsigned int lcd_mpulcd_cmd;
+        unsigned int lcd_int_cs;
+        unsigned int lcd_crtc_size;
+        unsigned int lcd_crtc_dend;
+        unsigned int lcd_crtc_hr;
+        unsigned int lcd_crtc_hsync;
+        unsigned int lcd_crtc_vr;
+        unsigned int lcd_va_baddr0;
+        unsigned int lcd_va_baddr1;
+        unsigned int lcd_va_fbctrl;
+        unsigned int lcd_va_scale;
+        unsigned int lcd_va_test;
+        unsigned int lcd_va_win;
+        unsigned int lcd_va_stuff;
+};
+
+/* LCD Display Description */
+struct nuc900fb_display {
+        /* LCD Image type */
+        unsigned type;
+
+        /* LCD Screen Size */
+        unsigned short width;
+        unsigned short height;
+
+        /* LCD Screen Info */
+        unsigned short xres;
+        unsigned short yres;
+        unsigned short bpp;
+
+        unsigned long pixclock;
+        unsigned short left_margin;
+        unsigned short right_margin;
+        unsigned short hsync_len;
+        unsigned short upper_margin;
+        unsigned short lower_margin;
+        unsigned short vsync_len;
+
+        /* hardware special register value */
+        unsigned int dccs;
+        unsigned int devctl;
+        unsigned int fbctrl;
+        unsigned int scale;
+};
+
+struct nuc900fb_mach_info {
+        struct nuc900fb_display *displays;
+        unsigned num_displays;
+        unsigned default_display;
+        /* GPIO Setting  Info */
+        unsigned gpio_dir;
+        unsigned gpio_dir_mask;
+        unsigned gpio_data;
+        unsigned gpio_data_mask;
+};
+
+extern void __init nuc900_fb_set_platdata(struct nuc900fb_mach_info *);
+
+#endif /* __ASM_ARM_FB_H */
diff --git a/arch/arm/mach-w90x900/include/mach/nuc900_spi.h b/arch/arm/mach-w90x900/include/mach/nuc900_spi.h
new file mode 100644
index 000000000000..bd94819e314f
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/nuc900_spi.h
@@ -0,0 +1,35 @@
+/*
+ * arch/arm/mach-w90x900/include/mach/nuc900_spi.h
+ *
+ * Copyright (c) 2009 Nuvoton technology corporation.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation;version 2 of the License.
+ *
+ */
+
+#ifndef __ASM_ARCH_SPI_H
+#define __ASM_ARCH_SPI_H
+
+extern void mfp_set_groupg(struct device *dev);
+
+struct nuc900_spi_info {
+        unsigned int num_cs;
+        unsigned int lsb;
+        unsigned int txneg;
+        unsigned int rxneg;
+        unsigned int divider;
+        unsigned int sleep;
+        unsigned int txnum;
+        unsigned int txbitlen;
+        int bus_num;
+};
+
+struct nuc900_spi_chip {
+        unsigned char bits_per_word;
+};
+
+#endif /* __ASM_ARCH_SPI_H */
diff --git a/arch/arm/mach-w90x900/include/mach/regs-ldm.h b/arch/arm/mach-w90x900/include/mach/regs-ldm.h
new file mode 100644
index 000000000000..e9d480a5b232
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/regs-ldm.h
@@ -0,0 +1,253 @@
+/*
+ * arch/arm/mach-w90x900/include/mach/regs-serial.h
+ *
+ * Copyright (c) 2009 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ *  Description:
+ *     Nuvoton Display, LCM Register list
+ *  Author:  Wang Qiang (rurality.linux@gmail.com) 2009/12/11
+ *
+ */
+
+
+#ifndef __ASM_ARM_W90X900_REGS_LDM_H
+#define __ASM_ARM_W90X900_REGS_LDM_H
+
+#include <mach/map.h>
+
+/* Display Controller Control/Status Register */
+#define REG_LCM_DCCS                    (0x00)
+
+#define LCM_DCCS_ENG_RST                (1 << 0)
+#define LCM_DCCS_VA_EN                  (1 << 1)
+#define LCM_DCCS_OSD_EN                 (1 << 2)
+#define LCM_DCCS_DISP_OUT_EN            (1 << 3)
+#define LCM_DCCS_DISP_INT_EN            (1 << 4)
+#define LCM_DCCS_CMD_ON                 (1 << 5)
+#define LCM_DCCS_FIELD_INTR             (1 << 6)
+#define LCM_DCCS_SINGLE                 (1 << 7)
+
+enum LCM_DCCS_VA_SRC {
+        LCM_DCCS_VA_SRC_YUV422          = (0 << 8),
+        LCM_DCCS_VA_SRC_YCBCR422        = (1 << 8),
+        LCM_DCCS_VA_SRC_RGB888          = (2 << 8),
+        LCM_DCCS_VA_SRC_RGB666          = (3 << 8),
+        LCM_DCCS_VA_SRC_RGB565          = (4 << 8),
+        LCM_DCCS_VA_SRC_RGB444LOW       = (5 << 8),
+        LCM_DCCS_VA_SRC_RGB444HIGH      = (7 << 8)
+};
+
+
+/* Display Device Control Register */
+#define REG_LCM_DEV_CTRL                (0x04)
+
+enum LCM_DEV_CTRL_SWAP_YCbCr {
+        LCM_DEV_CTRL_SWAP_UYVY          = (0 << 1),
+        LCM_DEV_CTRL_SWAP_YUYV          = (1 << 1),
+        LCM_DEV_CTRL_SWAP_VYUY          = (2 << 1),
+        LCM_DEV_CTRL_SWAP_YVYU          = (3 << 1)
+};
+
+enum LCM_DEV_CTRL_RGB_SHIFT {
+        LCM_DEV_CTRL_RGB_SHIFT_NOT      = (0 << 3),
+        LCM_DEV_CTRL_RGB_SHIFT_ONECYCLE = (1 << 3),
+        LCM_DEV_CTRL_RGB_SHIFT_TWOCYCLE = (2 << 3),
+        LCM_DEV_CTRL_RGB_SHIFT_NOT_DEF  = (3 << 3)
+};
+
+enum LCM_DEV_CTRL_DEVICE {
+        LCM_DEV_CTRL_DEVICE_YUV422      = (0 << 5),
+        LCM_DEV_CTRL_DEVICE_YUV444      = (1 << 5),
+        LCM_DEV_CTRL_DEVICE_UNIPAC      = (4 << 5),
+        LCM_DEV_CTRL_DEVICE_SEIKO_EPSON = (5 << 5),
+        LCM_DEV_CTRL_DEVICE_HIGH_COLOR  = (6 << 5),
+        LCM_DEV_CTRL_DEVICE_MPU         = (7 << 5)
+};
+
+#define LCM_DEV_CTRL_LCD_DDA            (8)
+#define LCM_DEV_CTRL_YUV2CCIR           (16)
+
+enum LCM_DEV_CTRL_LCD_SEL {
+        LCM_DEV_CTRL_LCD_SEL_RGB_GBR    = (0 << 17),
+        LCM_DEV_CTRL_LCD_SEL_BGR_RBG    = (1 << 17),
+        LCM_DEV_CTRL_LCD_SEL_GBR_RGB    = (2 << 17),
+        LCM_DEV_CTRL_LCD_SEL_RBG_BGR    = (3 << 17)
+};
+
+enum LCM_DEV_CTRL_FAL_D {
+        LCM_DEV_CTRL_FAL_D_FALLING      = (0 << 19),
+        LCM_DEV_CTRL_FAL_D_RISING       = (1 << 19),
+};
+
+enum LCM_DEV_CTRL_H_POL {
+        LCM_DEV_CTRL_H_POL_LOW          = (0 << 20),
+        LCM_DEV_CTRL_H_POL_HIGH         = (1 << 20),
+};
+
+enum LCM_DEV_CTRL_V_POL {
+        LCM_DEV_CTRL_V_POL_LOW          = (0 << 21),
+        LCM_DEV_CTRL_V_POL_HIGH         = (1 << 21),
+};
+
+enum LCM_DEV_CTRL_VR_LACE {
+        LCM_DEV_CTRL_VR_LACE_NINTERLACE = (0 << 22),
+        LCM_DEV_CTRL_VR_LACE_INTERLACE  = (1 << 22),
+};
+
+enum LCM_DEV_CTRL_LACE {
+        LCM_DEV_CTRL_LACE_NINTERLACE    = (0 << 23),
+        LCM_DEV_CTRL_LACE_INTERLACE     = (1 << 23),
+};
+
+enum LCM_DEV_CTRL_RGB_SCALE {
+        LCM_DEV_CTRL_RGB_SCALE_4096     = (0 << 24),
+        LCM_DEV_CTRL_RGB_SCALE_65536    = (1 << 24),
+        LCM_DEV_CTRL_RGB_SCALE_262144   = (2 << 24),
+        LCM_DEV_CTRL_RGB_SCALE_16777216 = (3 << 24),
+};
+
+enum LCM_DEV_CTRL_DBWORD {
+        LCM_DEV_CTRL_DBWORD_HALFWORD    = (0 << 26),
+        LCM_DEV_CTRL_DBWORD_FULLWORD    = (1 << 26),
+};
+
+enum LCM_DEV_CTRL_MPU68 {
+        LCM_DEV_CTRL_MPU68_80_SERIES    = (0 << 27),
+        LCM_DEV_CTRL_MPU68_68_SERIES    = (1 << 27),
+};
+
+enum LCM_DEV_CTRL_DE_POL {
+        LCM_DEV_CTRL_DE_POL_HIGH        = (0 << 28),
+        LCM_DEV_CTRL_DE_POL_LOW         = (1 << 28),
+};
+
+#define LCM_DEV_CTRL_CMD16              (29)
+#define LCM_DEV_CTRL_CM16t18            (30)
+#define LCM_DEV_CTRL_CMD_LOW            (31)
+
+/* MPU-Interface LCD Write Command */
+#define REG_LCM_MPU_CMD                 (0x08)
+
+/* Interrupt Control/Status Register */
+#define REG_LCM_INT_CS                  (0x0c)
+#define LCM_INT_CS_DISP_F_EN            (1 << 0)
+#define LCM_INT_CS_UNDERRUN_EN          (1 << 1)
+#define LCM_INT_CS_BUS_ERROR_INT        (1 << 28)
+#define LCM_INT_CS_UNDERRUN_INT         (1 << 29)
+#define LCM_INT_CS_DISP_F_STATUS        (1 << 30)
+#define LCM_INT_CS_DISP_F_INT           (1 << 31)
+
+/* CRTC Display Size Control Register */
+#define REG_LCM_CRTC_SIZE               (0x10)
+#define LCM_CRTC_SIZE_VTTVAL(x)         ((x) << 16)
+#define LCM_CRTC_SIZE_HTTVAL(x)         ((x) << 0)
+
+/* CRTC Display Enable End */
+#define REG_LCM_CRTC_DEND               (0x14)
+#define LCM_CRTC_DEND_VDENDVAL(x)       ((x) << 16)
+#define LCM_CRTC_DEND_HDENDVAL(x)       ((x) << 0)
+
+/* CRTC Internal Horizontal Retrace Control Register */
+#define REG_LCM_CRTC_HR                 (0x18)
+#define LCM_CRTC_HR_EVAL(x)             ((x) << 16)
+#define LCM_CRTC_HR_SVAL(x)             ((x) << 0)
+
+/* CRTC Horizontal Sync Control Register */
+#define REG_LCM_CRTC_HSYNC              (0x1C)
+#define LCM_CRTC_HSYNC_SHIFTVAL(x)      ((x) << 30)
+#define LCM_CRTC_HSYNC_EVAL(x)          ((x) << 16)
+#define LCM_CRTC_HSYNC_SVAL(x)          ((x) << 0)
+
+/* CRTC Internal Vertical Retrace Control Register */
+#define REG_LCM_CRTC_VR                 (0x20)
+#define LCM_CRTC_VR_EVAL(x)             ((x) << 16)
+#define LCM_CRTC_VR_SVAL(x)             ((x) << 0)
+
+/* Video Stream Frame Buffer-0 Starting Address */
+#define REG_LCM_VA_BADDR0               (0x24)
+
+/* Video Stream Frame Buffer-1 Starting Address */
+#define REG_LCM_VA_BADDR1               (0x28)
+
+/* Video Stream Frame Buffer Control Register */
+#define REG_LCM_VA_FBCTRL               (0x2C)
+#define LCM_VA_FBCTRL_IO_REGION_HALF    (1 << 28)
+#define LCM_VA_FBCTRL_FIELD_DUAL        (1 << 29)
+#define LCM_VA_FBCTRL_START_BUF         (1 << 30)
+#define LCM_VA_FBCTRL_DB_EN             (1 << 31)
+
+/* Video Stream Scaling Control Register */
+#define REG_LCM_VA_SCALE                (0x30)
+#define LCM_VA_SCALE_XCOPY_INTERPOLATION (0 << 15)
+#define LCM_VA_SCALE_XCOPY_DUPLICATION   (1 << 15)
+
+/* Image Stream Active Window Coordinates */
+#define REG_LCM_VA_WIN                  (0x38)
+
+/* Image Stream Stuff Pixel */
+#define REG_LCM_VA_STUFF                (0x3C)
+
+/* OSD Window Starting Coordinates */
+#define REG_LCM_OSD_WINS                (0x40)
+
+/* OSD Window Ending Coordinates */
+#define REG_LCM_OSD_WINE                (0x44)
+
+/* OSD Stream Frame Buffer Starting Address */
+#define REG_LCM_OSD_BADDR               (0x48)
+
+/* OSD Stream Frame Buffer Control Register */
+#define REG_LCM_OSD_FBCTRL              (0x4c)
+
+/* OSD Overlay Control Register */
+#define REG_LCM_OSD_OVERLAY             (0x50)
+
+/* OSD Overlay Color-Key Pattern Register */
+#define REG_LCM_OSD_CKEY                (0x54)
+
+/* OSD Overlay Color-Key Mask Register */
+#define REG_LCM_OSD_CMASK               (0x58)
+
+/* OSD Window Skip1 Register */
+#define REG_LCM_OSD_SKIP1               (0x5C)
+
+/* OSD Window Skip2 Register */
+#define REG_LCM_OSD_SKIP2               (0x60)
+
+/* OSD horizontal up scaling control register */
+#define REG_LCM_OSD_SCALE               (0x64)
+
+/* MPU Vsync control register */
+#define REG_LCM_MPU_VSYNC               (0x68)
+
+/* Hardware cursor control Register */
+#define REG_LCM_HC_CTRL                 (0x6C)
+
+/* Hardware cursot tip point potison on va picture */
+#define REG_LCM_HC_POS                  (0x70)
+
+/* Hardware Cursor Window Buffer Control Register */
+#define REG_LCM_HC_WBCTRL               (0x74)
+
+/* Hardware cursor memory base address register */
+#define REG_LCM_HC_BADDR                (0x78)
+
+/* Hardware cursor color ram register mapped to bpp = 0 */
+#define REG_LCM_HC_COLOR0               (0x7C)
+
+/* Hardware cursor color ram register mapped to bpp = 1 */
+#define REG_LCM_HC_COLOR1               (0x80)
+
+/* Hardware cursor color ram register mapped to bpp = 2 */
+#define REG_LCM_HC_COLOR2               (0x84)
+
+/* Hardware cursor color ram register mapped to bpp = 3 */
+#define REG_LCM_HC_COLOR3               (0x88)
+
+#endif /* __ASM_ARM_W90X900_REGS_LDM_H */
diff --git a/arch/arm/mach-w90x900/include/mach/system.h b/arch/arm/mach-w90x900/include/mach/system.h
index 940640066857..ce228bdc66dd 100644
--- a/arch/arm/mach-w90x900/include/mach/system.h
+++ b/arch/arm/mach-w90x900/include/mach/system.h
@@ -15,7 +15,15 @@
  *
  */
 
+#include <linux/io.h>
 #include <asm/proc-fns.h>
+#include <mach/map.h>
+#include <mach/regs-timer.h>
+
+#define WTCR    (TMR_BA + 0x1C)
+#define WTCLK   (1 << 10)
+#define WTE     (1 << 7)
+#define WTRE    (1 << 1)
 
 static void arch_idle(void)
 {
@@ -23,6 +31,11 @@ static void arch_idle(void)
 
 static void arch_reset(char mode, const char *cmd)
 {
-        cpu_reset(0);
+        if (mode == 's') {
+                /* Jump into ROM at address 0 */
+                cpu_reset(0);
+        } else {
+                __raw_writel(WTE | WTRE | WTCLK, WTCR);
+        }
 }
 
diff --git a/arch/arm/mach-w90x900/include/mach/uncompress.h b/arch/arm/mach-w90x900/include/mach/uncompress.h
index 050d9fe5ae1b..56f1a74d7016 100644
--- a/arch/arm/mach-w90x900/include/mach/uncompress.h
+++ b/arch/arm/mach-w90x900/include/mach/uncompress.h
@@ -22,11 +22,21 @@
 
 #include <mach/regs-serial.h>
 #include <mach/map.h>
+#include <linux/serial_reg.h>
 
 #define arch_decomp_wdog()
 
+#define TX_DONE (UART_LSR_TEMT | UART_LSR_THRE)
+static volatile u32 * uart_base = (u32 *)UART0_PA;
+
 static void putc(int ch)
 {
+        /* Check THRE and TEMT bits before we transmit the character.
+         */
+        while ((uart_base[UART_LSR] & TX_DONE) != TX_DONE)
+                barrier();
+
+        *uart_base = ch;
 }
 
 static inline void flush(void)
diff --git a/arch/arm/mach-w90x900/include/mach/vmalloc.h b/arch/arm/mach-w90x900/include/mach/vmalloc.h
index 2f9dfb928533..b067e44500a4 100644
--- a/arch/arm/mach-w90x900/include/mach/vmalloc.h
+++ b/arch/arm/mach-w90x900/include/mach/vmalloc.h
@@ -18,6 +18,6 @@
 #ifndef __ASM_ARCH_VMALLOC_H
 #define __ASM_ARCH_VMALLOC_H
 
-#define VMALLOC_END       (0xE0000000)
+#define VMALLOC_END       (0xe0000000UL)
 
 #endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-w90x900/mach-nuc950evb.c b/arch/arm/mach-w90x900/mach-nuc950evb.c
index cef903bcccd1..b3edc3cccf52 100644
--- a/arch/arm/mach-w90x900/mach-nuc950evb.c
+++ b/arch/arm/mach-w90x900/mach-nuc950evb.c
@@ -10,6 +10,8 @@
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License as
  * published by the Free Software Foundation;version 2 of the License.
+ *   history:
+ *     Wang Qiang (rurality.linux@gmail.com) add LCD support
  *
  */
 
@@ -18,9 +20,51 @@
 #include <asm/mach/map.h>
 #include <asm/mach-types.h>
 #include <mach/map.h>
+#include <mach/regs-ldm.h>
+#include <mach/fb.h>
 
 #include "nuc950.h"
 
+#ifdef CONFIG_FB_NUC900
+/* LCD Controller */
+static struct nuc900fb_display __initdata nuc950_lcd_info[] = {
+        /* Giantplus Technology GPM1040A0 320x240 Color TFT LCD */
+        [0] = {
+                .type           = LCM_DCCS_VA_SRC_RGB565,
+                .width          = 320,
+                .height         = 240,
+                .xres           = 320,
+                .yres           = 240,
+                .bpp            = 16,
+                .pixclock       = 200000,
+                .left_margin    = 34,
+                .right_margin   = 54,
+                .hsync_len      = 10,
+                .upper_margin   = 18,
+                .lower_margin   = 4,
+                .vsync_len      = 1,
+                .dccs           = 0x8e00041a,
+                .devctl         = 0x060800c0,
+                .fbctrl         = 0x00a000a0,
+                .scale          = 0x04000400,
+        },
+};
+
+static struct nuc900fb_mach_info nuc950_fb_info __initdata = {
+#if defined(CONFIG_GPM1040A0_320X240)
+        .displays               = &nuc950_lcd_info[0],
+#else
+        .displays               = nuc950_lcd_info,
+#endif
+        .num_displays           = ARRAY_SIZE(nuc950_lcd_info),
+        .default_display        = 0,
+        .gpio_dir               = 0x00000004,
+        .gpio_dir_mask          = 0xFFFFFFFD,
+        .gpio_data              = 0x00000004,
+        .gpio_data_mask         = 0xFFFFFFFD,
+};
+#endif
+
 static void __init nuc950evb_map_io(void)
 {
         nuc950_map_io();
@@ -30,6 +74,9 @@ static void __init nuc950evb_map_io(void)
 static void __init nuc950evb_init(void)
 {
         nuc950_board_init();
+#ifdef CONFIG_FB_NUC900
+        nuc900_fb_set_platdata(&nuc950_fb_info);
+#endif
 }
 
 MACHINE_START(W90P950EVB, "W90P950EVB")
diff --git a/arch/arm/mach-w90x900/nuc950.c b/arch/arm/mach-w90x900/nuc950.c
index 149508116d18..4d1f1ab044c4 100644
--- a/arch/arm/mach-w90x900/nuc950.c
+++ b/arch/arm/mach-w90x900/nuc950.c
@@ -18,6 +18,7 @@
 #include <linux/platform_device.h>
 #include <asm/mach/map.h>
 #include <mach/hardware.h>
+
 #include "cpu.h"
 
 /* define specific CPU platform device */
@@ -25,6 +26,9 @@
 static struct platform_device *nuc950_dev[] __initdata = {
         &nuc900_device_kpi,
         &nuc900_device_fmi,
+#ifdef CONFIG_FB_NUC900
+        &nuc900_device_lcd,
+#endif
 };
 
 /* define specific CPU platform io map */
diff --git a/arch/arm/mach-w90x900/time.c b/arch/arm/mach-w90x900/time.c
index 4128af870b41..b80f769bc135 100644
--- a/arch/arm/mach-w90x900/time.c
+++ b/arch/arm/mach-w90x900/time.c
@@ -42,7 +42,10 @@
 #define TICKS_PER_SEC   100
 #define PRESCALE        0x63 /* Divider = prescale + 1 */
 
-unsigned int timer0_load;
+#define TDR_SHIFT       24
+#define TDR_MASK        ((1 << TDR_SHIFT) - 1)
+
+static unsigned int timer0_load;
 
 static void nuc900_clockevent_setmode(enum clock_event_mode mode,
                 struct clock_event_device *clk)
@@ -88,7 +91,7 @@ static int nuc900_clockevent_setnextevent(unsigned long evt,
 static struct clock_event_device nuc900_clockevent_device = {
         .name           = "nuc900-timer0",
         .shift          = 32,
-        .features       = CLOCK_EVT_MODE_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
+        .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
         .set_mode       = nuc900_clockevent_setmode,
         .set_next_event = nuc900_clockevent_setnextevent,
         .rating         = 300,
@@ -112,8 +115,23 @@ static struct irqaction nuc900_timer0_irq = {
         .handler        = nuc900_timer0_interrupt,
 };
 
-static void __init nuc900_clockevents_init(unsigned int rate)
+static void __init nuc900_clockevents_init(void)
 {
+        unsigned int rate;
+        struct clk *clk = clk_get(NULL, "timer0");
+
+        BUG_ON(IS_ERR(clk));
+
+        __raw_writel(0x00, REG_TCSR0);
+
+        clk_enable(clk);
+        rate = clk_get_rate(clk) / (PRESCALE + 1);
+
+        timer0_load = (rate / TICKS_PER_SEC);
+
+        __raw_writel(RESETINT, REG_TISR);
+        setup_irq(IRQ_TIMER0, &nuc900_timer0_irq);
+
         nuc900_clockevent_device.mult = div_sc(rate, NSEC_PER_SEC,
                                         nuc900_clockevent_device.shift);
         nuc900_clockevent_device.max_delta_ns = clockevent_delta2ns(0xffffffff,
@@ -127,26 +145,35 @@ static void __init nuc900_clockevents_init(unsigned int rate)
 
 static cycle_t nuc900_get_cycles(struct clocksource *cs)
 {
-        return ~__raw_readl(REG_TDR1);
+        return (~__raw_readl(REG_TDR1)) & TDR_MASK;
 }
 
 static struct clocksource clocksource_nuc900 = {
         .name   = "nuc900-timer1",
         .rating = 200,
         .read   = nuc900_get_cycles,
-        .mask   = CLOCKSOURCE_MASK(32),
-        .shift  = 20,
+        .mask   = CLOCKSOURCE_MASK(TDR_SHIFT),
+        .shift  = 10,
         .flags  = CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
-static void __init nuc900_clocksource_init(unsigned int rate)
+static void __init nuc900_clocksource_init(void)
 {
         unsigned int val;
+        unsigned int rate;
+        struct clk *clk = clk_get(NULL, "timer1");
+
+        BUG_ON(IS_ERR(clk));
+
+        __raw_writel(0x00, REG_TCSR1);
+
+        clk_enable(clk);
+        rate = clk_get_rate(clk) / (PRESCALE + 1);
 
         __raw_writel(0xffffffff, REG_TICR1);
 
         val = __raw_readl(REG_TCSR1);
-        val |= (COUNTEN | PERIOD);
+        val |= (COUNTEN | PERIOD | PRESCALE);
         __raw_writel(val, REG_TCSR1);
 
         clocksource_nuc900.mult =
@@ -156,25 +183,8 @@ static void __init nuc900_clocksource_init(unsigned int rate)
 
 static void __init nuc900_timer_init(void)
 {
-        struct clk *ck_ext = clk_get(NULL, "ext");
-        unsigned int    rate;
-
-        BUG_ON(IS_ERR(ck_ext));
-
-        rate = clk_get_rate(ck_ext);
-        clk_put(ck_ext);
-        rate = rate / (PRESCALE + 0x01);
-
-         /* set a known state */
-        __raw_writel(0x00, REG_TCSR0);
-        __raw_writel(0x00, REG_TCSR1);
-        __raw_writel(RESETINT, REG_TISR);
-        timer0_load = (rate / TICKS_PER_SEC);
-
-        setup_irq(IRQ_TIMER0, &nuc900_timer0_irq);
-
-        nuc900_clocksource_init(rate);
-        nuc900_clockevents_init(rate);
+        nuc900_clocksource_init();
+        nuc900_clockevents_init();
 }
 
 struct sys_timer nuc900_timer = {