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-rw-r--r--arch/arm/mach-ux500/platsmp.c8
1 files changed, 0 insertions, 8 deletions
diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c
index 18f7af339dc9..152b1309b9af 100644
--- a/arch/arm/mach-ux500/platsmp.c
+++ b/arch/arm/mach-ux500/platsmp.c
@@ -16,7 +16,6 @@
16#include <linux/device.h> 16#include <linux/device.h>
17#include <linux/smp.h> 17#include <linux/smp.h>
18#include <linux/io.h> 18#include <linux/io.h>
19#include <linux/irqchip/arm-gic.h>
20 19
21#include <asm/cacheflush.h> 20#include <asm/cacheflush.h>
22#include <asm/smp_plat.h> 21#include <asm/smp_plat.h>
@@ -58,13 +57,6 @@ static DEFINE_SPINLOCK(boot_lock);
58static void __cpuinit ux500_secondary_init(unsigned int cpu) 57static void __cpuinit ux500_secondary_init(unsigned int cpu)
59{ 58{
60 /* 59 /*
61 * if any interrupts are already enabled for the primary
62 * core (e.g. timer irq), then they will not have been enabled
63 * for us: do so
64 */
65 gic_secondary_init(0);
66
67 /*
68 * let the primary processor know we're out of the 60 * let the primary processor know we're out of the
69 * pen, then head off into the C entry point 61 * pen, then head off into the C entry point
70 */ 62 */