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Diffstat (limited to 'arch/arm/mach-ux500/devices-db8500.c')
-rw-r--r--arch/arm/mach-ux500/devices-db8500.c205
1 files changed, 92 insertions, 113 deletions
diff --git a/arch/arm/mach-ux500/devices-db8500.c b/arch/arm/mach-ux500/devices-db8500.c
index 9280d2561111..73b17404b194 100644
--- a/arch/arm/mach-ux500/devices-db8500.c
+++ b/arch/arm/mach-ux500/devices-db8500.c
@@ -11,6 +11,7 @@
11#include <linux/io.h> 11#include <linux/io.h>
12#include <linux/gpio.h> 12#include <linux/gpio.h>
13#include <linux/amba/bus.h> 13#include <linux/amba/bus.h>
14#include <linux/amba/pl022.h>
14 15
15#include <plat/ste_dma40.h> 16#include <plat/ste_dma40.h>
16 17
@@ -19,97 +20,6 @@
19 20
20#include "ste-dma40-db8500.h" 21#include "ste-dma40-db8500.h"
21 22
22static struct nmk_gpio_platform_data u8500_gpio_data[] = {
23 GPIO_DATA("GPIO-0-31", 0),
24 GPIO_DATA("GPIO-32-63", 32), /* 37..63 not routed to pin */
25 GPIO_DATA("GPIO-64-95", 64),
26 GPIO_DATA("GPIO-96-127", 96), /* 98..127 not routed to pin */
27 GPIO_DATA("GPIO-128-159", 128),
28 GPIO_DATA("GPIO-160-191", 160), /* 172..191 not routed to pin */
29 GPIO_DATA("GPIO-192-223", 192),
30 GPIO_DATA("GPIO-224-255", 224), /* 231..255 not routed to pin */
31 GPIO_DATA("GPIO-256-288", 256), /* 268..288 not routed to pin */
32};
33
34static struct resource u8500_gpio_resources[] = {
35 GPIO_RESOURCE(0),
36 GPIO_RESOURCE(1),
37 GPIO_RESOURCE(2),
38 GPIO_RESOURCE(3),
39 GPIO_RESOURCE(4),
40 GPIO_RESOURCE(5),
41 GPIO_RESOURCE(6),
42 GPIO_RESOURCE(7),
43 GPIO_RESOURCE(8),
44};
45
46struct platform_device u8500_gpio_devs[] = {
47 GPIO_DEVICE(0),
48 GPIO_DEVICE(1),
49 GPIO_DEVICE(2),
50 GPIO_DEVICE(3),
51 GPIO_DEVICE(4),
52 GPIO_DEVICE(5),
53 GPIO_DEVICE(6),
54 GPIO_DEVICE(7),
55 GPIO_DEVICE(8),
56};
57
58struct amba_device u8500_ssp0_device = {
59 .dev = {
60 .coherent_dma_mask = ~0,
61 .init_name = "ssp0",
62 },
63 .res = {
64 .start = U8500_SSP0_BASE,
65 .end = U8500_SSP0_BASE + SZ_4K - 1,
66 .flags = IORESOURCE_MEM,
67 },
68 .irq = {IRQ_DB8500_SSP0, NO_IRQ },
69 /* ST-Ericsson modified id */
70 .periphid = SSP_PER_ID,
71};
72
73static struct resource u8500_i2c0_resources[] = {
74 [0] = {
75 .start = U8500_I2C0_BASE,
76 .end = U8500_I2C0_BASE + SZ_4K - 1,
77 .flags = IORESOURCE_MEM,
78 },
79 [1] = {
80 .start = IRQ_DB8500_I2C0,
81 .end = IRQ_DB8500_I2C0,
82 .flags = IORESOURCE_IRQ,
83 }
84};
85
86struct platform_device u8500_i2c0_device = {
87 .name = "nmk-i2c",
88 .id = 0,
89 .resource = u8500_i2c0_resources,
90 .num_resources = ARRAY_SIZE(u8500_i2c0_resources),
91};
92
93static struct resource u8500_i2c4_resources[] = {
94 [0] = {
95 .start = U8500_I2C4_BASE,
96 .end = U8500_I2C4_BASE + SZ_4K - 1,
97 .flags = IORESOURCE_MEM,
98 },
99 [1] = {
100 .start = IRQ_DB8500_I2C4,
101 .end = IRQ_DB8500_I2C4,
102 .flags = IORESOURCE_IRQ,
103 }
104};
105
106struct platform_device u8500_i2c4_device = {
107 .name = "nmk-i2c",
108 .id = 4,
109 .resource = u8500_i2c4_resources,
110 .num_resources = ARRAY_SIZE(u8500_i2c4_resources),
111};
112
113static struct resource dma40_resources[] = { 23static struct resource dma40_resources[] = {
114 [0] = { 24 [0] = {
115 .start = U8500_DMA_BASE, 25 .start = U8500_DMA_BASE,
@@ -132,35 +42,25 @@ static struct resource dma40_resources[] = {
132 42
133/* Default configuration for physcial memcpy */ 43/* Default configuration for physcial memcpy */
134struct stedma40_chan_cfg dma40_memcpy_conf_phy = { 44struct stedma40_chan_cfg dma40_memcpy_conf_phy = {
135 .channel_type = (STEDMA40_CHANNEL_IN_PHY_MODE | 45 .mode = STEDMA40_MODE_PHYSICAL,
136 STEDMA40_LOW_PRIORITY_CHANNEL |
137 STEDMA40_PCHAN_BASIC_MODE),
138 .dir = STEDMA40_MEM_TO_MEM, 46 .dir = STEDMA40_MEM_TO_MEM,
139 47
140 .src_info.endianess = STEDMA40_LITTLE_ENDIAN,
141 .src_info.data_width = STEDMA40_BYTE_WIDTH, 48 .src_info.data_width = STEDMA40_BYTE_WIDTH,
142 .src_info.psize = STEDMA40_PSIZE_PHY_1, 49 .src_info.psize = STEDMA40_PSIZE_PHY_1,
143 .src_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL, 50 .src_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,
144 51
145 .dst_info.endianess = STEDMA40_LITTLE_ENDIAN,
146 .dst_info.data_width = STEDMA40_BYTE_WIDTH, 52 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
147 .dst_info.psize = STEDMA40_PSIZE_PHY_1, 53 .dst_info.psize = STEDMA40_PSIZE_PHY_1,
148 .dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL, 54 .dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,
149}; 55};
150/* Default configuration for logical memcpy */ 56/* Default configuration for logical memcpy */
151struct stedma40_chan_cfg dma40_memcpy_conf_log = { 57struct stedma40_chan_cfg dma40_memcpy_conf_log = {
152 .channel_type = (STEDMA40_CHANNEL_IN_LOG_MODE |
153 STEDMA40_LOW_PRIORITY_CHANNEL |
154 STEDMA40_LCHAN_SRC_LOG_DST_LOG |
155 STEDMA40_NO_TIM_FOR_LINK),
156 .dir = STEDMA40_MEM_TO_MEM, 58 .dir = STEDMA40_MEM_TO_MEM,
157 59
158 .src_info.endianess = STEDMA40_LITTLE_ENDIAN,
159 .src_info.data_width = STEDMA40_BYTE_WIDTH, 60 .src_info.data_width = STEDMA40_BYTE_WIDTH,
160 .src_info.psize = STEDMA40_PSIZE_LOG_1, 61 .src_info.psize = STEDMA40_PSIZE_LOG_1,
161 .src_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL, 62 .src_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,
162 63
163 .dst_info.endianess = STEDMA40_LITTLE_ENDIAN,
164 .dst_info.data_width = STEDMA40_BYTE_WIDTH, 64 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
165 .dst_info.psize = STEDMA40_PSIZE_LOG_1, 65 .dst_info.psize = STEDMA40_PSIZE_LOG_1,
166 .dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL, 66 .dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,
@@ -168,32 +68,91 @@ struct stedma40_chan_cfg dma40_memcpy_conf_log = {
168 68
169/* 69/*
170 * Mapping between destination event lines and physical device address. 70 * Mapping between destination event lines and physical device address.
171 * The event line is tied to a device and therefor the address is constant. 71 * The event line is tied to a device and therefore the address is constant.
72 * When the address comes from a primecell it will be configured in runtime
73 * and we set the address to -1 as a placeholder.
172 */ 74 */
173static const dma_addr_t dma40_tx_map[STEDMA40_NR_DEV]; 75static const dma_addr_t dma40_tx_map[DB8500_DMA_NR_DEV] = {
76 /* MUSB - these will be runtime-reconfigured */
77 [DB8500_DMA_DEV39_USB_OTG_OEP_8] = -1,
78 [DB8500_DMA_DEV16_USB_OTG_OEP_7_15] = -1,
79 [DB8500_DMA_DEV17_USB_OTG_OEP_6_14] = -1,
80 [DB8500_DMA_DEV18_USB_OTG_OEP_5_13] = -1,
81 [DB8500_DMA_DEV19_USB_OTG_OEP_4_12] = -1,
82 [DB8500_DMA_DEV36_USB_OTG_OEP_3_11] = -1,
83 [DB8500_DMA_DEV37_USB_OTG_OEP_2_10] = -1,
84 [DB8500_DMA_DEV38_USB_OTG_OEP_1_9] = -1,
85 /* PrimeCells - run-time configured */
86 [DB8500_DMA_DEV0_SPI0_TX] = -1,
87 [DB8500_DMA_DEV1_SD_MMC0_TX] = -1,
88 [DB8500_DMA_DEV2_SD_MMC1_TX] = -1,
89 [DB8500_DMA_DEV3_SD_MMC2_TX] = -1,
90 [DB8500_DMA_DEV8_SSP0_TX] = -1,
91 [DB8500_DMA_DEV9_SSP1_TX] = -1,
92 [DB8500_DMA_DEV11_UART2_TX] = -1,
93 [DB8500_DMA_DEV12_UART1_TX] = -1,
94 [DB8500_DMA_DEV13_UART0_TX] = -1,
95 [DB8500_DMA_DEV28_SD_MM2_TX] = -1,
96 [DB8500_DMA_DEV29_SD_MM0_TX] = -1,
97 [DB8500_DMA_DEV32_SD_MM1_TX] = -1,
98 [DB8500_DMA_DEV33_SPI2_TX] = -1,
99 [DB8500_DMA_DEV35_SPI1_TX] = -1,
100 [DB8500_DMA_DEV40_SPI3_TX] = -1,
101 [DB8500_DMA_DEV41_SD_MM3_TX] = -1,
102 [DB8500_DMA_DEV42_SD_MM4_TX] = -1,
103 [DB8500_DMA_DEV43_SD_MM5_TX] = -1,
104};
174 105
175/* Mapping between source event lines and physical device address */ 106/* Mapping between source event lines and physical device address */
176static const dma_addr_t dma40_rx_map[STEDMA40_NR_DEV]; 107static const dma_addr_t dma40_rx_map[DB8500_DMA_NR_DEV] = {
108 /* MUSB - these will be runtime-reconfigured */
109 [DB8500_DMA_DEV39_USB_OTG_IEP_8] = -1,
110 [DB8500_DMA_DEV16_USB_OTG_IEP_7_15] = -1,
111 [DB8500_DMA_DEV17_USB_OTG_IEP_6_14] = -1,
112 [DB8500_DMA_DEV18_USB_OTG_IEP_5_13] = -1,
113 [DB8500_DMA_DEV19_USB_OTG_IEP_4_12] = -1,
114 [DB8500_DMA_DEV36_USB_OTG_IEP_3_11] = -1,
115 [DB8500_DMA_DEV37_USB_OTG_IEP_2_10] = -1,
116 [DB8500_DMA_DEV38_USB_OTG_IEP_1_9] = -1,
117 /* PrimeCells */
118 [DB8500_DMA_DEV0_SPI0_RX] = -1,
119 [DB8500_DMA_DEV1_SD_MMC0_RX] = -1,
120 [DB8500_DMA_DEV2_SD_MMC1_RX] = -1,
121 [DB8500_DMA_DEV3_SD_MMC2_RX] = -1,
122 [DB8500_DMA_DEV8_SSP0_RX] = -1,
123 [DB8500_DMA_DEV9_SSP1_RX] = -1,
124 [DB8500_DMA_DEV11_UART2_RX] = -1,
125 [DB8500_DMA_DEV12_UART1_RX] = -1,
126 [DB8500_DMA_DEV13_UART0_RX] = -1,
127 [DB8500_DMA_DEV28_SD_MM2_RX] = -1,
128 [DB8500_DMA_DEV29_SD_MM0_RX] = -1,
129 [DB8500_DMA_DEV32_SD_MM1_RX] = -1,
130 [DB8500_DMA_DEV33_SPI2_RX] = -1,
131 [DB8500_DMA_DEV35_SPI1_RX] = -1,
132 [DB8500_DMA_DEV40_SPI3_RX] = -1,
133 [DB8500_DMA_DEV41_SD_MM3_RX] = -1,
134 [DB8500_DMA_DEV42_SD_MM4_RX] = -1,
135 [DB8500_DMA_DEV43_SD_MM5_RX] = -1,
136};
177 137
178/* Reserved event lines for memcpy only */ 138/* Reserved event lines for memcpy only */
179static int dma40_memcpy_event[] = { 139static int dma40_memcpy_event[] = {
180 STEDMA40_MEMCPY_TX_0, 140 DB8500_DMA_MEMCPY_TX_0,
181 STEDMA40_MEMCPY_TX_1, 141 DB8500_DMA_MEMCPY_TX_1,
182 STEDMA40_MEMCPY_TX_2, 142 DB8500_DMA_MEMCPY_TX_2,
183 STEDMA40_MEMCPY_TX_3, 143 DB8500_DMA_MEMCPY_TX_3,
184 STEDMA40_MEMCPY_TX_4, 144 DB8500_DMA_MEMCPY_TX_4,
185 STEDMA40_MEMCPY_TX_5, 145 DB8500_DMA_MEMCPY_TX_5,
186}; 146};
187 147
188static struct stedma40_platform_data dma40_plat_data = { 148static struct stedma40_platform_data dma40_plat_data = {
189 .dev_len = STEDMA40_NR_DEV, 149 .dev_len = DB8500_DMA_NR_DEV,
190 .dev_rx = dma40_rx_map, 150 .dev_rx = dma40_rx_map,
191 .dev_tx = dma40_tx_map, 151 .dev_tx = dma40_tx_map,
192 .memcpy = dma40_memcpy_event, 152 .memcpy = dma40_memcpy_event,
193 .memcpy_len = ARRAY_SIZE(dma40_memcpy_event), 153 .memcpy_len = ARRAY_SIZE(dma40_memcpy_event),
194 .memcpy_conf_phy = &dma40_memcpy_conf_phy, 154 .memcpy_conf_phy = &dma40_memcpy_conf_phy,
195 .memcpy_conf_log = &dma40_memcpy_conf_log, 155 .memcpy_conf_log = &dma40_memcpy_conf_log,
196 .llis_per_log = 8,
197 .disabled_channels = {-1}, 156 .disabled_channels = {-1},
198}; 157};
199 158
@@ -216,3 +175,23 @@ void dma40_u8500ed_fixup(void)
216 dma40_resources[1].start = U8500_DMA_LCPA_BASE_ED; 175 dma40_resources[1].start = U8500_DMA_LCPA_BASE_ED;
217 dma40_resources[1].end = U8500_DMA_LCPA_BASE_ED + 2 * SZ_1K - 1; 176 dma40_resources[1].end = U8500_DMA_LCPA_BASE_ED + 2 * SZ_1K - 1;
218} 177}
178
179struct resource keypad_resources[] = {
180 [0] = {
181 .start = U8500_SKE_BASE,
182 .end = U8500_SKE_BASE + SZ_4K - 1,
183 .flags = IORESOURCE_MEM,
184 },
185 [1] = {
186 .start = IRQ_DB8500_KB,
187 .end = IRQ_DB8500_KB,
188 .flags = IORESOURCE_IRQ,
189 },
190};
191
192struct platform_device u8500_ske_keypad_device = {
193 .name = "nmk-ske-keypad",
194 .id = -1,
195 .num_resources = ARRAY_SIZE(keypad_resources),
196 .resource = keypad_resources,
197};
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-22 11:12:06 -0500