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-rw-r--r--arch/arm/mach-tegra/board-dt-tegra20.c4
-rw-r--r--arch/arm/mach-tegra/board-dt-tegra30.c4
2 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/board-dt-tegra20.c b/arch/arm/mach-tegra/board-dt-tegra20.c
index 71569c01afd2..0419056e53bd 100644
--- a/arch/arm/mach-tegra/board-dt-tegra20.c
+++ b/arch/arm/mach-tegra/board-dt-tegra20.c
@@ -102,8 +102,12 @@ static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = {
102 { "pll_a", "pll_p_out1", 56448000, true }, 102 { "pll_a", "pll_p_out1", 56448000, true },
103 { "pll_a_out0", "pll_a", 11289600, true }, 103 { "pll_a_out0", "pll_a", 11289600, true },
104 { "cdev1", NULL, 0, true }, 104 { "cdev1", NULL, 0, true },
105 { "blink", "clk_32k", 32768, true },
105 { "i2s1", "pll_a_out0", 11289600, false}, 106 { "i2s1", "pll_a_out0", 11289600, false},
106 { "i2s2", "pll_a_out0", 11289600, false}, 107 { "i2s2", "pll_a_out0", 11289600, false},
108 { "sdmmc1", "pll_p", 48000000, false},
109 { "sdmmc3", "pll_p", 48000000, false},
110 { "sdmmc4", "pll_p", 48000000, false},
107 { NULL, NULL, 0, 0}, 111 { NULL, NULL, 0, 0},
108}; 112};
109 113
diff --git a/arch/arm/mach-tegra/board-dt-tegra30.c b/arch/arm/mach-tegra/board-dt-tegra30.c
index e56170393a5b..7368ebdbafc5 100644
--- a/arch/arm/mach-tegra/board-dt-tegra30.c
+++ b/arch/arm/mach-tegra/board-dt-tegra30.c
@@ -61,11 +61,15 @@ static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = {
61 { "pll_a_out0", "pll_a", 11289600, true }, 61 { "pll_a_out0", "pll_a", 11289600, true },
62 { "extern1", "pll_a_out0", 0, true }, 62 { "extern1", "pll_a_out0", 0, true },
63 { "clk_out_1", "extern1", 0, true }, 63 { "clk_out_1", "extern1", 0, true },
64 { "blink", "clk_32k", 32768, true },
64 { "i2s0", "pll_a_out0", 11289600, false}, 65 { "i2s0", "pll_a_out0", 11289600, false},
65 { "i2s1", "pll_a_out0", 11289600, false}, 66 { "i2s1", "pll_a_out0", 11289600, false},
66 { "i2s2", "pll_a_out0", 11289600, false}, 67 { "i2s2", "pll_a_out0", 11289600, false},
67 { "i2s3", "pll_a_out0", 11289600, false}, 68 { "i2s3", "pll_a_out0", 11289600, false},
68 { "i2s4", "pll_a_out0", 11289600, false}, 69 { "i2s4", "pll_a_out0", 11289600, false},
70 { "sdmmc1", "pll_p", 48000000, false},
71 { "sdmmc3", "pll_p", 48000000, false},
72 { "sdmmc4", "pll_p", 48000000, false},
69 { NULL, NULL, 0, 0}, 73 { NULL, NULL, 0, 0},
70}; 74};
71 75