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-rw-r--r--arch/arm/mach-tegra/sleep-tegra30.S14
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm/mach-tegra/sleep-tegra30.S b/arch/arm/mach-tegra/sleep-tegra30.S
index b16d4a57fa59..09cad9b071de 100644
--- a/arch/arm/mach-tegra/sleep-tegra30.S
+++ b/arch/arm/mach-tegra/sleep-tegra30.S
@@ -142,7 +142,7 @@ ENTRY(tegra30_hotplug_shutdown)
142 /* Powergate this CPU */ 142 /* Powergate this CPU */
143 mov r0, #TEGRA30_POWER_HOTPLUG_SHUTDOWN 143 mov r0, #TEGRA30_POWER_HOTPLUG_SHUTDOWN
144 bl tegra30_cpu_shutdown 144 bl tegra30_cpu_shutdown
145 mov pc, lr @ should never get here 145 ret lr @ should never get here
146ENDPROC(tegra30_hotplug_shutdown) 146ENDPROC(tegra30_hotplug_shutdown)
147 147
148/* 148/*
@@ -161,7 +161,7 @@ ENTRY(tegra30_cpu_shutdown)
161 bne _no_cpu0_chk @ It's not Tegra30 161 bne _no_cpu0_chk @ It's not Tegra30
162 162
163 cmp r3, #0 163 cmp r3, #0
164 moveq pc, lr @ Must never be called for CPU 0 164 reteq lr @ Must never be called for CPU 0
165_no_cpu0_chk: 165_no_cpu0_chk:
166 166
167 ldr r12, =TEGRA_FLOW_CTRL_VIRT 167 ldr r12, =TEGRA_FLOW_CTRL_VIRT
@@ -266,7 +266,7 @@ ENTRY(tegra30_sleep_core_finish)
266 mov32 r1, TEGRA_IRAM_LPx_RESUME_AREA 266 mov32 r1, TEGRA_IRAM_LPx_RESUME_AREA
267 add r0, r0, r1 267 add r0, r0, r1
268 268
269 mov pc, r3 269 ret r3
270ENDPROC(tegra30_sleep_core_finish) 270ENDPROC(tegra30_sleep_core_finish)
271 271
272/* 272/*
@@ -285,7 +285,7 @@ ENTRY(tegra30_sleep_cpu_secondary_finish)
285 mov r0, #0 @ power mode flags (!hotplug) 285 mov r0, #0 @ power mode flags (!hotplug)
286 bl tegra30_cpu_shutdown 286 bl tegra30_cpu_shutdown
287 mov r0, #1 @ never return here 287 mov r0, #1 @ never return here
288 mov pc, r7 288 ret r7
289ENDPROC(tegra30_sleep_cpu_secondary_finish) 289ENDPROC(tegra30_sleep_cpu_secondary_finish)
290 290
291/* 291/*
@@ -529,7 +529,7 @@ __no_dual_emc_chanl:
529 529
530 mov32 r0, TEGRA_PMC_BASE 530 mov32 r0, TEGRA_PMC_BASE
531 ldr r0, [r0, #PMC_SCRATCH41] 531 ldr r0, [r0, #PMC_SCRATCH41]
532 mov pc, r0 @ jump to tegra_resume 532 ret r0 @ jump to tegra_resume
533ENDPROC(tegra30_lp1_reset) 533ENDPROC(tegra30_lp1_reset)
534 534
535 .align L1_CACHE_SHIFT 535 .align L1_CACHE_SHIFT
@@ -659,7 +659,7 @@ _no_pll_in_iddq:
659 mov r0, #0 /* brust policy = 32KHz */ 659 mov r0, #0 /* brust policy = 32KHz */
660 str r0, [r5, #CLK_RESET_SCLK_BURST] 660 str r0, [r5, #CLK_RESET_SCLK_BURST]
661 661
662 mov pc, lr 662 ret lr
663 663
664/* 664/*
665 * tegra30_enter_sleep 665 * tegra30_enter_sleep
@@ -819,7 +819,7 @@ pmc_io_dpd_skip:
819 819
820 dsb 820 dsb
821 821
822 mov pc, lr 822 ret lr
823 823
824 .ltorg 824 .ltorg
825/* dummy symbol for end of IRAM */ 825/* dummy symbol for end of IRAM */