diff options
Diffstat (limited to 'arch/arm/mach-spear6xx/include/mach/irqs.h')
| -rw-r--r-- | arch/arm/mach-spear6xx/include/mach/irqs.h | 75 |
1 files changed, 3 insertions, 72 deletions
diff --git a/arch/arm/mach-spear6xx/include/mach/irqs.h b/arch/arm/mach-spear6xx/include/mach/irqs.h index 8f214b03d75d..2b735389e74b 100644 --- a/arch/arm/mach-spear6xx/include/mach/irqs.h +++ b/arch/arm/mach-spear6xx/include/mach/irqs.h | |||
| @@ -16,82 +16,13 @@ | |||
| 16 | 16 | ||
| 17 | /* IRQ definitions */ | 17 | /* IRQ definitions */ |
| 18 | /* VIC 1 */ | 18 | /* VIC 1 */ |
| 19 | #define IRQ_INTRCOMM_SW_IRQ 0 | 19 | /* FIXME: probe this from DT */ |
| 20 | #define IRQ_INTRCOMM_CPU_1 1 | ||
| 21 | #define IRQ_INTRCOMM_CPU_2 2 | ||
| 22 | #define IRQ_INTRCOMM_RAS2A11_1 3 | ||
| 23 | #define IRQ_INTRCOMM_RAS2A11_2 4 | ||
| 24 | #define IRQ_INTRCOMM_RAS2A12_1 5 | ||
| 25 | #define IRQ_INTRCOMM_RAS2A12_2 6 | ||
| 26 | #define IRQ_GEN_RAS_0 7 | ||
| 27 | #define IRQ_GEN_RAS_1 8 | ||
| 28 | #define IRQ_GEN_RAS_2 9 | ||
| 29 | #define IRQ_GEN_RAS_3 10 | ||
| 30 | #define IRQ_GEN_RAS_4 11 | ||
| 31 | #define IRQ_GEN_RAS_5 12 | ||
| 32 | #define IRQ_GEN_RAS_6 13 | ||
| 33 | #define IRQ_GEN_RAS_7 14 | ||
| 34 | #define IRQ_GEN_RAS_8 15 | ||
| 35 | #define IRQ_CPU_GPT1_1 16 | 20 | #define IRQ_CPU_GPT1_1 16 |
| 36 | #define IRQ_CPU_GPT1_2 17 | ||
| 37 | #define IRQ_LOCAL_GPIO 18 | ||
| 38 | #define IRQ_PLL_UNLOCK 19 | ||
| 39 | #define IRQ_JPEG 20 | ||
| 40 | #define IRQ_FSMC 21 | ||
| 41 | #define IRQ_IRDA 22 | ||
| 42 | #define IRQ_RESERVED 23 | ||
| 43 | #define IRQ_UART_0 24 | ||
| 44 | #define IRQ_UART_1 25 | ||
| 45 | #define IRQ_SSP_1 26 | ||
| 46 | #define IRQ_SSP_2 27 | ||
| 47 | #define IRQ_I2C 28 | ||
| 48 | #define IRQ_GEN_RAS_9 29 | ||
| 49 | #define IRQ_GEN_RAS_10 30 | ||
| 50 | #define IRQ_GEN_RAS_11 31 | ||
| 51 | |||
| 52 | /* VIC 2 */ | ||
| 53 | #define IRQ_APPL_GPT1_1 32 | ||
| 54 | #define IRQ_APPL_GPT1_2 33 | ||
| 55 | #define IRQ_APPL_GPT2_1 34 | ||
| 56 | #define IRQ_APPL_GPT2_2 35 | ||
| 57 | #define IRQ_APPL_GPIO 36 | ||
| 58 | #define IRQ_APPL_SSP 37 | ||
| 59 | #define IRQ_APPL_ADC 38 | ||
| 60 | #define IRQ_APPL_RESERVED 39 | ||
| 61 | #define IRQ_AHB_EXP_MASTER 40 | ||
| 62 | #define IRQ_DDR_CONTROLLER 41 | ||
| 63 | #define IRQ_BASIC_DMA 42 | ||
| 64 | #define IRQ_BASIC_RESERVED1 43 | ||
| 65 | #define IRQ_BASIC_SMI 44 | ||
| 66 | #define IRQ_BASIC_CLCD 45 | ||
| 67 | #define IRQ_EXP_AHB_1 46 | ||
| 68 | #define IRQ_EXP_AHB_2 47 | ||
| 69 | #define IRQ_BASIC_GPT1_1 48 | ||
| 70 | #define IRQ_BASIC_GPT1_2 49 | ||
| 71 | #define IRQ_BASIC_RTC 50 | ||
| 72 | #define IRQ_BASIC_GPIO 51 | ||
| 73 | #define IRQ_BASIC_WDT 52 | ||
| 74 | #define IRQ_BASIC_RESERVED 53 | ||
| 75 | #define IRQ_AHB_EXP_SLAVE 54 | ||
| 76 | #define IRQ_GMAC_1 55 | ||
| 77 | #define IRQ_GMAC_2 56 | ||
| 78 | #define IRQ_USB_DEV 57 | ||
| 79 | #define IRQ_USB_H_OHCI_0 58 | ||
| 80 | #define IRQ_USB_H_EHCI_0 59 | ||
| 81 | #define IRQ_USB_H_OHCI_1 60 | ||
| 82 | #define IRQ_USB_H_EHCI_1 61 | ||
| 83 | #define IRQ_EXP_AHB_3 62 | ||
| 84 | #define IRQ_EXP_AHB_4 63 | ||
| 85 | 21 | ||
| 86 | #define IRQ_VIC_END 64 | 22 | #define IRQ_VIC_END 64 |
| 87 | 23 | ||
| 88 | /* GPIO pins virtual irqs */ | 24 | /* GPIO pins virtual irqs */ |
| 89 | #define SPEAR_GPIO_INT_BASE IRQ_VIC_END | 25 | #define VIRTUAL_IRQS 24 |
| 90 | #define SPEAR_GPIO0_INT_BASE SPEAR_GPIO_INT_BASE | 26 | #define NR_IRQS (IRQ_VIC_END + VIRTUAL_IRQS) |
| 91 | #define SPEAR_GPIO1_INT_BASE (SPEAR_GPIO0_INT_BASE + 8) | ||
| 92 | #define SPEAR_GPIO2_INT_BASE (SPEAR_GPIO1_INT_BASE + 8) | ||
| 93 | #define SPEAR_GPIO_INT_END (SPEAR_GPIO2_INT_BASE + 8) | ||
| 94 | #define VIRTUAL_IRQS (SPEAR_GPIO_INT_END - IRQ_VIC_END) | ||
| 95 | #define NR_IRQS (IRQ_VIC_END + VIRTUAL_IRQS) | ||
| 96 | 27 | ||
| 97 | #endif /* __MACH_IRQS_H */ | 28 | #endif /* __MACH_IRQS_H */ |