diff options
Diffstat (limited to 'arch/arm/mach-spear3xx/include/mach/spear310.h')
-rw-r--r-- | arch/arm/mach-spear3xx/include/mach/spear310.h | 34 |
1 files changed, 11 insertions, 23 deletions
diff --git a/arch/arm/mach-spear3xx/include/mach/spear310.h b/arch/arm/mach-spear3xx/include/mach/spear310.h index b27bb8af3309..1e853479b8cd 100644 --- a/arch/arm/mach-spear3xx/include/mach/spear310.h +++ b/arch/arm/mach-spear3xx/include/mach/spear310.h | |||
@@ -16,30 +16,18 @@ | |||
16 | #ifndef __MACH_SPEAR310_H | 16 | #ifndef __MACH_SPEAR310_H |
17 | #define __MACH_SPEAR310_H | 17 | #define __MACH_SPEAR310_H |
18 | 18 | ||
19 | #define SPEAR310_NAND_BASE 0x40000000 | 19 | #define SPEAR310_NAND_BASE UL(0x40000000) |
20 | #define SPEAR310_NAND_SIZE 0x04000000 | 20 | #define SPEAR310_FSMC_BASE UL(0x44000000) |
21 | #define SPEAR310_UART1_BASE UL(0xB2000000) | ||
22 | #define SPEAR310_UART2_BASE UL(0xB2080000) | ||
23 | #define SPEAR310_UART3_BASE UL(0xB2100000) | ||
24 | #define SPEAR310_UART4_BASE UL(0xB2180000) | ||
25 | #define SPEAR310_UART5_BASE UL(0xB2200000) | ||
26 | #define SPEAR310_HDLC_BASE UL(0xB2800000) | ||
27 | #define SPEAR310_RS485_0_BASE UL(0xB3000000) | ||
28 | #define SPEAR310_RS485_1_BASE UL(0xB3800000) | ||
29 | #define SPEAR310_SOC_CONFIG_BASE UL(0xB4000000) | ||
21 | 30 | ||
22 | #define SPEAR310_FSMC_BASE 0x44000000 | ||
23 | #define SPEAR310_FSMC_SIZE 0x01000000 | ||
24 | |||
25 | #define SPEAR310_UART1_BASE 0xB2000000 | ||
26 | #define SPEAR310_UART2_BASE 0xB2080000 | ||
27 | #define SPEAR310_UART3_BASE 0xB2100000 | ||
28 | #define SPEAR310_UART4_BASE 0xB2180000 | ||
29 | #define SPEAR310_UART5_BASE 0xB2200000 | ||
30 | #define SPEAR310_UART_SIZE 0x00080000 | ||
31 | |||
32 | #define SPEAR310_HDLC_BASE 0xB2800000 | ||
33 | #define SPEAR310_HDLC_SIZE 0x00800000 | ||
34 | |||
35 | #define SPEAR310_RS485_0_BASE 0xB3000000 | ||
36 | #define SPEAR310_RS485_0_SIZE 0x00800000 | ||
37 | |||
38 | #define SPEAR310_RS485_1_BASE 0xB3800000 | ||
39 | #define SPEAR310_RS485_1_SIZE 0x00800000 | ||
40 | |||
41 | #define SPEAR310_SOC_CONFIG_BASE 0xB4000000 | ||
42 | #define SPEAR310_SOC_CONFIG_SIZE 0x00000070 | ||
43 | /* Interrupt registers offsets and masks */ | 31 | /* Interrupt registers offsets and masks */ |
44 | #define INT_STS_MASK_REG 0x04 | 32 | #define INT_STS_MASK_REG 0x04 |
45 | #define SMII0_IRQ_MASK (1 << 0) | 33 | #define SMII0_IRQ_MASK (1 << 0) |