Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm

* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (91 commits)
  ARM: 6806/1: irq: introduce entry and exit functions for chained handlers
  ARM: 6781/1: Thumb-2: Work around buggy Thumb-2 short branch relocations in gas
  ARM: 6747/1: P2V: Thumb2 support
  ARM: 6798/1: aout-core: zero thread debug registers in a.out core dump
  ARM: 6796/1: Footbridge: Fix I/O mappings for NOMMU mode
  ARM: 6784/1: errata: no automatic Store Buffer drain on Cortex-A9
  ARM: 6772/1: errata: possible fault MMU translations following an ASID switch
  ARM: 6776/1: mach-ux500: activate fix for errata 753970
  ARM: 6794/1: SPEAr: Append UL to device address macros.
  ARM: 6793/1: SPEAr: Remove unused *_SIZE macros from spear*.h files
  ARM: 6792/1: SPEAr: Replace SIZE macro's with SZ_4K macros
  ARM: 6791/1: SPEAr3xx: Declare device structures after shirq code
  ARM: 6790/1: SPEAr: Clock Framework: Rename usbd clock and align apb_clk entry
  ARM: 6789/1: SPEAr3xx: Rename sdio to sdhci
  ARM: 6788/1: SPEAr: Include mach/hardware.h instead of mach/spear.h
  ARM: 6787/1: SPEAr: Reorder #includes in .h & .c files.
  ARM: 6681/1: SPEAr: add debugfs support to clk API
  ARM: 6703/1: SPEAr: update clk API support
  ARM: 6679/1: SPEAr: make clk API functions more generic
  ARM: 6737/1: SPEAr: formalized timer support
  ...

1 files changed, 11 insertions, 23 deletions

diff --git a/arch/arm/mach-spear3xx/include/mach/spear310.h b/arch/arm/mach-spear3xx/include/mach/spear310.h
index b27bb8af3309..1e853479b8cd 100644
--- a/arch/arm/mach-spear3xx/include/mach/spear310.h
+++ b/arch/arm/mach-spear3xx/include/mach/spear310.h
@@ -16,30 +16,18 @@
 #ifndef __MACH_SPEAR310_H
 #define __MACH_SPEAR310_H
 
-#define SPEAR310_NAND_BASE              0x40000000
-#define SPEAR310_NAND_SIZE              0x04000000
+#define SPEAR310_NAND_BASE              UL(0x40000000)
+#define SPEAR310_FSMC_BASE              UL(0x44000000)
+#define SPEAR310_UART1_BASE             UL(0xB2000000)
+#define SPEAR310_UART2_BASE             UL(0xB2080000)
+#define SPEAR310_UART3_BASE             UL(0xB2100000)
+#define SPEAR310_UART4_BASE             UL(0xB2180000)
+#define SPEAR310_UART5_BASE             UL(0xB2200000)
+#define SPEAR310_HDLC_BASE              UL(0xB2800000)
+#define SPEAR310_RS485_0_BASE           UL(0xB3000000)
+#define SPEAR310_RS485_1_BASE           UL(0xB3800000)
+#define SPEAR310_SOC_CONFIG_BASE        UL(0xB4000000)
 
-#define SPEAR310_FSMC_BASE              0x44000000
-#define SPEAR310_FSMC_SIZE              0x01000000
-
-#define SPEAR310_UART1_BASE             0xB2000000
-#define SPEAR310_UART2_BASE             0xB2080000
-#define SPEAR310_UART3_BASE             0xB2100000
-#define SPEAR310_UART4_BASE             0xB2180000
-#define SPEAR310_UART5_BASE             0xB2200000
-#define SPEAR310_UART_SIZE              0x00080000
-
-#define SPEAR310_HDLC_BASE              0xB2800000
-#define SPEAR310_HDLC_SIZE              0x00800000
-
-#define SPEAR310_RS485_0_BASE           0xB3000000
-#define SPEAR310_RS485_0_SIZE           0x00800000
-
-#define SPEAR310_RS485_1_BASE           0xB3800000
-#define SPEAR310_RS485_1_SIZE           0x00800000
-
-#define SPEAR310_SOC_CONFIG_BASE        0xB4000000
-#define SPEAR310_SOC_CONFIG_SIZE        0x00000070
 /* Interrupt registers offsets and masks */
 #define INT_STS_MASK_REG                0x04
 #define SMII0_IRQ_MASK                  (1 << 0)