aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-spear13xx/platsmp.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mach-spear13xx/platsmp.c')
-rw-r--r--arch/arm/mach-spear13xx/platsmp.c8
1 files changed, 0 insertions, 8 deletions
diff --git a/arch/arm/mach-spear13xx/platsmp.c b/arch/arm/mach-spear13xx/platsmp.c
index af4ade61cd95..551c69c9a228 100644
--- a/arch/arm/mach-spear13xx/platsmp.c
+++ b/arch/arm/mach-spear13xx/platsmp.c
@@ -15,7 +15,6 @@
15#include <linux/jiffies.h> 15#include <linux/jiffies.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/smp.h> 17#include <linux/smp.h>
18#include <linux/irqchip/arm-gic.h>
19#include <asm/cacheflush.h> 18#include <asm/cacheflush.h>
20#include <asm/smp_scu.h> 19#include <asm/smp_scu.h>
21#include <mach/spear.h> 20#include <mach/spear.h>
@@ -28,13 +27,6 @@ static void __iomem *scu_base = IOMEM(VA_SCU_BASE);
28static void __cpuinit spear13xx_secondary_init(unsigned int cpu) 27static void __cpuinit spear13xx_secondary_init(unsigned int cpu)
29{ 28{
30 /* 29 /*
31 * if any interrupts are already enabled for the primary
32 * core (e.g. timer irq), then they will not have been enabled
33 * for us: do so
34 */
35 gic_secondary_init(0);
36
37 /*
38 * let the primary processor know we're out of the 30 * let the primary processor know we're out of the
39 * pen, then head off into the C entry point 31 * pen, then head off into the C entry point
40 */ 32 */