diff options
Diffstat (limited to 'arch/arm/mach-socfpga')
-rw-r--r-- | arch/arm/mach-socfpga/core.h | 3 | ||||
-rw-r--r-- | arch/arm/mach-socfpga/platsmp.c | 19 |
2 files changed, 14 insertions, 8 deletions
diff --git a/arch/arm/mach-socfpga/core.h b/arch/arm/mach-socfpga/core.h index 60c443dadb58..483cb467bf65 100644 --- a/arch/arm/mach-socfpga/core.h +++ b/arch/arm/mach-socfpga/core.h | |||
@@ -21,6 +21,7 @@ | |||
21 | #define __MACH_CORE_H | 21 | #define __MACH_CORE_H |
22 | 22 | ||
23 | #define SOCFPGA_RSTMGR_CTRL 0x04 | 23 | #define SOCFPGA_RSTMGR_CTRL 0x04 |
24 | #define SOCFPGA_RSTMGR_MODMPURST 0x10 | ||
24 | #define SOCFPGA_RSTMGR_MODPERRST 0x14 | 25 | #define SOCFPGA_RSTMGR_MODPERRST 0x14 |
25 | #define SOCFPGA_RSTMGR_BRGMODRST 0x1c | 26 | #define SOCFPGA_RSTMGR_BRGMODRST 0x1c |
26 | 27 | ||
@@ -28,6 +29,8 @@ | |||
28 | #define RSTMGR_CTRL_SWCOLDRSTREQ 0x1 /* Cold Reset */ | 29 | #define RSTMGR_CTRL_SWCOLDRSTREQ 0x1 /* Cold Reset */ |
29 | #define RSTMGR_CTRL_SWWARMRSTREQ 0x2 /* Warm Reset */ | 30 | #define RSTMGR_CTRL_SWWARMRSTREQ 0x2 /* Warm Reset */ |
30 | 31 | ||
32 | #define RSTMGR_MPUMODRST_CPU1 0x2 /* CPU1 Reset */ | ||
33 | |||
31 | extern void socfpga_secondary_startup(void); | 34 | extern void socfpga_secondary_startup(void); |
32 | extern void __iomem *socfpga_scu_base_addr; | 35 | extern void __iomem *socfpga_scu_base_addr; |
33 | 36 | ||
diff --git a/arch/arm/mach-socfpga/platsmp.c b/arch/arm/mach-socfpga/platsmp.c index 16ca97b039f9..c64d89b7c0ca 100644 --- a/arch/arm/mach-socfpga/platsmp.c +++ b/arch/arm/mach-socfpga/platsmp.c | |||
@@ -34,17 +34,21 @@ static int socfpga_boot_secondary(unsigned int cpu, struct task_struct *idle) | |||
34 | int trampoline_size = &secondary_trampoline_end - &secondary_trampoline; | 34 | int trampoline_size = &secondary_trampoline_end - &secondary_trampoline; |
35 | 35 | ||
36 | if (socfpga_cpu1start_addr) { | 36 | if (socfpga_cpu1start_addr) { |
37 | /* This will put CPU #1 into reset. */ | ||
38 | writel(RSTMGR_MPUMODRST_CPU1, | ||
39 | rst_manager_base_addr + SOCFPGA_RSTMGR_MODMPURST); | ||
40 | |||
37 | memcpy(phys_to_virt(0), &secondary_trampoline, trampoline_size); | 41 | memcpy(phys_to_virt(0), &secondary_trampoline, trampoline_size); |
38 | 42 | ||
39 | __raw_writel(virt_to_phys(socfpga_secondary_startup), | 43 | writel(virt_to_phys(socfpga_secondary_startup), |
40 | (sys_manager_base_addr + (socfpga_cpu1start_addr & 0x000000ff))); | 44 | sys_manager_base_addr + (socfpga_cpu1start_addr & 0x000000ff)); |
41 | 45 | ||
42 | flush_cache_all(); | 46 | flush_cache_all(); |
43 | smp_wmb(); | 47 | smp_wmb(); |
44 | outer_clean_range(0, trampoline_size); | 48 | outer_clean_range(0, trampoline_size); |
45 | 49 | ||
46 | /* This will release CPU #1 out of reset.*/ | 50 | /* This will release CPU #1 out of reset. */ |
47 | __raw_writel(0, rst_manager_base_addr + 0x10); | 51 | writel(0, rst_manager_base_addr + SOCFPGA_RSTMGR_MODMPURST); |
48 | } | 52 | } |
49 | 53 | ||
50 | return 0; | 54 | return 0; |
@@ -86,10 +90,9 @@ static void __init socfpga_smp_prepare_cpus(unsigned int max_cpus) | |||
86 | */ | 90 | */ |
87 | static void socfpga_cpu_die(unsigned int cpu) | 91 | static void socfpga_cpu_die(unsigned int cpu) |
88 | { | 92 | { |
89 | cpu_do_idle(); | 93 | /* Do WFI. If we wake up early, go back into WFI */ |
90 | 94 | while (1) | |
91 | /* We should have never returned from idle */ | 95 | cpu_do_idle(); |
92 | panic("cpu %d unexpectedly exit from shutdown\n", cpu); | ||
93 | } | 96 | } |
94 | 97 | ||
95 | struct smp_operations socfpga_smp_ops __initdata = { | 98 | struct smp_operations socfpga_smp_ops __initdata = { |