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Diffstat (limited to 'arch/arm/mach-shmobile/setup-r8a7791.c')
-rw-r--r--arch/arm/mach-shmobile/setup-r8a7791.c181
1 files changed, 1 insertions, 180 deletions
diff --git a/arch/arm/mach-shmobile/setup-r8a7791.c b/arch/arm/mach-shmobile/setup-r8a7791.c
index d930925f8f1a..ef8eb3af586d 100644
--- a/arch/arm/mach-shmobile/setup-r8a7791.c
+++ b/arch/arm/mach-shmobile/setup-r8a7791.c
@@ -15,192 +15,14 @@
15 * GNU General Public License for more details. 15 * GNU General Public License for more details.
16 */ 16 */
17 17
18#include <linux/irq.h> 18#include <linux/init.h>
19#include <linux/kernel.h>
20#include <linux/of_platform.h>
21#include <linux/platform_data/gpio-rcar.h>
22#include <linux/platform_data/irq-renesas-irqc.h>
23#include <linux/serial_sci.h>
24#include <linux/sh_timer.h>
25 19
26#include <asm/mach/arch.h> 20#include <asm/mach/arch.h>
27 21
28#include "common.h" 22#include "common.h"
29#include "irqs.h"
30#include "r8a7791.h" 23#include "r8a7791.h"
31#include "rcar-gen2.h" 24#include "rcar-gen2.h"
32 25
33static const struct resource pfc_resources[] __initconst = {
34 DEFINE_RES_MEM(0xe6060000, 0x250),
35};
36
37#define r8a7791_register_pfc() \
38 platform_device_register_simple("pfc-r8a7791", -1, pfc_resources, \
39 ARRAY_SIZE(pfc_resources))
40
41#define R8A7791_GPIO(idx, base, nr) \
42static const struct resource r8a7791_gpio##idx##_resources[] __initconst = { \
43 DEFINE_RES_MEM((base), 0x50), \
44 DEFINE_RES_IRQ(gic_spi(4 + (idx))), \
45}; \
46 \
47static const struct gpio_rcar_config \
48r8a7791_gpio##idx##_platform_data __initconst = { \
49 .gpio_base = 32 * (idx), \
50 .irq_base = 0, \
51 .number_of_pins = (nr), \
52 .pctl_name = "pfc-r8a7791", \
53 .has_both_edge_trigger = 1, \
54}; \
55
56R8A7791_GPIO(0, 0xe6050000, 32);
57R8A7791_GPIO(1, 0xe6051000, 32);
58R8A7791_GPIO(2, 0xe6052000, 32);
59R8A7791_GPIO(3, 0xe6053000, 32);
60R8A7791_GPIO(4, 0xe6054000, 32);
61R8A7791_GPIO(5, 0xe6055000, 32);
62R8A7791_GPIO(6, 0xe6055400, 32);
63R8A7791_GPIO(7, 0xe6055800, 26);
64
65#define r8a7791_register_gpio(idx) \
66 platform_device_register_resndata(NULL, "gpio_rcar", idx, \
67 r8a7791_gpio##idx##_resources, \
68 ARRAY_SIZE(r8a7791_gpio##idx##_resources), \
69 &r8a7791_gpio##idx##_platform_data, \
70 sizeof(r8a7791_gpio##idx##_platform_data))
71
72void __init r8a7791_pinmux_init(void)
73{
74 r8a7791_register_pfc();
75 r8a7791_register_gpio(0);
76 r8a7791_register_gpio(1);
77 r8a7791_register_gpio(2);
78 r8a7791_register_gpio(3);
79 r8a7791_register_gpio(4);
80 r8a7791_register_gpio(5);
81 r8a7791_register_gpio(6);
82 r8a7791_register_gpio(7);
83}
84
85#define __R8A7791_SCIF(scif_type, index, baseaddr, irq) \
86static struct plat_sci_port scif##index##_platform_data = { \
87 .type = scif_type, \
88 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
89 .scscr = SCSCR_RE | SCSCR_TE, \
90}; \
91 \
92static struct resource scif##index##_resources[] = { \
93 DEFINE_RES_MEM(baseaddr, 0x100), \
94 DEFINE_RES_IRQ(irq), \
95}
96
97#define R8A7791_SCIF(index, baseaddr, irq) \
98 __R8A7791_SCIF(PORT_SCIF, index, baseaddr, irq)
99
100#define R8A7791_SCIFA(index, baseaddr, irq) \
101 __R8A7791_SCIF(PORT_SCIFA, index, baseaddr, irq)
102
103#define R8A7791_SCIFB(index, baseaddr, irq) \
104 __R8A7791_SCIF(PORT_SCIFB, index, baseaddr, irq)
105
106R8A7791_SCIFA(0, 0xe6c40000, gic_spi(144)); /* SCIFA0 */
107R8A7791_SCIFA(1, 0xe6c50000, gic_spi(145)); /* SCIFA1 */
108R8A7791_SCIFB(2, 0xe6c20000, gic_spi(148)); /* SCIFB0 */
109R8A7791_SCIFB(3, 0xe6c30000, gic_spi(149)); /* SCIFB1 */
110R8A7791_SCIFB(4, 0xe6ce0000, gic_spi(150)); /* SCIFB2 */
111R8A7791_SCIFA(5, 0xe6c60000, gic_spi(151)); /* SCIFA2 */
112R8A7791_SCIF(6, 0xe6e60000, gic_spi(152)); /* SCIF0 */
113R8A7791_SCIF(7, 0xe6e68000, gic_spi(153)); /* SCIF1 */
114R8A7791_SCIF(8, 0xe6e58000, gic_spi(22)); /* SCIF2 */
115R8A7791_SCIF(9, 0xe6ea8000, gic_spi(23)); /* SCIF3 */
116R8A7791_SCIF(10, 0xe6ee0000, gic_spi(24)); /* SCIF4 */
117R8A7791_SCIF(11, 0xe6ee8000, gic_spi(25)); /* SCIF5 */
118R8A7791_SCIFA(12, 0xe6c70000, gic_spi(29)); /* SCIFA3 */
119R8A7791_SCIFA(13, 0xe6c78000, gic_spi(30)); /* SCIFA4 */
120R8A7791_SCIFA(14, 0xe6c80000, gic_spi(31)); /* SCIFA5 */
121
122#define r8a7791_register_scif(index) \
123 platform_device_register_resndata(NULL, "sh-sci", index, \
124 scif##index##_resources, \
125 ARRAY_SIZE(scif##index##_resources), \
126 &scif##index##_platform_data, \
127 sizeof(scif##index##_platform_data))
128
129static struct sh_timer_config cmt0_platform_data = {
130 .channels_mask = 0x60,
131};
132
133static struct resource cmt0_resources[] = {
134 DEFINE_RES_MEM(0xffca0000, 0x1004),
135 DEFINE_RES_IRQ(gic_spi(142)),
136};
137
138#define r8a7791_register_cmt(idx) \
139 platform_device_register_resndata(NULL, "sh-cmt-48-gen2", \
140 idx, cmt##idx##_resources, \
141 ARRAY_SIZE(cmt##idx##_resources), \
142 &cmt##idx##_platform_data, \
143 sizeof(struct sh_timer_config))
144
145static struct renesas_irqc_config irqc0_data = {
146 .irq_base = irq_pin(0), /* IRQ0 -> IRQ9 */
147};
148
149static struct resource irqc0_resources[] = {
150 DEFINE_RES_MEM(0xe61c0000, 0x200), /* IRQC Event Detector Block_0 */
151 DEFINE_RES_IRQ(gic_spi(0)), /* IRQ0 */
152 DEFINE_RES_IRQ(gic_spi(1)), /* IRQ1 */
153 DEFINE_RES_IRQ(gic_spi(2)), /* IRQ2 */
154 DEFINE_RES_IRQ(gic_spi(3)), /* IRQ3 */
155 DEFINE_RES_IRQ(gic_spi(12)), /* IRQ4 */
156 DEFINE_RES_IRQ(gic_spi(13)), /* IRQ5 */
157 DEFINE_RES_IRQ(gic_spi(14)), /* IRQ6 */
158 DEFINE_RES_IRQ(gic_spi(15)), /* IRQ7 */
159 DEFINE_RES_IRQ(gic_spi(16)), /* IRQ8 */
160 DEFINE_RES_IRQ(gic_spi(17)), /* IRQ9 */
161};
162
163#define r8a7791_register_irqc(idx) \
164 platform_device_register_resndata(NULL, "renesas_irqc", \
165 idx, irqc##idx##_resources, \
166 ARRAY_SIZE(irqc##idx##_resources), \
167 &irqc##idx##_data, \
168 sizeof(struct renesas_irqc_config))
169
170static const struct resource thermal_resources[] __initconst = {
171 DEFINE_RES_MEM(0xe61f0000, 0x14),
172 DEFINE_RES_MEM(0xe61f0100, 0x38),
173 DEFINE_RES_IRQ(gic_spi(69)),
174};
175
176#define r8a7791_register_thermal() \
177 platform_device_register_simple("rcar_thermal", -1, \
178 thermal_resources, \
179 ARRAY_SIZE(thermal_resources))
180
181void __init r8a7791_add_standard_devices(void)
182{
183 r8a7791_register_scif(0);
184 r8a7791_register_scif(1);
185 r8a7791_register_scif(2);
186 r8a7791_register_scif(3);
187 r8a7791_register_scif(4);
188 r8a7791_register_scif(5);
189 r8a7791_register_scif(6);
190 r8a7791_register_scif(7);
191 r8a7791_register_scif(8);
192 r8a7791_register_scif(9);
193 r8a7791_register_scif(10);
194 r8a7791_register_scif(11);
195 r8a7791_register_scif(12);
196 r8a7791_register_scif(13);
197 r8a7791_register_scif(14);
198 r8a7791_register_cmt(0);
199 r8a7791_register_irqc(0);
200 r8a7791_register_thermal();
201}
202
203#ifdef CONFIG_USE_OF
204static const char *r8a7791_boards_compat_dt[] __initdata = { 26static const char *r8a7791_boards_compat_dt[] __initdata = {
205 "renesas,r8a7791", 27 "renesas,r8a7791",
206 NULL, 28 NULL,
@@ -214,4 +36,3 @@ DT_MACHINE_START(R8A7791_DT, "Generic R8A7791 (Flattened Device Tree)")
214 .reserve = rcar_gen2_reserve, 36 .reserve = rcar_gen2_reserve,
215 .dt_compat = r8a7791_boards_compat_dt, 37 .dt_compat = r8a7791_boards_compat_dt,
216MACHINE_END 38MACHINE_END
217#endif /* CONFIG_USE_OF */
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-22 21:11:45 -0500