diff options
Diffstat (limited to 'arch/arm/mach-shmobile/pfc-sh73a0.c')
-rw-r--r-- | arch/arm/mach-shmobile/pfc-sh73a0.c | 77 |
1 files changed, 62 insertions, 15 deletions
diff --git a/arch/arm/mach-shmobile/pfc-sh73a0.c b/arch/arm/mach-shmobile/pfc-sh73a0.c index 3eed44eb98b4..a26d9059036b 100644 --- a/arch/arm/mach-shmobile/pfc-sh73a0.c +++ b/arch/arm/mach-shmobile/pfc-sh73a0.c | |||
@@ -488,13 +488,26 @@ enum { | |||
488 | KEYIN5_PU_MARK, | 488 | KEYIN5_PU_MARK, |
489 | KEYIN6_PU_MARK, | 489 | KEYIN6_PU_MARK, |
490 | KEYIN7_PU_MARK, | 490 | KEYIN7_PU_MARK, |
491 | SDHICD0_PU_MARK, | ||
492 | SDHID0_0_PU_MARK, | ||
493 | SDHID0_1_PU_MARK, | ||
494 | SDHID0_2_PU_MARK, | ||
495 | SDHID0_3_PU_MARK, | ||
496 | SDHICMD0_PU_MARK, | ||
497 | SDHIWP0_PU_MARK, | ||
491 | SDHID1_0_PU_MARK, | 498 | SDHID1_0_PU_MARK, |
492 | SDHID1_1_PU_MARK, | 499 | SDHID1_1_PU_MARK, |
493 | SDHID1_2_PU_MARK, | 500 | SDHID1_2_PU_MARK, |
494 | SDHID1_3_PU_MARK, | 501 | SDHID1_3_PU_MARK, |
495 | SDHICMD1_PU_MARK, | 502 | SDHICMD1_PU_MARK, |
503 | SDHID2_0_PU_MARK, | ||
504 | SDHID2_1_PU_MARK, | ||
505 | SDHID2_2_PU_MARK, | ||
506 | SDHID2_3_PU_MARK, | ||
507 | SDHICMD2_PU_MARK, | ||
496 | MMCCMD0_PU_MARK, | 508 | MMCCMD0_PU_MARK, |
497 | MMCCMD1_PU_MARK, | 509 | MMCCMD1_PU_MARK, |
510 | FSIBISLD_PU_MARK, | ||
498 | FSIACK_PU_MARK, | 511 | FSIACK_PU_MARK, |
499 | FSIAILR_PU_MARK, | 512 | FSIAILR_PU_MARK, |
500 | FSIAIBT_PU_MARK, | 513 | FSIAIBT_PU_MARK, |
@@ -1387,19 +1400,28 @@ static pinmux_enum_t pinmux_data[] = { | |||
1387 | PINMUX_DATA(TS_SCK4_MARK, PORT268_FN3), | 1400 | PINMUX_DATA(TS_SCK4_MARK, PORT268_FN3), |
1388 | PINMUX_DATA(SDHICMD2_MARK, PORT269_FN1), | 1401 | PINMUX_DATA(SDHICMD2_MARK, PORT269_FN1), |
1389 | PINMUX_DATA(MMCCLK0_MARK, PORT270_FN1, MSEL4CR_MSEL15_0), | 1402 | PINMUX_DATA(MMCCLK0_MARK, PORT270_FN1, MSEL4CR_MSEL15_0), |
1390 | PINMUX_DATA(MMCD0_0_MARK, PORT271_FN1, MSEL4CR_MSEL15_0), | 1403 | PINMUX_DATA(MMCD0_0_MARK, PORT271_FN1, PORT271_IN_PU, |
1391 | PINMUX_DATA(MMCD0_1_MARK, PORT272_FN1, MSEL4CR_MSEL15_0), | 1404 | MSEL4CR_MSEL15_0), |
1392 | PINMUX_DATA(MMCD0_2_MARK, PORT273_FN1, MSEL4CR_MSEL15_0), | 1405 | PINMUX_DATA(MMCD0_1_MARK, PORT272_FN1, PORT272_IN_PU, |
1393 | PINMUX_DATA(MMCD0_3_MARK, PORT274_FN1, MSEL4CR_MSEL15_0), | 1406 | MSEL4CR_MSEL15_0), |
1394 | PINMUX_DATA(MMCD0_4_MARK, PORT275_FN1, MSEL4CR_MSEL15_0), \ | 1407 | PINMUX_DATA(MMCD0_2_MARK, PORT273_FN1, PORT273_IN_PU, |
1408 | MSEL4CR_MSEL15_0), | ||
1409 | PINMUX_DATA(MMCD0_3_MARK, PORT274_FN1, PORT274_IN_PU, | ||
1410 | MSEL4CR_MSEL15_0), | ||
1411 | PINMUX_DATA(MMCD0_4_MARK, PORT275_FN1, PORT275_IN_PU, | ||
1412 | MSEL4CR_MSEL15_0), \ | ||
1395 | PINMUX_DATA(TS_SPSYNC5_MARK, PORT275_FN3), | 1413 | PINMUX_DATA(TS_SPSYNC5_MARK, PORT275_FN3), |
1396 | PINMUX_DATA(MMCD0_5_MARK, PORT276_FN1, MSEL4CR_MSEL15_0), \ | 1414 | PINMUX_DATA(MMCD0_5_MARK, PORT276_FN1, PORT276_IN_PU, |
1415 | MSEL4CR_MSEL15_0), \ | ||
1397 | PINMUX_DATA(TS_SDAT5_MARK, PORT276_FN3), | 1416 | PINMUX_DATA(TS_SDAT5_MARK, PORT276_FN3), |
1398 | PINMUX_DATA(MMCD0_6_MARK, PORT277_FN1, MSEL4CR_MSEL15_0), \ | 1417 | PINMUX_DATA(MMCD0_6_MARK, PORT277_FN1, PORT277_IN_PU, |
1418 | MSEL4CR_MSEL15_0), \ | ||
1399 | PINMUX_DATA(TS_SDEN5_MARK, PORT277_FN3), | 1419 | PINMUX_DATA(TS_SDEN5_MARK, PORT277_FN3), |
1400 | PINMUX_DATA(MMCD0_7_MARK, PORT278_FN1, MSEL4CR_MSEL15_0), \ | 1420 | PINMUX_DATA(MMCD0_7_MARK, PORT278_FN1, PORT278_IN_PU, |
1421 | MSEL4CR_MSEL15_0), \ | ||
1401 | PINMUX_DATA(TS_SCK5_MARK, PORT278_FN3), | 1422 | PINMUX_DATA(TS_SCK5_MARK, PORT278_FN3), |
1402 | PINMUX_DATA(MMCCMD0_MARK, PORT279_FN1, MSEL4CR_MSEL15_0), | 1423 | PINMUX_DATA(MMCCMD0_MARK, PORT279_FN1, PORT279_IN_PU, |
1424 | MSEL4CR_MSEL15_0), | ||
1403 | PINMUX_DATA(RESETOUTS__MARK, PORT281_FN1), \ | 1425 | PINMUX_DATA(RESETOUTS__MARK, PORT281_FN1), \ |
1404 | PINMUX_DATA(EXTAL2OUT_MARK, PORT281_FN2), | 1426 | PINMUX_DATA(EXTAL2OUT_MARK, PORT281_FN2), |
1405 | PINMUX_DATA(MCP_WAIT__MCP_FRB_MARK, PORT288_FN1), | 1427 | PINMUX_DATA(MCP_WAIT__MCP_FRB_MARK, PORT288_FN1), |
@@ -1516,16 +1538,29 @@ static pinmux_enum_t pinmux_data[] = { | |||
1516 | PINMUX_DATA(KEYIN6_PU_MARK, PORT72_FN2, PORT72_IN_PU), | 1538 | PINMUX_DATA(KEYIN6_PU_MARK, PORT72_FN2, PORT72_IN_PU), |
1517 | PINMUX_DATA(KEYIN7_PU_MARK, PORT73_FN2, PORT73_IN_PU), | 1539 | PINMUX_DATA(KEYIN7_PU_MARK, PORT73_FN2, PORT73_IN_PU), |
1518 | 1540 | ||
1519 | PINMUX_DATA(SDHID1_0_PU_MARK, PORT259_IN_PU, PORT259_FN1), | 1541 | PINMUX_DATA(SDHICD0_PU_MARK, PORT251_FN1, PORT251_IN_PU), |
1520 | PINMUX_DATA(SDHID1_1_PU_MARK, PORT260_IN_PU, PORT260_FN1), | 1542 | PINMUX_DATA(SDHID0_0_PU_MARK, PORT252_FN1, PORT252_IN_PU), |
1521 | PINMUX_DATA(SDHID1_2_PU_MARK, PORT261_IN_PU, PORT261_FN1), | 1543 | PINMUX_DATA(SDHID0_1_PU_MARK, PORT253_FN1, PORT253_IN_PU), |
1522 | PINMUX_DATA(SDHID1_3_PU_MARK, PORT262_IN_PU, PORT262_FN1), | 1544 | PINMUX_DATA(SDHID0_2_PU_MARK, PORT254_FN1, PORT254_IN_PU), |
1523 | PINMUX_DATA(SDHICMD1_PU_MARK, PORT263_IN_PU, PORT263_FN1), | 1545 | PINMUX_DATA(SDHID0_3_PU_MARK, PORT255_FN1, PORT255_IN_PU), |
1546 | PINMUX_DATA(SDHICMD0_PU_MARK, PORT256_FN1, PORT256_IN_PU), | ||
1547 | PINMUX_DATA(SDHIWP0_PU_MARK, PORT257_FN1, PORT256_IN_PU), | ||
1548 | PINMUX_DATA(SDHID1_0_PU_MARK, PORT259_FN1, PORT259_IN_PU), | ||
1549 | PINMUX_DATA(SDHID1_1_PU_MARK, PORT260_FN1, PORT260_IN_PU), | ||
1550 | PINMUX_DATA(SDHID1_2_PU_MARK, PORT261_FN1, PORT261_IN_PU), | ||
1551 | PINMUX_DATA(SDHID1_3_PU_MARK, PORT262_FN1, PORT262_IN_PU), | ||
1552 | PINMUX_DATA(SDHICMD1_PU_MARK, PORT263_FN1, PORT263_IN_PU), | ||
1553 | PINMUX_DATA(SDHID2_0_PU_MARK, PORT265_FN1, PORT265_IN_PU), | ||
1554 | PINMUX_DATA(SDHID2_1_PU_MARK, PORT266_FN1, PORT266_IN_PU), | ||
1555 | PINMUX_DATA(SDHID2_2_PU_MARK, PORT267_FN1, PORT267_IN_PU), | ||
1556 | PINMUX_DATA(SDHID2_3_PU_MARK, PORT268_FN1, PORT268_IN_PU), | ||
1557 | PINMUX_DATA(SDHICMD2_PU_MARK, PORT269_FN1, PORT269_IN_PU), | ||
1524 | 1558 | ||
1525 | PINMUX_DATA(MMCCMD0_PU_MARK, PORT279_FN1, PORT279_IN_PU, | 1559 | PINMUX_DATA(MMCCMD0_PU_MARK, PORT279_FN1, PORT279_IN_PU, |
1526 | MSEL4CR_MSEL15_0), | 1560 | MSEL4CR_MSEL15_0), |
1527 | PINMUX_DATA(MMCCMD1_PU_MARK, PORT297_FN2, PORT279_IN_PU, | 1561 | PINMUX_DATA(MMCCMD1_PU_MARK, PORT297_FN2, PORT297_IN_PU, |
1528 | MSEL4CR_MSEL15_1), | 1562 | MSEL4CR_MSEL15_1), |
1563 | PINMUX_DATA(FSIBISLD_PU_MARK, PORT39_FN1, PORT39_IN_PU), | ||
1529 | PINMUX_DATA(FSIACK_PU_MARK, PORT49_FN1, PORT49_IN_PU), | 1564 | PINMUX_DATA(FSIACK_PU_MARK, PORT49_FN1, PORT49_IN_PU), |
1530 | PINMUX_DATA(FSIAILR_PU_MARK, PORT50_FN5, PORT50_IN_PU), | 1565 | PINMUX_DATA(FSIAILR_PU_MARK, PORT50_FN5, PORT50_IN_PU), |
1531 | PINMUX_DATA(FSIAIBT_PU_MARK, PORT51_FN5, PORT51_IN_PU), | 1566 | PINMUX_DATA(FSIAIBT_PU_MARK, PORT51_FN5, PORT51_IN_PU), |
@@ -2181,11 +2216,23 @@ static struct pinmux_gpio pinmux_gpios[] = { | |||
2181 | GPIO_FN(KEYIN5_PU), | 2216 | GPIO_FN(KEYIN5_PU), |
2182 | GPIO_FN(KEYIN6_PU), | 2217 | GPIO_FN(KEYIN6_PU), |
2183 | GPIO_FN(KEYIN7_PU), | 2218 | GPIO_FN(KEYIN7_PU), |
2219 | GPIO_FN(SDHICD0_PU), | ||
2220 | GPIO_FN(SDHID0_0_PU), | ||
2221 | GPIO_FN(SDHID0_1_PU), | ||
2222 | GPIO_FN(SDHID0_2_PU), | ||
2223 | GPIO_FN(SDHID0_3_PU), | ||
2224 | GPIO_FN(SDHICMD0_PU), | ||
2225 | GPIO_FN(SDHIWP0_PU), | ||
2184 | GPIO_FN(SDHID1_0_PU), | 2226 | GPIO_FN(SDHID1_0_PU), |
2185 | GPIO_FN(SDHID1_1_PU), | 2227 | GPIO_FN(SDHID1_1_PU), |
2186 | GPIO_FN(SDHID1_2_PU), | 2228 | GPIO_FN(SDHID1_2_PU), |
2187 | GPIO_FN(SDHID1_3_PU), | 2229 | GPIO_FN(SDHID1_3_PU), |
2188 | GPIO_FN(SDHICMD1_PU), | 2230 | GPIO_FN(SDHICMD1_PU), |
2231 | GPIO_FN(SDHID2_0_PU), | ||
2232 | GPIO_FN(SDHID2_1_PU), | ||
2233 | GPIO_FN(SDHID2_2_PU), | ||
2234 | GPIO_FN(SDHID2_3_PU), | ||
2235 | GPIO_FN(SDHICMD2_PU), | ||
2189 | GPIO_FN(MMCCMD0_PU), | 2236 | GPIO_FN(MMCCMD0_PU), |
2190 | GPIO_FN(MMCCMD1_PU), | 2237 | GPIO_FN(MMCCMD1_PU), |
2191 | GPIO_FN(FSIACK_PU), | 2238 | GPIO_FN(FSIACK_PU), |