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-rw-r--r--arch/arm/mach-shmobile/board-bockw.c159
1 files changed, 153 insertions, 6 deletions
diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
index 7ed2401b899c..d5554646916c 100644
--- a/arch/arm/mach-shmobile/board-bockw.c
+++ b/arch/arm/mach-shmobile/board-bockw.c
@@ -18,14 +18,52 @@
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */ 19 */
20 20
21#include <linux/mfd/tmio.h>
22#include <linux/mmc/host.h>
23#include <linux/mtd/partitions.h>
21#include <linux/pinctrl/machine.h> 24#include <linux/pinctrl/machine.h>
22#include <linux/platform_device.h> 25#include <linux/platform_device.h>
26#include <linux/regulator/fixed.h>
27#include <linux/regulator/machine.h>
23#include <linux/smsc911x.h> 28#include <linux/smsc911x.h>
29#include <linux/spi/spi.h>
30#include <linux/spi/flash.h>
24#include <mach/common.h> 31#include <mach/common.h>
25#include <mach/irqs.h> 32#include <mach/irqs.h>
26#include <mach/r8a7778.h> 33#include <mach/r8a7778.h>
27#include <asm/mach/arch.h> 34#include <asm/mach/arch.h>
28 35
36/*
37 * CN9(Upper side) SCIF/RCAN selection
38 *
39 * 1,4 3,6
40 * SW40 SCIF RCAN
41 * SW41 SCIF RCAN
42 */
43
44/*
45 * MMC (CN26) pin
46 *
47 * SW6 (D2) 3 pin
48 * SW7 (D5) ON
49 * SW8 (D3) 3 pin
50 * SW10 (D4) 1 pin
51 * SW12 (CLK) 1 pin
52 * SW13 (D6) 3 pin
53 * SW14 (CMD) ON
54 * SW15 (D6) 1 pin
55 * SW16 (D0) ON
56 * SW17 (D1) ON
57 * SW18 (D7) 3 pin
58 * SW19 (MMC) 1 pin
59 */
60
61/* Dummy supplies, where voltage doesn't matter */
62static struct regulator_consumer_supply dummy_supplies[] = {
63 REGULATOR_SUPPLY("vddvario", "smsc911x"),
64 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
65};
66
29static struct smsc911x_platform_config smsc911x_data = { 67static struct smsc911x_platform_config smsc911x_data = {
30 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, 68 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
31 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, 69 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
@@ -38,36 +76,128 @@ static struct resource smsc911x_resources[] = {
38 DEFINE_RES_IRQ(irq_pin(0)), /* IRQ 0 */ 76 DEFINE_RES_IRQ(irq_pin(0)), /* IRQ 0 */
39}; 77};
40 78
79/* USB */
41static struct rcar_phy_platform_data usb_phy_platform_data __initdata; 80static struct rcar_phy_platform_data usb_phy_platform_data __initdata;
42 81
82/* SDHI */
83static struct sh_mobile_sdhi_info sdhi0_info = {
84 .tmio_caps = MMC_CAP_SD_HIGHSPEED,
85 .tmio_ocr_mask = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
86 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
87};
88
89static struct sh_eth_plat_data ether_platform_data __initdata = {
90 .phy = 0x01,
91 .edmac_endian = EDMAC_LITTLE_ENDIAN,
92 .register_type = SH_ETH_REG_FAST_RCAR,
93 .phy_interface = PHY_INTERFACE_MODE_RMII,
94 /*
95 * Although the LINK signal is available on the board, it's connected to
96 * the link/activity LED output of the PHY, thus the link disappears and
97 * reappears after each packet. We'd be better off ignoring such signal
98 * and getting the link state from the PHY indirectly.
99 */
100 .no_ether_link = 1,
101};
102
103/* I2C */
104static struct i2c_board_info i2c0_devices[] = {
105 {
106 I2C_BOARD_INFO("rx8581", 0x51),
107 },
108};
109
110/* HSPI*/
111static struct mtd_partition m25p80_spi_flash_partitions[] = {
112 {
113 .name = "data(spi)",
114 .size = 0x0100000,
115 .offset = 0,
116 },
117};
118
119static struct flash_platform_data spi_flash_data = {
120 .name = "m25p80",
121 .type = "s25fl008k",
122 .parts = m25p80_spi_flash_partitions,
123 .nr_parts = ARRAY_SIZE(m25p80_spi_flash_partitions),
124};
125
126static struct spi_board_info spi_board_info[] __initdata = {
127 {
128 .modalias = "m25p80",
129 .max_speed_hz = 104000000,
130 .chip_select = 0,
131 .bus_num = 0,
132 .mode = SPI_MODE_0,
133 .platform_data = &spi_flash_data,
134 },
135};
136
137/* MMC */
138static struct sh_mmcif_plat_data sh_mmcif_plat = {
139 .sup_pclk = 0,
140 .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
141 .caps = MMC_CAP_4_BIT_DATA |
142 MMC_CAP_8_BIT_DATA |
143 MMC_CAP_NEEDS_POLL,
144};
145
43static const struct pinctrl_map bockw_pinctrl_map[] = { 146static const struct pinctrl_map bockw_pinctrl_map[] = {
147 /* Ether */
148 PIN_MAP_MUX_GROUP_DEFAULT("r8a777x-ether", "pfc-r8a7778",
149 "ether_rmii", "ether"),
150 /* HSPI0 */
151 PIN_MAP_MUX_GROUP_DEFAULT("sh-hspi.0", "pfc-r8a7778",
152 "hspi0_a", "hspi0"),
153 /* MMC */
154 PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif", "pfc-r8a7778",
155 "mmc_data8", "mmc"),
156 PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif", "pfc-r8a7778",
157 "mmc_ctrl", "mmc"),
44 /* SCIF0 */ 158 /* SCIF0 */
45 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778", 159 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
46 "scif0_data_a", "scif0"), 160 "scif0_data_a", "scif0"),
47 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778", 161 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
48 "scif0_ctrl", "scif0"), 162 "scif0_ctrl", "scif0"),
163 /* USB */
49 PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform", "pfc-r8a7778", 164 PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform", "pfc-r8a7778",
50 "usb0", "usb0"), 165 "usb0", "usb0"),
51 PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform", "pfc-r8a7778", 166 PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform", "pfc-r8a7778",
52 "usb1", "usb1"), 167 "usb1", "usb1"),
168 /* SDHI0 */
169 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
170 "sdhi0", "sdhi0"),
53}; 171};
54 172
173#define FPGA 0x18200000
55#define IRQ0MR 0x30 174#define IRQ0MR 0x30
175#define PFC 0xfffc0000
176#define PUPR4 0x110
56static void __init bockw_init(void) 177static void __init bockw_init(void)
57{ 178{
58 void __iomem *fpga; 179 void __iomem *base;
59 180
60 r8a7778_clock_init(); 181 r8a7778_clock_init();
61 r8a7778_init_irq_extpin(1); 182 r8a7778_init_irq_extpin(1);
62 r8a7778_add_standard_devices(); 183 r8a7778_add_standard_devices();
63 r8a7778_add_usb_phy_device(&usb_phy_platform_data); 184 r8a7778_add_usb_phy_device(&usb_phy_platform_data);
185 r8a7778_add_ether_device(&ether_platform_data);
186 r8a7778_add_i2c_device(0);
187 r8a7778_add_hspi_device(0);
188 r8a7778_add_mmc_device(&sh_mmcif_plat);
64 189
190 i2c_register_board_info(0, i2c0_devices,
191 ARRAY_SIZE(i2c0_devices));
192 spi_register_board_info(spi_board_info,
193 ARRAY_SIZE(spi_board_info));
65 pinctrl_register_mappings(bockw_pinctrl_map, 194 pinctrl_register_mappings(bockw_pinctrl_map,
66 ARRAY_SIZE(bockw_pinctrl_map)); 195 ARRAY_SIZE(bockw_pinctrl_map));
67 r8a7778_pinmux_init(); 196 r8a7778_pinmux_init();
68 197
69 fpga = ioremap_nocache(0x18200000, SZ_1M); 198 /* for SMSC */
70 if (fpga) { 199 base = ioremap_nocache(FPGA, SZ_1M);
200 if (base) {
71 /* 201 /*
72 * CAUTION 202 * CAUTION
73 * 203 *
@@ -75,16 +205,33 @@ static void __init bockw_init(void)
75 * it should be cared in the future 205 * it should be cared in the future
76 * Now, it is assuming IRQ0 was used only from SMSC. 206 * Now, it is assuming IRQ0 was used only from SMSC.
77 */ 207 */
78 u16 val = ioread16(fpga + IRQ0MR); 208 u16 val = ioread16(base + IRQ0MR);
79 val &= ~(1 << 4); /* enable SMSC911x */ 209 val &= ~(1 << 4); /* enable SMSC911x */
80 iowrite16(val, fpga + IRQ0MR); 210 iowrite16(val, base + IRQ0MR);
81 iounmap(fpga); 211 iounmap(base);
212
213 regulator_register_fixed(0, dummy_supplies,
214 ARRAY_SIZE(dummy_supplies));
82 215
83 platform_device_register_resndata( 216 platform_device_register_resndata(
84 &platform_bus, "smsc911x", -1, 217 &platform_bus, "smsc911x", -1,
85 smsc911x_resources, ARRAY_SIZE(smsc911x_resources), 218 smsc911x_resources, ARRAY_SIZE(smsc911x_resources),
86 &smsc911x_data, sizeof(smsc911x_data)); 219 &smsc911x_data, sizeof(smsc911x_data));
87 } 220 }
221
222 /* for SDHI */
223 base = ioremap_nocache(PFC, 0x200);
224 if (base) {
225 /*
226 * FIXME
227 *
228 * SDHI CD/WP pin needs pull-up
229 */
230 iowrite32(ioread32(base + PUPR4) | (3 << 26), base + PUPR4);
231 iounmap(base);
232
233 r8a7778_sdhi_init(0, &sdhi0_info);
234 }
88} 235}
89 236
90static const char *bockw_boards_compat_dt[] __initdata = { 237static const char *bockw_boards_compat_dt[] __initdata = {