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-rw-r--r--arch/arm/mach-sa1100/time.c72
1 files changed, 34 insertions, 38 deletions
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c
index 80702c9ecc77..934db6385cd6 100644
--- a/arch/arm/mach-sa1100/time.c
+++ b/arch/arm/mach-sa1100/time.c
@@ -69,12 +69,45 @@ sa1100_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *c)
69 } 69 }
70} 70}
71 71
72#ifdef CONFIG_PM
73unsigned long osmr[4], oier;
74
75static void sa1100_timer_suspend(struct clock_event_device *cedev)
76{
77 osmr[0] = readl_relaxed(OSMR0);
78 osmr[1] = readl_relaxed(OSMR1);
79 osmr[2] = readl_relaxed(OSMR2);
80 osmr[3] = readl_relaxed(OSMR3);
81 oier = readl_relaxed(OIER);
82}
83
84static void sa1100_timer_resume(struct clock_event_device *cedev)
85{
86 writel_relaxed(0x0f, OSSR);
87 writel_relaxed(osmr[0], OSMR0);
88 writel_relaxed(osmr[1], OSMR1);
89 writel_relaxed(osmr[2], OSMR2);
90 writel_relaxed(osmr[3], OSMR3);
91 writel_relaxed(oier, OIER);
92
93 /*
94 * OSMR0 is the system timer: make sure OSCR is sufficiently behind
95 */
96 writel_relaxed(OSMR0 - LATCH, OSCR);
97}
98#else
99#define sa1100_timer_suspend NULL
100#define sa1100_timer_resume NULL
101#endif
102
72static struct clock_event_device ckevt_sa1100_osmr0 = { 103static struct clock_event_device ckevt_sa1100_osmr0 = {
73 .name = "osmr0", 104 .name = "osmr0",
74 .features = CLOCK_EVT_FEAT_ONESHOT, 105 .features = CLOCK_EVT_FEAT_ONESHOT,
75 .rating = 200, 106 .rating = 200,
76 .set_next_event = sa1100_osmr0_set_next_event, 107 .set_next_event = sa1100_osmr0_set_next_event,
77 .set_mode = sa1100_osmr0_set_mode, 108 .set_mode = sa1100_osmr0_set_mode,
109 .suspend = sa1100_timer_suspend,
110 .resume = sa1100_timer_resume,
78}; 111};
79 112
80static struct irqaction sa1100_timer_irq = { 113static struct irqaction sa1100_timer_irq = {
@@ -84,7 +117,7 @@ static struct irqaction sa1100_timer_irq = {
84 .dev_id = &ckevt_sa1100_osmr0, 117 .dev_id = &ckevt_sa1100_osmr0,
85}; 118};
86 119
87static void __init sa1100_timer_init(void) 120void __init sa1100_timer_init(void)
88{ 121{
89 writel_relaxed(0, OIER); 122 writel_relaxed(0, OIER);
90 writel_relaxed(OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3, OSSR); 123 writel_relaxed(OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3, OSSR);
@@ -104,40 +137,3 @@ static void __init sa1100_timer_init(void)
104 clocksource_mmio_readl_up); 137 clocksource_mmio_readl_up);
105 clockevents_register_device(&ckevt_sa1100_osmr0); 138 clockevents_register_device(&ckevt_sa1100_osmr0);
106} 139}
107
108#ifdef CONFIG_PM
109unsigned long osmr[4], oier;
110
111static void sa1100_timer_suspend(void)
112{
113 osmr[0] = readl_relaxed(OSMR0);
114 osmr[1] = readl_relaxed(OSMR1);
115 osmr[2] = readl_relaxed(OSMR2);
116 osmr[3] = readl_relaxed(OSMR3);
117 oier = readl_relaxed(OIER);
118}
119
120static void sa1100_timer_resume(void)
121{
122 writel_relaxed(0x0f, OSSR);
123 writel_relaxed(osmr[0], OSMR0);
124 writel_relaxed(osmr[1], OSMR1);
125 writel_relaxed(osmr[2], OSMR2);
126 writel_relaxed(osmr[3], OSMR3);
127 writel_relaxed(oier, OIER);
128
129 /*
130 * OSMR0 is the system timer: make sure OSCR is sufficiently behind
131 */
132 writel_relaxed(OSMR0 - LATCH, OSCR);
133}
134#else
135#define sa1100_timer_suspend NULL
136#define sa1100_timer_resume NULL
137#endif
138
139struct sys_timer sa1100_timer = {
140 .init = sa1100_timer_init,
141 .suspend = sa1100_timer_suspend,
142 .resume = sa1100_timer_resume,
143};