diff options
Diffstat (limited to 'arch/arm/mach-sa1100/cpu-sa1110.c')
-rw-r--r-- | arch/arm/mach-sa1100/cpu-sa1110.c | 57 |
1 files changed, 33 insertions, 24 deletions
diff --git a/arch/arm/mach-sa1100/cpu-sa1110.c b/arch/arm/mach-sa1100/cpu-sa1110.c index 7252874d328b..675bf8ef97e8 100644 --- a/arch/arm/mach-sa1100/cpu-sa1110.c +++ b/arch/arm/mach-sa1100/cpu-sa1110.c | |||
@@ -16,28 +16,24 @@ | |||
16 | * | 16 | * |
17 | * The SDRAM type can be passed on the command line as cpu_sa1110.sdram=type | 17 | * The SDRAM type can be passed on the command line as cpu_sa1110.sdram=type |
18 | */ | 18 | */ |
19 | #include <linux/moduleparam.h> | ||
20 | #include <linux/types.h> | ||
21 | #include <linux/kernel.h> | ||
22 | #include <linux/sched.h> | ||
23 | #include <linux/cpufreq.h> | 19 | #include <linux/cpufreq.h> |
24 | #include <linux/delay.h> | 20 | #include <linux/delay.h> |
25 | #include <linux/init.h> | 21 | #include <linux/init.h> |
26 | #include <linux/io.h> | 22 | #include <linux/kernel.h> |
23 | #include <linux/moduleparam.h> | ||
24 | #include <linux/types.h> | ||
27 | 25 | ||
28 | #include <mach/hardware.h> | ||
29 | #include <asm/cputype.h> | 26 | #include <asm/cputype.h> |
30 | #include <asm/mach-types.h> | 27 | #include <asm/mach-types.h> |
31 | #include <asm/system.h> | 28 | |
29 | #include <mach/hardware.h> | ||
32 | 30 | ||
33 | #include "generic.h" | 31 | #include "generic.h" |
34 | 32 | ||
35 | #undef DEBUG | 33 | #undef DEBUG |
36 | 34 | ||
37 | static struct cpufreq_driver sa1110_driver; | ||
38 | |||
39 | struct sdram_params { | 35 | struct sdram_params { |
40 | const char name[16]; | 36 | const char name[20]; |
41 | u_char rows; /* bits */ | 37 | u_char rows; /* bits */ |
42 | u_char cas_latency; /* cycles */ | 38 | u_char cas_latency; /* cycles */ |
43 | u_char tck; /* clock cycle time (ns) */ | 39 | u_char tck; /* clock cycle time (ns) */ |
@@ -107,6 +103,15 @@ static struct sdram_params sdram_tbl[] __initdata = { | |||
107 | .twr = 8, | 103 | .twr = 8, |
108 | .refresh = 64000, | 104 | .refresh = 64000, |
109 | .cas_latency = 3, | 105 | .cas_latency = 3, |
106 | }, { /* Micron MT48LC8M16A2TG-75 */ | ||
107 | .name = "MT48LC8M16A2TG-75", | ||
108 | .rows = 12, | ||
109 | .tck = 8, | ||
110 | .trcd = 20, | ||
111 | .trp = 20, | ||
112 | .twr = 8, | ||
113 | .refresh = 64000, | ||
114 | .cas_latency = 3, | ||
110 | }, | 115 | }, |
111 | }; | 116 | }; |
112 | 117 | ||
@@ -180,11 +185,13 @@ sdram_calculate_timing(struct sdram_info *sd, u_int cpu_khz, | |||
180 | sd->mdrefr |= MDREFR_K1DB2; | 185 | sd->mdrefr |= MDREFR_K1DB2; |
181 | 186 | ||
182 | /* initial number of '1's in MDCAS + 1 */ | 187 | /* initial number of '1's in MDCAS + 1 */ |
183 | set_mdcas(sd->mdcas, sd_khz >= 62000, ns_to_cycles(sdram->trcd, mem_khz)); | 188 | set_mdcas(sd->mdcas, sd_khz >= 62000, |
189 | ns_to_cycles(sdram->trcd, mem_khz)); | ||
184 | 190 | ||
185 | #ifdef DEBUG | 191 | #ifdef DEBUG |
186 | printk("MDCNFG: %08x MDREFR: %08x MDCAS0: %08x MDCAS1: %08x MDCAS2: %08x\n", | 192 | printk(KERN_DEBUG "MDCNFG: %08x MDREFR: %08x MDCAS0: %08x MDCAS1: %08x MDCAS2: %08x\n", |
187 | sd->mdcnfg, sd->mdrefr, sd->mdcas[0], sd->mdcas[1], sd->mdcas[2]); | 193 | sd->mdcnfg, sd->mdrefr, sd->mdcas[0], sd->mdcas[1], |
194 | sd->mdcas[2]); | ||
188 | #endif | 195 | #endif |
189 | } | 196 | } |
190 | 197 | ||
@@ -213,7 +220,7 @@ sdram_update_refresh(u_int cpu_khz, struct sdram_params *sdram) | |||
213 | 220 | ||
214 | #ifdef DEBUG | 221 | #ifdef DEBUG |
215 | mdelay(250); | 222 | mdelay(250); |
216 | printk("new dri value = %d\n", dri); | 223 | printk(KERN_DEBUG "new dri value = %d\n", dri); |
217 | #endif | 224 | #endif |
218 | 225 | ||
219 | sdram_set_refresh(dri); | 226 | sdram_set_refresh(dri); |
@@ -232,7 +239,7 @@ static int sa1110_target(struct cpufreq_policy *policy, | |||
232 | unsigned long flags; | 239 | unsigned long flags; |
233 | unsigned int ppcr, unused; | 240 | unsigned int ppcr, unused; |
234 | 241 | ||
235 | switch(relation){ | 242 | switch (relation) { |
236 | case CPUFREQ_RELATION_L: | 243 | case CPUFREQ_RELATION_L: |
237 | ppcr = sa11x0_freq_to_ppcr(target_freq); | 244 | ppcr = sa11x0_freq_to_ppcr(target_freq); |
238 | if (sa11x0_ppcr_to_freq(ppcr) > policy->max) | 245 | if (sa11x0_ppcr_to_freq(ppcr) > policy->max) |
@@ -280,11 +287,10 @@ static int sa1110_target(struct cpufreq_policy *policy, | |||
280 | * We wait 20ms to be safe. | 287 | * We wait 20ms to be safe. |
281 | */ | 288 | */ |
282 | sdram_set_refresh(2); | 289 | sdram_set_refresh(2); |
283 | if (!irqs_disabled()) { | 290 | if (!irqs_disabled()) |
284 | msleep(20); | 291 | msleep(20); |
285 | } else { | 292 | else |
286 | mdelay(20); | 293 | mdelay(20); |
287 | } | ||
288 | 294 | ||
289 | /* | 295 | /* |
290 | * Reprogram the DRAM timings with interrupts disabled, and | 296 | * Reprogram the DRAM timings with interrupts disabled, and |
@@ -295,7 +301,7 @@ static int sa1110_target(struct cpufreq_policy *policy, | |||
295 | local_irq_save(flags); | 301 | local_irq_save(flags); |
296 | asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)); | 302 | asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)); |
297 | udelay(10); | 303 | udelay(10); |
298 | __asm__ __volatile__(" \n\ | 304 | __asm__ __volatile__("\n\ |
299 | b 2f \n\ | 305 | b 2f \n\ |
300 | .align 5 \n\ | 306 | .align 5 \n\ |
301 | 1: str %3, [%1, #0] @ MDCNFG \n\ | 307 | 1: str %3, [%1, #0] @ MDCNFG \n\ |
@@ -336,7 +342,9 @@ static int __init sa1110_cpu_init(struct cpufreq_policy *policy) | |||
336 | return 0; | 342 | return 0; |
337 | } | 343 | } |
338 | 344 | ||
339 | static struct cpufreq_driver sa1110_driver = { | 345 | /* sa1110_driver needs __refdata because it must remain after init registers |
346 | * it with cpufreq_register_driver() */ | ||
347 | static struct cpufreq_driver sa1110_driver __refdata = { | ||
340 | .flags = CPUFREQ_STICKY, | 348 | .flags = CPUFREQ_STICKY, |
341 | .verify = sa11x0_verify_speed, | 349 | .verify = sa11x0_verify_speed, |
342 | .target = sa1110_target, | 350 | .target = sa1110_target, |
@@ -349,7 +357,8 @@ static struct sdram_params *sa1110_find_sdram(const char *name) | |||
349 | { | 357 | { |
350 | struct sdram_params *sdram; | 358 | struct sdram_params *sdram; |
351 | 359 | ||
352 | for (sdram = sdram_tbl; sdram < sdram_tbl + ARRAY_SIZE(sdram_tbl); sdram++) | 360 | for (sdram = sdram_tbl; sdram < sdram_tbl + ARRAY_SIZE(sdram_tbl); |
361 | sdram++) | ||
353 | if (strcmp(name, sdram->name) == 0) | 362 | if (strcmp(name, sdram->name) == 0) |
354 | return sdram; | 363 | return sdram; |
355 | 364 | ||
@@ -369,14 +378,14 @@ static int __init sa1110_clk_init(void) | |||
369 | if (!name[0]) { | 378 | if (!name[0]) { |
370 | if (machine_is_assabet()) | 379 | if (machine_is_assabet()) |
371 | name = "TC59SM716-CL3"; | 380 | name = "TC59SM716-CL3"; |
372 | |||
373 | if (machine_is_pt_system3()) | 381 | if (machine_is_pt_system3()) |
374 | name = "K4S641632D"; | 382 | name = "K4S641632D"; |
375 | |||
376 | if (machine_is_h3100()) | 383 | if (machine_is_h3100()) |
377 | name = "KM416S4030CT"; | 384 | name = "KM416S4030CT"; |
378 | if (machine_is_jornada720()) | 385 | if (machine_is_jornada720()) |
379 | name = "K4S281632B-1H"; | 386 | name = "K4S281632B-1H"; |
387 | if (machine_is_nanoengine()) | ||
388 | name = "MT48LC8M16A2TG-75"; | ||
380 | } | 389 | } |
381 | 390 | ||
382 | sdram = sa1110_find_sdram(name); | 391 | sdram = sa1110_find_sdram(name); |