1 files changed, 9 insertions, 0 deletions

diff --git a/arch/arm/mach-s5pv310/cpu.c b/arch/arm/mach-s5pv310/cpu.c
index 7b6e066e2271..9900464082db 100644
--- a/arch/arm/mach-s5pv310/cpu.c
+++ b/arch/arm/mach-s5pv310/cpu.c
@@ -132,6 +132,15 @@ void __init s5pv310_init_irq(void)
         gic_cpu_init(0, S5P_VA_GIC_CPU);
 
         for (irq = 0; irq < MAX_COMBINER_NR; irq++) {
+
+                /*
+                 * From SPI(0) to SPI(39) and SPI(51), SPI(53) are
+                 * connected to the interrupt combiner. These irqs
+                 * should be initialized to support cascade interrupt.
+                 */
+                if ((irq >= 40) && !(irq == 51) && !(irq == 53))
+                        continue;
+
                 combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq),
                                 COMBINER_IRQ(irq, 0));
                 combiner_cascade_irq(irq, IRQ_SPI(irq));