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-rw-r--r--arch/arm/mach-s5pv210/Kconfig62
-rw-r--r--arch/arm/mach-s5pv210/Makefile10
-rw-r--r--arch/arm/mach-s5pv210/cpu.c16
-rw-r--r--arch/arm/mach-s5pv210/dev-onenand.c50
-rw-r--r--arch/arm/mach-s5pv210/dev-spi.c178
-rw-r--r--arch/arm/mach-s5pv210/include/mach/irqs.h36
-rw-r--r--arch/arm/mach-s5pv210/include/mach/map.h26
-rw-r--r--arch/arm/mach-s5pv210/include/mach/regs-clock.h1
-rw-r--r--arch/arm/mach-s5pv210/include/mach/regs-fb.h21
-rw-r--r--arch/arm/mach-s5pv210/include/mach/regs-gpio.h44
-rw-r--r--arch/arm/mach-s5pv210/include/mach/spi-clocks.h17
-rw-r--r--arch/arm/mach-s5pv210/mach-aquila.c149
-rw-r--r--arch/arm/mach-s5pv210/mach-goni.c98
-rw-r--r--arch/arm/mach-s5pv210/mach-smdkc110.c1
-rw-r--r--arch/arm/mach-s5pv210/mach-smdkv210.c12
-rw-r--r--arch/arm/mach-s5pv210/setup-fb-24bpp.c62
-rw-r--r--arch/arm/mach-s5pv210/setup-i2c0.c9
-rw-r--r--arch/arm/mach-s5pv210/setup-i2c1.c30
-rw-r--r--arch/arm/mach-s5pv210/setup-i2c2.c30
-rw-r--r--arch/arm/mach-s5pv210/setup-sdhci-gpio.c104
-rw-r--r--arch/arm/mach-s5pv210/setup-sdhci.c63
21 files changed, 991 insertions, 28 deletions
diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig
index 7601c28e240b..0761eac9aaea 100644
--- a/arch/arm/mach-s5pv210/Kconfig
+++ b/arch/arm/mach-s5pv210/Kconfig
@@ -13,18 +13,68 @@ config CPU_S5PV210
13 bool 13 bool
14 select PLAT_S5P 14 select PLAT_S5P
15 select S3C_PL330_DMA 15 select S3C_PL330_DMA
16 select S5P_EXT_INT
16 help 17 help
17 Enable S5PV210 CPU support 18 Enable S5PV210 CPU support
18 19
19choice 20config S5PV210_SETUP_I2C1
20 prompt "Select machine type" 21 bool
21 depends on ARCH_S5PV210 22 help
22 default MACH_SMDKV210 23 Common setup code for i2c bus 1.
24
25config S5PV210_SETUP_I2C2
26 bool
27 help
28 Common setup code for i2c bus 2.
29
30config S5PV210_SETUP_FB_24BPP
31 bool
32 help
33 Common setup code for S5PV210 with an 24bpp RGB display helper.
34
35config S5PV210_SETUP_SDHCI
36 bool
37 select S5PV210_SETUP_SDHCI_GPIO
38 help
39 Internal helper functions for S5PV210 based SDHCI systems
40
41config S5PV210_SETUP_SDHCI_GPIO
42 bool
43 help
44 Common setup code for SDHCI gpio.
45
46# machine support
47
48config MACH_AQUILA
49 bool "Samsung Aquila"
50 select CPU_S5PV210
51 select ARCH_SPARSEMEM_ENABLE
52 select S5PV210_SETUP_FB_24BPP
53 select S3C_DEV_FB
54 help
55 Machine support for the Samsung Aquila target based on S5PC110 SoC
56
57config MACH_GONI
58 bool "GONI"
59 select CPU_S5PV210
60 select ARCH_SPARSEMEM_ENABLE
61 help
62 Machine support for Samsung GONI board
63 S5PC110(MCP) is one of package option of S5PV210
64
65config S5PC110_DEV_ONENAND
66 bool
67 help
68 Compile in platform device definition for OneNAND1 controller
23 69
24config MACH_SMDKV210 70config MACH_SMDKV210
25 bool "SMDKV210" 71 bool "SMDKV210"
26 select CPU_S5PV210 72 select CPU_S5PV210
27 select ARCH_SPARSEMEM_ENABLE 73 select ARCH_SPARSEMEM_ENABLE
74 select SAMSUNG_DEV_ADC
75 select SAMSUNG_DEV_TS
76 select S3C_DEV_WDT
77 select HAVE_S3C2410_WATCHDOG
28 help 78 help
29 Machine support for Samsung SMDKV210 79 Machine support for Samsung SMDKV210
30 80
@@ -32,10 +82,10 @@ config MACH_SMDKC110
32 bool "SMDKC110" 82 bool "SMDKC110"
33 select CPU_S5PV210 83 select CPU_S5PV210
34 select ARCH_SPARSEMEM_ENABLE 84 select ARCH_SPARSEMEM_ENABLE
85 select S3C_DEV_WDT
86 select HAVE_S3C2410_WATCHDOG
35 help 87 help
36 Machine support for Samsung SMDKC110 88 Machine support for Samsung SMDKC110
37 S5PC110(MCP) is one of package option of S5PV210 89 S5PC110(MCP) is one of package option of S5PV210
38 90
39endchoice
40
41endif 91endif
diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile
index 99827813d293..30be9a6a4620 100644
--- a/arch/arm/mach-s5pv210/Makefile
+++ b/arch/arm/mach-s5pv210/Makefile
@@ -17,9 +17,19 @@ obj-$(CONFIG_CPU_S5PV210) += setup-i2c0.o
17 17
18# machine support 18# machine support
19 19
20obj-$(CONFIG_MACH_AQUILA) += mach-aquila.o
20obj-$(CONFIG_MACH_SMDKV210) += mach-smdkv210.o 21obj-$(CONFIG_MACH_SMDKV210) += mach-smdkv210.o
21obj-$(CONFIG_MACH_SMDKC110) += mach-smdkc110.o 22obj-$(CONFIG_MACH_SMDKC110) += mach-smdkc110.o
23obj-$(CONFIG_MACH_GONI) += mach-goni.o
22 24
23# device support 25# device support
24 26
25obj-y += dev-audio.o 27obj-y += dev-audio.o
28obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o
29obj-$(CONFIG_S5PC110_DEV_ONENAND) += dev-onenand.o
30
31obj-$(CONFIG_S5PV210_SETUP_FB_24BPP) += setup-fb-24bpp.o
32obj-$(CONFIG_S5PV210_SETUP_I2C1) += setup-i2c1.o
33obj-$(CONFIG_S5PV210_SETUP_I2C2) += setup-i2c2.o
34obj-$(CONFIG_S5PV210_SETUP_SDHCI) += setup-sdhci.o
35obj-$(CONFIG_S5PV210_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
diff --git a/arch/arm/mach-s5pv210/cpu.c b/arch/arm/mach-s5pv210/cpu.c
index 2b776eb5d150..411a4a9cbfc7 100644
--- a/arch/arm/mach-s5pv210/cpu.c
+++ b/arch/arm/mach-s5pv210/cpu.c
@@ -32,6 +32,8 @@
32#include <plat/devs.h> 32#include <plat/devs.h>
33#include <plat/clock.h> 33#include <plat/clock.h>
34#include <plat/s5pv210.h> 34#include <plat/s5pv210.h>
35#include <plat/iic-core.h>
36#include <plat/sdhci.h>
35 37
36/* Initial IO mappings */ 38/* Initial IO mappings */
37 39
@@ -74,7 +76,21 @@ static void s5pv210_idle(void)
74 76
75void __init s5pv210_map_io(void) 77void __init s5pv210_map_io(void)
76{ 78{
79#ifdef CONFIG_S3C_DEV_ADC
80 s3c_device_adc.name = "s3c64xx-adc";
81#endif
82
77 iotable_init(s5pv210_iodesc, ARRAY_SIZE(s5pv210_iodesc)); 83 iotable_init(s5pv210_iodesc, ARRAY_SIZE(s5pv210_iodesc));
84
85 /* initialise device information early */
86 s5pv210_default_sdhci0();
87 s5pv210_default_sdhci1();
88 s5pv210_default_sdhci2();
89
90 /* the i2c devices are directly compatible with s3c2440 */
91 s3c_i2c0_setname("s3c2440-i2c");
92 s3c_i2c1_setname("s3c2440-i2c");
93 s3c_i2c2_setname("s3c2440-i2c");
78} 94}
79 95
80void __init s5pv210_init_clocks(int xtal) 96void __init s5pv210_init_clocks(int xtal)
diff --git a/arch/arm/mach-s5pv210/dev-onenand.c b/arch/arm/mach-s5pv210/dev-onenand.c
new file mode 100644
index 000000000000..34997b752f93
--- /dev/null
+++ b/arch/arm/mach-s5pv210/dev-onenand.c
@@ -0,0 +1,50 @@
1/*
2 * linux/arch/arm/mach-s5pv210/dev-onenand.c
3 *
4 * Copyright (c) 2008-2010 Samsung Electronics
5 * Kyungmin Park <kyungmin.park@samsung.com>
6 *
7 * S5PC110 series device definition for OneNAND devices
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/kernel.h>
15#include <linux/platform_device.h>
16#include <linux/mtd/mtd.h>
17#include <linux/mtd/onenand.h>
18
19#include <mach/irqs.h>
20#include <mach/map.h>
21
22static struct resource s5pc110_onenand_resources[] = {
23 [0] = {
24 .start = S5PC110_PA_ONENAND,
25 .end = S5PC110_PA_ONENAND + SZ_128K - 1,
26 .flags = IORESOURCE_MEM,
27 },
28 [1] = {
29 .start = S5PC110_PA_ONENAND_DMA,
30 .end = S5PC110_PA_ONENAND_DMA + SZ_2K - 1,
31 .flags = IORESOURCE_MEM,
32 },
33};
34
35struct platform_device s5pc110_device_onenand = {
36 .name = "s5pc110-onenand",
37 .id = -1,
38 .num_resources = ARRAY_SIZE(s5pc110_onenand_resources),
39 .resource = s5pc110_onenand_resources,
40};
41
42void s5pc110_onenand_set_platdata(struct onenand_platform_data *pdata)
43{
44 struct onenand_platform_data *pd;
45
46 pd = kmemdup(pdata, sizeof(struct onenand_platform_data), GFP_KERNEL);
47 if (!pd)
48 printk(KERN_ERR "%s: no memory for platform data\n", __func__);
49 s5pc110_device_onenand.dev.platform_data = pd;
50}
diff --git a/arch/arm/mach-s5pv210/dev-spi.c b/arch/arm/mach-s5pv210/dev-spi.c
new file mode 100644
index 000000000000..337a62b57a0b
--- /dev/null
+++ b/arch/arm/mach-s5pv210/dev-spi.c
@@ -0,0 +1,178 @@
1/* linux/arch/arm/mach-s5pv210/dev-spi.c
2 *
3 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
4 * Jaswinder Singh <jassi.brar@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/platform_device.h>
12#include <linux/dma-mapping.h>
13
14#include <mach/dma.h>
15#include <mach/map.h>
16#include <mach/irqs.h>
17#include <mach/gpio.h>
18#include <mach/spi-clocks.h>
19
20#include <plat/s3c64xx-spi.h>
21#include <plat/gpio-cfg.h>
22
23static char *spi_src_clks[] = {
24 [S5PV210_SPI_SRCCLK_PCLK] = "pclk",
25 [S5PV210_SPI_SRCCLK_SCLK] = "sclk_spi",
26};
27
28/* SPI Controller platform_devices */
29
30/* Since we emulate multi-cs capability, we do not touch the CS.
31 * The emulated CS is toggled by board specific mechanism, as it can
32 * be either some immediate GPIO or some signal out of some other
33 * chip in between ... or some yet another way.
34 * We simply do not assume anything about CS.
35 */
36static int s5pv210_spi_cfg_gpio(struct platform_device *pdev)
37{
38 switch (pdev->id) {
39 case 0:
40 s3c_gpio_cfgpin(S5PV210_GPB(0), S3C_GPIO_SFN(2));
41 s3c_gpio_cfgpin(S5PV210_GPB(1), S3C_GPIO_SFN(2));
42 s3c_gpio_cfgpin(S5PV210_GPB(2), S3C_GPIO_SFN(2));
43 s3c_gpio_setpull(S5PV210_GPB(0), S3C_GPIO_PULL_UP);
44 s3c_gpio_setpull(S5PV210_GPB(1), S3C_GPIO_PULL_UP);
45 s3c_gpio_setpull(S5PV210_GPB(2), S3C_GPIO_PULL_UP);
46 break;
47
48 case 1:
49 s3c_gpio_cfgpin(S5PV210_GPB(4), S3C_GPIO_SFN(2));
50 s3c_gpio_cfgpin(S5PV210_GPB(5), S3C_GPIO_SFN(2));
51 s3c_gpio_cfgpin(S5PV210_GPB(6), S3C_GPIO_SFN(2));
52 s3c_gpio_setpull(S5PV210_GPB(4), S3C_GPIO_PULL_UP);
53 s3c_gpio_setpull(S5PV210_GPB(5), S3C_GPIO_PULL_UP);
54 s3c_gpio_setpull(S5PV210_GPB(6), S3C_GPIO_PULL_UP);
55 break;
56
57 default:
58 dev_err(&pdev->dev, "Invalid SPI Controller number!");
59 return -EINVAL;
60 }
61
62 return 0;
63}
64
65static struct resource s5pv210_spi0_resource[] = {
66 [0] = {
67 .start = S5PV210_PA_SPI0,
68 .end = S5PV210_PA_SPI0 + 0x100 - 1,
69 .flags = IORESOURCE_MEM,
70 },
71 [1] = {
72 .start = DMACH_SPI0_TX,
73 .end = DMACH_SPI0_TX,
74 .flags = IORESOURCE_DMA,
75 },
76 [2] = {
77 .start = DMACH_SPI0_RX,
78 .end = DMACH_SPI0_RX,
79 .flags = IORESOURCE_DMA,
80 },
81 [3] = {
82 .start = IRQ_SPI0,
83 .end = IRQ_SPI0,
84 .flags = IORESOURCE_IRQ,
85 },
86};
87
88static struct s3c64xx_spi_info s5pv210_spi0_pdata = {
89 .cfg_gpio = s5pv210_spi_cfg_gpio,
90 .fifo_lvl_mask = 0x1ff,
91 .rx_lvl_offset = 15,
92 .high_speed = 1,
93};
94
95static u64 spi_dmamask = DMA_BIT_MASK(32);
96
97struct platform_device s5pv210_device_spi0 = {
98 .name = "s3c64xx-spi",
99 .id = 0,
100 .num_resources = ARRAY_SIZE(s5pv210_spi0_resource),
101 .resource = s5pv210_spi0_resource,
102 .dev = {
103 .dma_mask = &spi_dmamask,
104 .coherent_dma_mask = DMA_BIT_MASK(32),
105 .platform_data = &s5pv210_spi0_pdata,
106 },
107};
108
109static struct resource s5pv210_spi1_resource[] = {
110 [0] = {
111 .start = S5PV210_PA_SPI1,
112 .end = S5PV210_PA_SPI1 + 0x100 - 1,
113 .flags = IORESOURCE_MEM,
114 },
115 [1] = {
116 .start = DMACH_SPI1_TX,
117 .end = DMACH_SPI1_TX,
118 .flags = IORESOURCE_DMA,
119 },
120 [2] = {
121 .start = DMACH_SPI1_RX,
122 .end = DMACH_SPI1_RX,
123 .flags = IORESOURCE_DMA,
124 },
125 [3] = {
126 .start = IRQ_SPI1,
127 .end = IRQ_SPI1,
128 .flags = IORESOURCE_IRQ,
129 },
130};
131
132static struct s3c64xx_spi_info s5pv210_spi1_pdata = {
133 .cfg_gpio = s5pv210_spi_cfg_gpio,
134 .fifo_lvl_mask = 0x7f,
135 .rx_lvl_offset = 15,
136 .high_speed = 1,
137};
138
139struct platform_device s5pv210_device_spi1 = {
140 .name = "s3c64xx-spi",
141 .id = 1,
142 .num_resources = ARRAY_SIZE(s5pv210_spi1_resource),
143 .resource = s5pv210_spi1_resource,
144 .dev = {
145 .dma_mask = &spi_dmamask,
146 .coherent_dma_mask = DMA_BIT_MASK(32),
147 .platform_data = &s5pv210_spi1_pdata,
148 },
149};
150
151void __init s5pv210_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
152{
153 struct s3c64xx_spi_info *pd;
154
155 /* Reject invalid configuration */
156 if (!num_cs || src_clk_nr < 0
157 || src_clk_nr > S5PV210_SPI_SRCCLK_SCLK) {
158 printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
159 return;
160 }
161
162 switch (cntrlr) {
163 case 0:
164 pd = &s5pv210_spi0_pdata;
165 break;
166 case 1:
167 pd = &s5pv210_spi1_pdata;
168 break;
169 default:
170 printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
171 __func__, cntrlr);
172 return;
173 }
174
175 pd->num_cs = num_cs;
176 pd->src_clk_nr = src_clk_nr;
177 pd->src_clk_name = spi_src_clks[src_clk_nr];
178}
diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h
index 62c5175ef291..92fc6c7fc064 100644
--- a/arch/arm/mach-s5pv210/include/mach/irqs.h
+++ b/arch/arm/mach-s5pv210/include/mach/irqs.h
@@ -17,22 +17,6 @@
17 17
18/* VIC0: System, DMA, Timer */ 18/* VIC0: System, DMA, Timer */
19 19
20#define IRQ_EINT0 S5P_IRQ_VIC0(0)
21#define IRQ_EINT1 S5P_IRQ_VIC0(1)
22#define IRQ_EINT2 S5P_IRQ_VIC0(2)
23#define IRQ_EINT3 S5P_IRQ_VIC0(3)
24#define IRQ_EINT4 S5P_IRQ_VIC0(4)
25#define IRQ_EINT5 S5P_IRQ_VIC0(5)
26#define IRQ_EINT6 S5P_IRQ_VIC0(6)
27#define IRQ_EINT7 S5P_IRQ_VIC0(7)
28#define IRQ_EINT8 S5P_IRQ_VIC0(8)
29#define IRQ_EINT9 S5P_IRQ_VIC0(9)
30#define IRQ_EINT10 S5P_IRQ_VIC0(10)
31#define IRQ_EINT11 S5P_IRQ_VIC0(11)
32#define IRQ_EINT12 S5P_IRQ_VIC0(12)
33#define IRQ_EINT13 S5P_IRQ_VIC0(13)
34#define IRQ_EINT14 S5P_IRQ_VIC0(14)
35#define IRQ_EINT15 S5P_IRQ_VIC0(15)
36#define IRQ_EINT16_31 S5P_IRQ_VIC0(16) 20#define IRQ_EINT16_31 S5P_IRQ_VIC0(16)
37#define IRQ_BATF S5P_IRQ_VIC0(17) 21#define IRQ_BATF S5P_IRQ_VIC0(17)
38#define IRQ_MDMA S5P_IRQ_VIC0(18) 22#define IRQ_MDMA S5P_IRQ_VIC0(18)
@@ -134,13 +118,25 @@
134#define IRQ_MDNIE3 S5P_IRQ_VIC3(8) 118#define IRQ_MDNIE3 S5P_IRQ_VIC3(8)
135#define IRQ_VIC_END S5P_IRQ_VIC3(31) 119#define IRQ_VIC_END S5P_IRQ_VIC3(31)
136 120
137#define S5P_IRQ_EINT_BASE (IRQ_VIC_END + 1) 121#define S5P_EINT_16_31_BASE (IRQ_VIC_END + 1)
138 122
139#define S5P_EINT(x) ((x) + S5P_IRQ_EINT_BASE) 123#define EINT_MODE S3C_GPIO_SFN(0xf)
140#define IRQ_EINT(x) S5P_EINT(x) 124
125#define IRQ_EINT(x) ((x) < 16 ? ((x) + S5P_IRQ_VIC0(0)) \
126 : ((x) + S5P_EINT_16_31_BASE))
141 127
142/* Set the default NR_IRQS */ 128/* Set the default NR_IRQS */
143 129
144#define NR_IRQS (IRQ_EINT(31) + 1) 130#define NR_IRQS (IRQ_EINT(31) + 1)
131
132#define EINT_GPIO_0(x) S5PV210_GPH0(x)
133#define EINT_GPIO_1(x) S5PV210_GPH1(x)
134#define EINT_GPIO_2(x) S5PV210_GPH2(x)
135#define EINT_GPIO_3(x) S5PV210_GPH3(x)
136
137/* Compatibility */
138#define IRQ_LCD_FIFO IRQ_LCD0
139#define IRQ_LCD_VSYNC IRQ_LCD1
140#define IRQ_LCD_SYSTEM IRQ_LCD2
145 141
146#endif /* ASM_ARCH_IRQS_H */ 142#endif /* ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h
index 5adcb9f26e44..34eb168ec950 100644
--- a/arch/arm/mach-s5pv210/include/mach/map.h
+++ b/arch/arm/mach-s5pv210/include/mach/map.h
@@ -16,6 +16,9 @@
16#include <plat/map-base.h> 16#include <plat/map-base.h>
17#include <plat/map-s5p.h> 17#include <plat/map-s5p.h>
18 18
19#define S5PC110_PA_ONENAND (0xB0000000)
20#define S5PC110_PA_ONENAND_DMA (0xB0600000)
21
19#define S5PV210_PA_CHIPID (0xE0000000) 22#define S5PV210_PA_CHIPID (0xE0000000)
20#define S5P_PA_CHIPID S5PV210_PA_CHIPID 23#define S5P_PA_CHIPID S5PV210_PA_CHIPID
21 24
@@ -25,13 +28,21 @@
25#define S5PV210_PA_GPIO (0xE0200000) 28#define S5PV210_PA_GPIO (0xE0200000)
26#define S5P_PA_GPIO S5PV210_PA_GPIO 29#define S5P_PA_GPIO S5PV210_PA_GPIO
27 30
31/* SPI */
32#define S5PV210_PA_SPI0 0xE1300000
33#define S5PV210_PA_SPI1 0xE1400000
34
28#define S5PV210_PA_IIC0 (0xE1800000) 35#define S5PV210_PA_IIC0 (0xE1800000)
36#define S5PV210_PA_IIC1 (0xFAB00000)
37#define S5PV210_PA_IIC2 (0xE1A00000)
29 38
30#define S5PV210_PA_TIMER (0xE2500000) 39#define S5PV210_PA_TIMER (0xE2500000)
31#define S5P_PA_TIMER S5PV210_PA_TIMER 40#define S5P_PA_TIMER S5PV210_PA_TIMER
32 41
33#define S5PV210_PA_SYSTIMER (0xE2600000) 42#define S5PV210_PA_SYSTIMER (0xE2600000)
34 43
44#define S5PV210_PA_WATCHDOG (0xE2700000)
45
35#define S5PV210_PA_UART (0xE2900000) 46#define S5PV210_PA_UART (0xE2900000)
36 47
37#define S5P_PA_UART0 (S5PV210_PA_UART + 0x0) 48#define S5P_PA_UART0 (S5PV210_PA_UART + 0x0)
@@ -47,6 +58,10 @@
47#define S5PV210_PA_PDMA0 0xE0900000 58#define S5PV210_PA_PDMA0 0xE0900000
48#define S5PV210_PA_PDMA1 0xE0A00000 59#define S5PV210_PA_PDMA1 0xE0A00000
49 60
61#define S5PV210_PA_FB (0xF8000000)
62
63#define S5PV210_PA_HSMMC(x) (0xEB000000 + ((x) * 0x100000))
64
50#define S5PV210_PA_VIC0 (0xF2000000) 65#define S5PV210_PA_VIC0 (0xF2000000)
51#define S5P_PA_VIC0 S5PV210_PA_VIC0 66#define S5P_PA_VIC0 S5PV210_PA_VIC0
52 67
@@ -75,8 +90,19 @@
75/* AC97 */ 90/* AC97 */
76#define S5PV210_PA_AC97 0xE2200000 91#define S5PV210_PA_AC97 0xE2200000
77 92
93#define S5PV210_PA_ADC (0xE1700000)
94
78/* compatibiltiy defines. */ 95/* compatibiltiy defines. */
79#define S3C_PA_UART S5PV210_PA_UART 96#define S3C_PA_UART S5PV210_PA_UART
97#define S3C_PA_HSMMC0 S5PV210_PA_HSMMC(0)
98#define S3C_PA_HSMMC1 S5PV210_PA_HSMMC(1)
99#define S3C_PA_HSMMC2 S5PV210_PA_HSMMC(2)
80#define S3C_PA_IIC S5PV210_PA_IIC0 100#define S3C_PA_IIC S5PV210_PA_IIC0
101#define S3C_PA_IIC1 S5PV210_PA_IIC1
102#define S3C_PA_IIC2 S5PV210_PA_IIC2
103#define S3C_PA_FB S5PV210_PA_FB
104#define S3C_PA_WDT S5PV210_PA_WATCHDOG
105
106#define SAMSUNG_PA_ADC S5PV210_PA_ADC
81 107
82#endif /* __ASM_ARCH_MAP_H */ 108#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/regs-clock.h b/arch/arm/mach-s5pv210/include/mach/regs-clock.h
index e56e0e4673ed..2a25ab40c863 100644
--- a/arch/arm/mach-s5pv210/include/mach/regs-clock.h
+++ b/arch/arm/mach-s5pv210/include/mach/regs-clock.h
@@ -126,6 +126,7 @@
126 126
127#define S5P_RST_STAT S5P_CLKREG(0xA000) 127#define S5P_RST_STAT S5P_CLKREG(0xA000)
128#define S5P_OSC_CON S5P_CLKREG(0x8000) 128#define S5P_OSC_CON S5P_CLKREG(0x8000)
129#define S5P_MDNIE_SEL S5P_CLKREG(0x7008)
129#define S5P_MIPI_PHY_CON0 S5P_CLKREG(0x7200) 130#define S5P_MIPI_PHY_CON0 S5P_CLKREG(0x7200)
130#define S5P_MIPI_PHY_CON1 S5P_CLKREG(0x7204) 131#define S5P_MIPI_PHY_CON1 S5P_CLKREG(0x7204)
131#define S5P_MIPI_CONTROL S5P_CLKREG(0xE814) 132#define S5P_MIPI_CONTROL S5P_CLKREG(0xE814)
diff --git a/arch/arm/mach-s5pv210/include/mach/regs-fb.h b/arch/arm/mach-s5pv210/include/mach/regs-fb.h
new file mode 100644
index 000000000000..60d992989bdc
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/regs-fb.h
@@ -0,0 +1,21 @@
1/*
2 * Copyright 2010 Ben Dooks <ben-linux@fluff.org>
3 *
4 * Dummy framebuffer to allow build for the moment.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#ifndef __ASM_ARCH_MACH_REGS_FB_H
12#define __ASM_ARCH_MACH_REGS_FB_H __FILE__
13
14#include <plat/regs-fb-v4.h>
15
16static inline unsigned int s3c_fb_pal_reg(unsigned int window, int reg)
17{
18 return 0x2400 + (window * 256 *4 ) + reg;
19}
20
21#endif /* __ASM_ARCH_MACH_REGS_FB_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/regs-gpio.h b/arch/arm/mach-s5pv210/include/mach/regs-gpio.h
new file mode 100644
index 000000000000..6d068091c36c
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/regs-gpio.h
@@ -0,0 +1,44 @@
1/* linux/arch/arm/mach-s5pv210/include/mach/regs-gpio.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * S5PV210 - GPIO (including EINT) register definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_REGS_GPIO_H
14#define __ASM_ARCH_REGS_GPIO_H __FILE__
15
16#include <mach/map.h>
17
18#define S5PV210_EINT30CON (S5P_VA_GPIO + 0xE00)
19#define S5P_EINT_CON(x) (S5PV210_EINT30CON + ((x) * 0x4))
20
21#define S5PV210_EINT30FLTCON0 (S5P_VA_GPIO + 0xE80)
22#define S5P_EINT_FLTCON(x) (S5PV210_EINT30FLTCON0 + ((x) * 0x4))
23
24#define S5PV210_EINT30MASK (S5P_VA_GPIO + 0xF00)
25#define S5P_EINT_MASK(x) (S5PV210_EINT30MASK + ((x) * 0x4))
26
27#define S5PV210_EINT30PEND (S5P_VA_GPIO + 0xF40)
28#define S5P_EINT_PEND(x) (S5PV210_EINT30PEND + ((x) * 0x4))
29
30#define eint_offset(irq) ((irq) < IRQ_EINT16_31 ? ((irq) - IRQ_EINT(0)) \
31 : ((irq) - S5P_EINT_16_31_BASE))
32
33#define EINT_REG_NR(x) (eint_offset(x) >> 3)
34
35#define eint_irq_to_bit(irq) (1 << (eint_offset(irq) & 0x7))
36
37/* values for S5P_EXTINT0 */
38#define S5P_EXTINT_LOWLEV (0x00)
39#define S5P_EXTINT_HILEV (0x01)
40#define S5P_EXTINT_FALLEDGE (0x02)
41#define S5P_EXTINT_RISEEDGE (0x03)
42#define S5P_EXTINT_BOTHEDGE (0x04)
43
44#endif /* __ASM_ARCH_REGS_GPIO_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/spi-clocks.h b/arch/arm/mach-s5pv210/include/mach/spi-clocks.h
new file mode 100644
index 000000000000..02acded5f73d
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/spi-clocks.h
@@ -0,0 +1,17 @@
1/* linux/arch/arm/mach-s5pv210/include/mach/spi-clocks.h
2 *
3 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
4 * Jaswinder Singh <jassi.brar@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __S5PV210_PLAT_SPI_CLKS_H
12#define __S5PV210_PLAT_SPI_CLKS_H __FILE__
13
14#define S5PV210_SPI_SRCCLK_PCLK 0
15#define S5PV210_SPI_SRCCLK_SCLK 1
16
17#endif /* __S5PV210_PLAT_SPI_CLKS_H */
diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c
new file mode 100644
index 000000000000..10bc76ec4025
--- /dev/null
+++ b/arch/arm/mach-s5pv210/mach-aquila.c
@@ -0,0 +1,149 @@
1/* linux/arch/arm/mach-s5pv210/mach-aquila.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/kernel.h>
12#include <linux/types.h>
13#include <linux/init.h>
14#include <linux/serial_core.h>
15#include <linux/fb.h>
16
17#include <asm/mach/arch.h>
18#include <asm/mach/map.h>
19#include <asm/setup.h>
20#include <asm/mach-types.h>
21
22#include <mach/map.h>
23#include <mach/regs-clock.h>
24#include <mach/regs-fb.h>
25
26#include <plat/regs-serial.h>
27#include <plat/s5pv210.h>
28#include <plat/devs.h>
29#include <plat/cpu.h>
30#include <plat/fb.h>
31
32/* Following are default values for UCON, ULCON and UFCON UART registers */
33#define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
34 S3C2410_UCON_RXILEVEL | \
35 S3C2410_UCON_TXIRQMODE | \
36 S3C2410_UCON_RXIRQMODE | \
37 S3C2410_UCON_RXFIFO_TOI | \
38 S3C2443_UCON_RXERR_IRQEN)
39
40#define S5PV210_ULCON_DEFAULT S3C2410_LCON_CS8
41
42#define S5PV210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
43 S5PV210_UFCON_TXTRIG4 | \
44 S5PV210_UFCON_RXTRIG4)
45
46static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = {
47 [0] = {
48 .hwport = 0,
49 .flags = 0,
50 .ucon = S5PV210_UCON_DEFAULT,
51 .ulcon = S5PV210_ULCON_DEFAULT,
52 .ufcon = S5PV210_UFCON_DEFAULT,
53 },
54 [1] = {
55 .hwport = 1,
56 .flags = 0,
57 .ucon = S5PV210_UCON_DEFAULT,
58 .ulcon = S5PV210_ULCON_DEFAULT,
59 .ufcon = S5PV210_UFCON_DEFAULT,
60 },
61 [2] = {
62 .hwport = 2,
63 .flags = 0,
64 .ucon = S5PV210_UCON_DEFAULT,
65 .ulcon = S5PV210_ULCON_DEFAULT,
66 .ufcon = S5PV210_UFCON_DEFAULT,
67 },
68 [3] = {
69 .hwport = 3,
70 .flags = 0,
71 .ucon = S5PV210_UCON_DEFAULT,
72 .ulcon = S5PV210_ULCON_DEFAULT,
73 .ufcon = S5PV210_UFCON_DEFAULT,
74 },
75};
76
77/* Frame Buffer */
78static struct s3c_fb_pd_win aquila_fb_win0 = {
79 .win_mode = {
80 .pixclock = 1000000000000ULL / ((16+16+2+480)*(28+3+2+800)*60),
81 .left_margin = 16,
82 .right_margin = 16,
83 .upper_margin = 3,
84 .lower_margin = 28,
85 .hsync_len = 2,
86 .vsync_len = 2,
87 .xres = 480,
88 .yres = 800,
89 },
90 .max_bpp = 32,
91 .default_bpp = 16,
92};
93
94static struct s3c_fb_pd_win aquila_fb_win1 = {
95 .win_mode = {
96 .pixclock = 1000000000000ULL / ((16+16+2+480)*(28+3+2+800)*60),
97 .left_margin = 16,
98 .right_margin = 16,
99 .upper_margin = 3,
100 .lower_margin = 28,
101 .hsync_len = 2,
102 .vsync_len = 2,
103 .xres = 480,
104 .yres = 800,
105 },
106 .max_bpp = 32,
107 .default_bpp = 16,
108};
109
110static struct s3c_fb_platdata aquila_lcd_pdata __initdata = {
111 .win[0] = &aquila_fb_win0,
112 .win[1] = &aquila_fb_win1,
113 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
114 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
115 VIDCON1_INV_VCLK | VIDCON1_INV_VDEN,
116 .setup_gpio = s5pv210_fb_gpio_setup_24bpp,
117};
118
119static struct platform_device *aquila_devices[] __initdata = {
120 &s3c_device_fb,
121};
122
123static void __init aquila_map_io(void)
124{
125 s5p_init_io(NULL, 0, S5P_VA_CHIPID);
126 s3c24xx_init_clocks(24000000);
127 s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs));
128}
129
130static void __init aquila_machine_init(void)
131{
132 /* FB */
133 s3c_fb_set_platdata(&aquila_lcd_pdata);
134
135 platform_add_devices(aquila_devices, ARRAY_SIZE(aquila_devices));
136}
137
138MACHINE_START(AQUILA, "Aquila")
139 /* Maintainers:
140 Marek Szyprowski <m.szyprowski@samsung.com>
141 Kyungmin Park <kyungmin.park@samsung.com> */
142 .phys_io = S3C_PA_UART & 0xfff00000,
143 .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
144 .boot_params = S5P_PA_SDRAM + 0x100,
145 .init_irq = s5pv210_init_irq,
146 .map_io = aquila_map_io,
147 .init_machine = aquila_machine_init,
148 .timer = &s3c24xx_timer,
149MACHINE_END
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c
new file mode 100644
index 000000000000..4863b13824e4
--- /dev/null
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -0,0 +1,98 @@
1/* linux/arch/arm/mach-s5pv210/mach-goni.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/kernel.h>
12#include <linux/types.h>
13#include <linux/init.h>
14#include <linux/serial_core.h>
15
16#include <asm/mach/arch.h>
17#include <asm/mach/map.h>
18#include <asm/setup.h>
19#include <asm/mach-types.h>
20
21#include <mach/map.h>
22#include <mach/regs-clock.h>
23
24#include <plat/regs-serial.h>
25#include <plat/s5pv210.h>
26#include <plat/devs.h>
27#include <plat/cpu.h>
28
29/* Following are default values for UCON, ULCON and UFCON UART registers */
30#define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
31 S3C2410_UCON_RXILEVEL | \
32 S3C2410_UCON_TXIRQMODE | \
33 S3C2410_UCON_RXIRQMODE | \
34 S3C2410_UCON_RXFIFO_TOI | \
35 S3C2443_UCON_RXERR_IRQEN)
36
37#define S5PV210_ULCON_DEFAULT S3C2410_LCON_CS8
38
39#define S5PV210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
40 S5PV210_UFCON_TXTRIG4 | \
41 S5PV210_UFCON_RXTRIG4)
42
43static struct s3c2410_uartcfg goni_uartcfgs[] __initdata = {
44 [0] = {
45 .hwport = 0,
46 .flags = 0,
47 .ucon = S5PV210_UCON_DEFAULT,
48 .ulcon = S5PV210_ULCON_DEFAULT,
49 .ufcon = S5PV210_UFCON_DEFAULT,
50 },
51 [1] = {
52 .hwport = 1,
53 .flags = 0,
54 .ucon = S5PV210_UCON_DEFAULT,
55 .ulcon = S5PV210_ULCON_DEFAULT,
56 .ufcon = S5PV210_UFCON_DEFAULT,
57 },
58 [2] = {
59 .hwport = 2,
60 .flags = 0,
61 .ucon = S5PV210_UCON_DEFAULT,
62 .ulcon = S5PV210_ULCON_DEFAULT,
63 .ufcon = S5PV210_UFCON_DEFAULT,
64 },
65 [3] = {
66 .hwport = 3,
67 .flags = 0,
68 .ucon = S5PV210_UCON_DEFAULT,
69 .ulcon = S5PV210_ULCON_DEFAULT,
70 .ufcon = S5PV210_UFCON_DEFAULT,
71 },
72};
73
74static struct platform_device *goni_devices[] __initdata = {
75};
76
77static void __init goni_map_io(void)
78{
79 s5p_init_io(NULL, 0, S5P_VA_CHIPID);
80 s3c24xx_init_clocks(24000000);
81 s3c24xx_init_uarts(goni_uartcfgs, ARRAY_SIZE(goni_uartcfgs));
82}
83
84static void __init goni_machine_init(void)
85{
86 platform_add_devices(goni_devices, ARRAY_SIZE(goni_devices));
87}
88
89MACHINE_START(GONI, "GONI")
90 /* Maintainers: Kyungmin Park <kyungmin.park@samsung.com> */
91 .phys_io = S3C_PA_UART & 0xfff00000,
92 .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
93 .boot_params = S5P_PA_SDRAM + 0x100,
94 .init_irq = s5pv210_init_irq,
95 .map_io = goni_map_io,
96 .init_machine = goni_machine_init,
97 .timer = &s3c24xx_timer,
98MACHINE_END
diff --git a/arch/arm/mach-s5pv210/mach-smdkc110.c b/arch/arm/mach-s5pv210/mach-smdkc110.c
index 6f9fd3274e2e..4c8903c6d104 100644
--- a/arch/arm/mach-s5pv210/mach-smdkc110.c
+++ b/arch/arm/mach-s5pv210/mach-smdkc110.c
@@ -74,6 +74,7 @@ static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = {
74static struct platform_device *smdkc110_devices[] __initdata = { 74static struct platform_device *smdkc110_devices[] __initdata = {
75 &s5pv210_device_iis0, 75 &s5pv210_device_iis0,
76 &s5pv210_device_ac97, 76 &s5pv210_device_ac97,
77 &s3c_device_wdt,
77}; 78};
78 79
79static void __init smdkc110_map_io(void) 80static void __init smdkc110_map_io(void)
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c
index 3c29e18528a5..0d4627948040 100644
--- a/arch/arm/mach-s5pv210/mach-smdkv210.c
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -25,6 +25,8 @@
25#include <plat/s5pv210.h> 25#include <plat/s5pv210.h>
26#include <plat/devs.h> 26#include <plat/devs.h>
27#include <plat/cpu.h> 27#include <plat/cpu.h>
28#include <plat/adc.h>
29#include <plat/ts.h>
28 30
29/* Following are default values for UCON, ULCON and UFCON UART registers */ 31/* Following are default values for UCON, ULCON and UFCON UART registers */
30#define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 32#define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
@@ -74,6 +76,15 @@ static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = {
74static struct platform_device *smdkv210_devices[] __initdata = { 76static struct platform_device *smdkv210_devices[] __initdata = {
75 &s5pv210_device_iis0, 77 &s5pv210_device_iis0,
76 &s5pv210_device_ac97, 78 &s5pv210_device_ac97,
79 &s3c_device_adc,
80 &s3c_device_ts,
81 &s3c_device_wdt,
82};
83
84static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
85 .delay = 10000,
86 .presc = 49,
87 .oversampling_shift = 2,
77}; 88};
78 89
79static void __init smdkv210_map_io(void) 90static void __init smdkv210_map_io(void)
@@ -85,6 +96,7 @@ static void __init smdkv210_map_io(void)
85 96
86static void __init smdkv210_machine_init(void) 97static void __init smdkv210_machine_init(void)
87{ 98{
99 s3c24xx_ts_set_platdata(&s3c_ts_platform);
88 platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices)); 100 platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices));
89} 101}
90 102
diff --git a/arch/arm/mach-s5pv210/setup-fb-24bpp.c b/arch/arm/mach-s5pv210/setup-fb-24bpp.c
new file mode 100644
index 000000000000..a50cbac8720d
--- /dev/null
+++ b/arch/arm/mach-s5pv210/setup-fb-24bpp.c
@@ -0,0 +1,62 @@
1/* linux/arch/arm/plat-s5pv210/setup-fb-24bpp.c
2 *
3 * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Base s5pv210 setup information for 24bpp LCD framebuffer
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/kernel.h>
14#include <linux/types.h>
15#include <linux/fb.h>
16
17#include <mach/regs-fb.h>
18#include <mach/gpio.h>
19#include <mach/map.h>
20#include <plat/fb.h>
21#include <mach/regs-clock.h>
22#include <plat/gpio-cfg.h>
23
24void s5pv210_fb_gpio_setup_24bpp(void)
25{
26 unsigned int gpio = 0;
27
28 for (gpio = S5PV210_GPF0(0); gpio <= S5PV210_GPF0(7); gpio++) {
29 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
30 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
31 s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
32 }
33
34 for (gpio = S5PV210_GPF1(0); gpio <= S5PV210_GPF1(7); gpio++) {
35 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
36 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
37 s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
38 }
39
40 for (gpio = S5PV210_GPF2(0); gpio <= S5PV210_GPF2(7); gpio++) {
41 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
42 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
43 s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
44 }
45
46 for (gpio = S5PV210_GPF3(0); gpio <= S5PV210_GPF3(3); gpio++) {
47 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
48 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
49 s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
50 }
51
52 /* Set DISPLAY_CONTROL register for Display path selection.
53 *
54 * ouput | RGB | I80 | ITU
55 * -----------------------------------
56 * 00 | MIE | FIMD | FIMD
57 * 01 | MDNIE | MDNIE | FIMD
58 * 10 | FIMD | FIMD | FIMD
59 * 11 | FIMD | FIMD | FIMD
60 */
61 writel(0x2, S5P_MDNIE_SEL);
62}
diff --git a/arch/arm/mach-s5pv210/setup-i2c0.c b/arch/arm/mach-s5pv210/setup-i2c0.c
index 9ec6845840e5..c718253c70b8 100644
--- a/arch/arm/mach-s5pv210/setup-i2c0.c
+++ b/arch/arm/mach-s5pv210/setup-i2c0.c
@@ -1,6 +1,6 @@
1/* linux/arch/arm/mach-s5pv210/setup-i2c0.c 1/* linux/arch/arm/mach-s5pv210/setup-i2c0.c
2 * 2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd. 3 * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/ 4 * http://www.samsung.com/
5 * 5 *
6 * I2C0 GPIO configuration. 6 * I2C0 GPIO configuration.
@@ -17,9 +17,14 @@
17 17
18struct platform_device; /* don't need the contents */ 18struct platform_device; /* don't need the contents */
19 19
20#include <mach/gpio.h>
20#include <plat/iic.h> 21#include <plat/iic.h>
22#include <plat/gpio-cfg.h>
21 23
22void s3c_i2c0_cfg_gpio(struct platform_device *dev) 24void s3c_i2c0_cfg_gpio(struct platform_device *dev)
23{ 25{
24 /* Will be populated later */ 26 s3c_gpio_cfgpin(S5PV210_GPD1(0), S3C_GPIO_SFN(2));
27 s3c_gpio_setpull(S5PV210_GPD1(0), S3C_GPIO_PULL_UP);
28 s3c_gpio_cfgpin(S5PV210_GPD1(1), S3C_GPIO_SFN(2));
29 s3c_gpio_setpull(S5PV210_GPD1(1), S3C_GPIO_PULL_UP);
25} 30}
diff --git a/arch/arm/mach-s5pv210/setup-i2c1.c b/arch/arm/mach-s5pv210/setup-i2c1.c
new file mode 100644
index 000000000000..45e0e6ed2ed0
--- /dev/null
+++ b/arch/arm/mach-s5pv210/setup-i2c1.c
@@ -0,0 +1,30 @@
1/* linux/arch/arm/mach-s5pv210/setup-i2c1.c
2 *
3 * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * I2C1 GPIO configuration.
7 *
8 * Based on plat-s3c64xx/setup-i2c1.c
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <linux/kernel.h>
16#include <linux/types.h>
17
18struct platform_device; /* don't need the contents */
19
20#include <mach/gpio.h>
21#include <plat/iic.h>
22#include <plat/gpio-cfg.h>
23
24void s3c_i2c1_cfg_gpio(struct platform_device *dev)
25{
26 s3c_gpio_cfgpin(S5PV210_GPD1(2), S3C_GPIO_SFN(2));
27 s3c_gpio_setpull(S5PV210_GPD1(2), S3C_GPIO_PULL_UP);
28 s3c_gpio_cfgpin(S5PV210_GPD1(3), S3C_GPIO_SFN(2));
29 s3c_gpio_setpull(S5PV210_GPD1(3), S3C_GPIO_PULL_UP);
30}
diff --git a/arch/arm/mach-s5pv210/setup-i2c2.c b/arch/arm/mach-s5pv210/setup-i2c2.c
new file mode 100644
index 000000000000..b11b4bff69ac
--- /dev/null
+++ b/arch/arm/mach-s5pv210/setup-i2c2.c
@@ -0,0 +1,30 @@
1/* linux/arch/arm/mach-s5pv210/setup-i2c2.c
2 *
3 * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * I2C2 GPIO configuration.
7 *
8 * Based on plat-s3c64xx/setup-i2c0.c
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <linux/kernel.h>
16#include <linux/types.h>
17
18struct platform_device; /* don't need the contents */
19
20#include <mach/gpio.h>
21#include <plat/iic.h>
22#include <plat/gpio-cfg.h>
23
24void s3c_i2c2_cfg_gpio(struct platform_device *dev)
25{
26 s3c_gpio_cfgpin(S5PV210_GPD1(4), S3C_GPIO_SFN(2));
27 s3c_gpio_setpull(S5PV210_GPD1(4), S3C_GPIO_PULL_UP);
28 s3c_gpio_cfgpin(S5PV210_GPD1(5), S3C_GPIO_SFN(2));
29 s3c_gpio_setpull(S5PV210_GPD1(5), S3C_GPIO_PULL_UP);
30}
diff --git a/arch/arm/mach-s5pv210/setup-sdhci-gpio.c b/arch/arm/mach-s5pv210/setup-sdhci-gpio.c
new file mode 100644
index 000000000000..fe7d86dad14c
--- /dev/null
+++ b/arch/arm/mach-s5pv210/setup-sdhci-gpio.c
@@ -0,0 +1,104 @@
1/* linux/arch/arm/plat-s5pc1xx/setup-sdhci-gpio.c
2 *
3 * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5PV210 - Helper functions for setting up SDHCI device(s) GPIO (HSMMC)
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/kernel.h>
14#include <linux/types.h>
15#include <linux/interrupt.h>
16#include <linux/platform_device.h>
17#include <linux/io.h>
18#include <linux/mmc/host.h>
19#include <linux/mmc/card.h>
20
21#include <mach/gpio.h>
22#include <plat/gpio-cfg.h>
23#include <plat/regs-sdhci.h>
24
25void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
26{
27 unsigned int gpio;
28
29 /* Set all the necessary GPG0/GPG1 pins to special-function 2 */
30 for (gpio = S5PV210_GPG0(0); gpio < S5PV210_GPG0(2); gpio++) {
31 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
32 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
33 }
34 switch (width) {
35 case 8:
36 /* GPG1[3:6] special-funtion 3 */
37 for (gpio = S5PV210_GPG1(3); gpio <= S5PV210_GPG1(6); gpio++) {
38 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
39 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
40 }
41 case 4:
42 /* GPG0[3:6] special-funtion 2 */
43 for (gpio = S5PV210_GPG0(3); gpio <= S5PV210_GPG0(6); gpio++) {
44 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
45 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
46 }
47 default:
48 break;
49 }
50
51 s3c_gpio_setpull(S5PV210_GPG0(2), S3C_GPIO_PULL_UP);
52 s3c_gpio_cfgpin(S5PV210_GPG0(2), S3C_GPIO_SFN(2));
53}
54
55void s5pv210_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)
56{
57 unsigned int gpio;
58
59 /* Set all the necessary GPG1[0:1] pins to special-function 2 */
60 for (gpio = S5PV210_GPG1(0); gpio < S5PV210_GPG1(2); gpio++) {
61 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
62 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
63 }
64
65 /* Data pin GPG1[3:6] to special-function 2 */
66 for (gpio = S5PV210_GPG1(3); gpio <= S5PV210_GPG1(6); gpio++) {
67 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
68 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
69 }
70
71 s3c_gpio_setpull(S5PV210_GPG1(2), S3C_GPIO_PULL_UP);
72 s3c_gpio_cfgpin(S5PV210_GPG1(2), S3C_GPIO_SFN(2));
73}
74
75void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width)
76{
77 unsigned int gpio;
78
79 /* Set all the necessary GPG2[0:1] pins to special-function 2 */
80 for (gpio = S5PV210_GPG2(0); gpio < S5PV210_GPG2(2); gpio++) {
81 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
82 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
83 }
84
85 switch (width) {
86 case 8:
87 /* Data pin GPG3[3:6] to special-function 3 */
88 for (gpio = S5PV210_GPG3(3); gpio <= S5PV210_GPG3(6); gpio++) {
89 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
90 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
91 }
92 case 4:
93 /* Data pin GPG2[3:6] to special-function 2 */
94 for (gpio = S5PV210_GPG2(3); gpio <= S5PV210_GPG2(6); gpio++) {
95 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
96 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
97 }
98 default:
99 break;
100 }
101
102 s3c_gpio_setpull(S5PV210_GPG2(2), S3C_GPIO_PULL_UP);
103 s3c_gpio_cfgpin(S5PV210_GPG2(2), S3C_GPIO_SFN(2));
104}
diff --git a/arch/arm/mach-s5pv210/setup-sdhci.c b/arch/arm/mach-s5pv210/setup-sdhci.c
new file mode 100644
index 000000000000..51815ec60c2a
--- /dev/null
+++ b/arch/arm/mach-s5pv210/setup-sdhci.c
@@ -0,0 +1,63 @@
1/* linux/arch/arm/mach-s5pv210/setup-sdhci.c
2 *
3 * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5PV210 - Helper functions for settign up SDHCI device(s) (HSMMC)
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/kernel.h>
14#include <linux/types.h>
15#include <linux/interrupt.h>
16#include <linux/platform_device.h>
17#include <linux/io.h>
18
19#include <linux/mmc/card.h>
20#include <linux/mmc/host.h>
21
22#include <plat/regs-sdhci.h>
23#include <plat/sdhci.h>
24
25/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
26
27char *s5pv210_hsmmc_clksrcs[4] = {
28 [0] = "hsmmc", /* HCLK */
29 [1] = "hsmmc", /* HCLK */
30 [2] = "sclk_mmc", /* mmc_bus */
31 /*[4] = reserved */
32};
33
34void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev,
35 void __iomem *r,
36 struct mmc_ios *ios,
37 struct mmc_card *card)
38{
39 u32 ctrl2, ctrl3;
40
41 /* don't need to alter anything acording to card-type */
42
43 writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4);
44
45 ctrl2 = readl(r + S3C_SDHCI_CONTROL2);
46 ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK;
47 ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
48 S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
49 S3C_SDHCI_CTRL2_ENFBCLKRX |
50 S3C_SDHCI_CTRL2_DFCNT_NONE |
51 S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
52
53 if (ios->clock < 25 * 1000000)
54 ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 |
55 S3C_SDHCI_CTRL3_FCSEL2 |
56 S3C_SDHCI_CTRL3_FCSEL1 |
57 S3C_SDHCI_CTRL3_FCSEL0);
58 else
59 ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);
60
61 writel(ctrl2, r + S3C_SDHCI_CONTROL2);
62 writel(ctrl3, r + S3C_SDHCI_CONTROL3);
63}
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-13 18:36:30 -0500