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Diffstat (limited to 'arch/arm/mach-s5pv210/mach-aquila.c')
-rw-r--r--arch/arm/mach-s5pv210/mach-aquila.c36
1 files changed, 16 insertions, 20 deletions
diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c
index 48d018f2332b..af528f9e97f9 100644
--- a/arch/arm/mach-s5pv210/mach-aquila.c
+++ b/arch/arm/mach-s5pv210/mach-aquila.c
@@ -96,38 +96,34 @@ static struct s3c2410_uartcfg aquila_uartcfgs[] __initdata = {
96 96
97/* Frame Buffer */ 97/* Frame Buffer */
98static struct s3c_fb_pd_win aquila_fb_win0 = { 98static struct s3c_fb_pd_win aquila_fb_win0 = {
99 .win_mode = {
100 .left_margin = 16,
101 .right_margin = 16,
102 .upper_margin = 3,
103 .lower_margin = 28,
104 .hsync_len = 2,
105 .vsync_len = 2,
106 .xres = 480,
107 .yres = 800,
108 },
109 .max_bpp = 32, 99 .max_bpp = 32,
110 .default_bpp = 16, 100 .default_bpp = 16,
101 .xres = 480,
102 .yres = 800,
111}; 103};
112 104
113static struct s3c_fb_pd_win aquila_fb_win1 = { 105static struct s3c_fb_pd_win aquila_fb_win1 = {
114 .win_mode = {
115 .left_margin = 16,
116 .right_margin = 16,
117 .upper_margin = 3,
118 .lower_margin = 28,
119 .hsync_len = 2,
120 .vsync_len = 2,
121 .xres = 480,
122 .yres = 800,
123 },
124 .max_bpp = 32, 106 .max_bpp = 32,
125 .default_bpp = 16, 107 .default_bpp = 16,
108 .xres = 480,
109 .yres = 800,
110};
111
112static struct fb_videomode aquila_lcd_timing = {
113 .left_margin = 16,
114 .right_margin = 16,
115 .upper_margin = 3,
116 .lower_margin = 28,
117 .hsync_len = 2,
118 .vsync_len = 2,
119 .xres = 480,
120 .yres = 800,
126}; 121};
127 122
128static struct s3c_fb_platdata aquila_lcd_pdata __initdata = { 123static struct s3c_fb_platdata aquila_lcd_pdata __initdata = {
129 .win[0] = &aquila_fb_win0, 124 .win[0] = &aquila_fb_win0,
130 .win[1] = &aquila_fb_win1, 125 .win[1] = &aquila_fb_win1,
126 .vtiming = &aquila_lcd_timing,
131 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, 127 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
132 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC | 128 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
133 VIDCON1_INV_VCLK | VIDCON1_INV_VDEN, 129 VIDCON1_INV_VCLK | VIDCON1_INV_VDEN,